drivers/crypto/sa2ul.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * K3 SA2UL crypto accelerator driver
   4  *
   5  * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com
   6  *
   7  * Authors:     Keerthy
   8  *              Vitaly Andrianov
   9  *              Tero Kristo
  10  */
  11
  12 #ifndef _K3_SA2UL_
  13 #define _K3_SA2UL_
  14
  15 #include <crypto/aes.h>
  16 #include <crypto/sha1.h>
  17 #include <crypto/sha2.h>
  18
  19 #define SA_ENGINE_ENABLE_CONTROL        0x1000
  20
  21 struct sa_tfm_ctx;
  22 /*
  23  * SA_ENGINE_ENABLE_CONTROL register bits
  24  */
  25 #define SA_EEC_ENCSS_EN                 0x00000001
  26 #define SA_EEC_AUTHSS_EN                0x00000002
  27 #define SA_EEC_TRNG_EN                  0x00000008
  28 #define SA_EEC_PKA_EN                   0x00000010
  29 #define SA_EEC_CTXCACH_EN               0x00000080
  30 #define SA_EEC_CPPI_PORT_IN_EN          0x00000200
  31 #define SA_EEC_CPPI_PORT_OUT_EN         0x00000800
  32
  33 /*
  34  * Encoding used to identify the typo of crypto operation
  35  * performed on the packet when the packet is returned
  36  * by SA
  37  */
  38 #define SA_REQ_SUBTYPE_ENC      0x0001
  39 #define SA_REQ_SUBTYPE_DEC      0x0002
  40 #define SA_REQ_SUBTYPE_SHIFT    16
  41 #define SA_REQ_SUBTYPE_MASK     0xffff
  42
  43 /* Number of 32 bit words in EPIB  */
  44 #define SA_DMA_NUM_EPIB_WORDS   4
  45
  46 /* Number of 32 bit words in PS data  */
  47 #define SA_DMA_NUM_PS_WORDS     16
  48 #define NKEY_SZ                 3
  49 #define MCI_SZ                  27
  50
  51 /*
  52  * Maximum number of simultaeneous security contexts
  53  * supported by the driver
  54  */
  55 #define SA_MAX_NUM_CTX  512
  56
  57 /*
  58  * Assumption: CTX size is multiple of 32
  59  */
  60 #define SA_CTX_SIZE_TO_DMA_SIZE(ctx_sz) \
  61                 ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0)
  62
  63 #define SA_CTX_ENC_KEY_OFFSET   32
  64 #define SA_CTX_ENC_AUX1_OFFSET  64
  65 #define SA_CTX_ENC_AUX2_OFFSET  96
  66 #define SA_CTX_ENC_AUX3_OFFSET  112
  67 #define SA_CTX_ENC_AUX4_OFFSET  128
  68
  69 /* Next Engine Select code in CP_ACE */
  70 #define SA_ENG_ID_EM1   2       /* Enc/Dec engine with AES/DEC core */
  71 #define SA_ENG_ID_EM2   3       /* Encryption/Decryption enginefor pass 2 */
  72 #define SA_ENG_ID_AM1   4       /* Auth. engine with SHA1/MD5/SHA2 core */
  73 #define SA_ENG_ID_AM2   5       /*  Authentication engine for pass 2 */
  74 #define SA_ENG_ID_OUTPORT2 20   /*  Egress module 2  */
  75
  76 /*
  77  * Command Label Definitions
  78  */
  79 #define SA_CMDL_OFFSET_NESC           0      /* Next Engine Select Code */
  80 #define SA_CMDL_OFFSET_LABEL_LEN      1      /* Engine Command Label Length */
  81 /* 16-bit Length of Data to be processed */
  82 #define SA_CMDL_OFFSET_DATA_LEN       2
  83 #define SA_CMDL_OFFSET_DATA_OFFSET    4      /* Stat Data Offset */
  84 #define SA_CMDL_OFFSET_OPTION_CTRL1   5      /* Option Control Byte 1 */
  85 #define SA_CMDL_OFFSET_OPTION_CTRL2   6      /* Option Control Byte 2 */
  86 #define SA_CMDL_OFFSET_OPTION_CTRL3   7      /* Option Control Byte 3 */
  87 #define SA_CMDL_OFFSET_OPTION_BYTE    8
  88
  89 #define SA_CMDL_HEADER_SIZE_BYTES       8
  90
  91 #define SA_CMDL_OPTION_BYTES_MAX_SIZE     72
  92 #define SA_CMDL_MAX_SIZE_BYTES (SA_CMDL_HEADER_SIZE_BYTES + \
  93                                 SA_CMDL_OPTION_BYTES_MAX_SIZE)
  94
  95 /* SWINFO word-0 flags */
  96 #define SA_SW_INFO_FLAG_EVICT   0x0001
  97 #define SA_SW_INFO_FLAG_TEAR    0x0002
  98 #define SA_SW_INFO_FLAG_NOPD    0x0004
  99
 100 /*
 101  * This type represents the various packet types to be processed
 102  * by the PHP engine in SA.
 103  * It is used to identify the corresponding PHP processing function.
 104  */
 105 #define SA_CTX_PE_PKT_TYPE_3GPP_AIR    0    /* 3GPP Air Cipher */
 106 #define SA_CTX_PE_PKT_TYPE_SRTP        1    /* SRTP */
 107 #define SA_CTX_PE_PKT_TYPE_IPSEC_AH    2    /* IPSec Authentication Header */
 108 /* IPSec Encapsulating Security Payload */
 109 #define SA_CTX_PE_PKT_TYPE_IPSEC_ESP   3
 110 /* Indicates that it is in data mode, It may not be used by PHP */
 111 #define SA_CTX_PE_PKT_TYPE_NONE        4
 112 #define SA_CTX_ENC_TYPE1_SZ     64      /* Encryption SC with Key only */
 113 #define SA_CTX_ENC_TYPE2_SZ     96      /* Encryption SC with Key and Aux1 */
 114
 115 #define SA_CTX_AUTH_TYPE1_SZ    64      /* Auth SC with Key only */
 116 #define SA_CTX_AUTH_TYPE2_SZ    96      /* Auth SC with Key and Aux1 */
 117 /* Size of security context for PHP engine */
 118 #define SA_CTX_PHP_PE_CTX_SZ    64
 119
 120 #define SA_CTX_MAX_SZ (64 + SA_CTX_ENC_TYPE2_SZ + SA_CTX_AUTH_TYPE2_SZ)
 121
 122 /*
 123  * Encoding of F/E control in SCCTL
 124  *  Bit 0-1: Fetch PHP Bytes
 125  *  Bit 2-3: Fetch Encryption/Air Ciphering Bytes
 126  *  Bit 4-5: Fetch Authentication Bytes or Encr pass 2
 127  *  Bit 6-7: Evict PHP Bytes
 128  *
 129  *  where   00 = 0 bytes
 130  *          01 = 64 bytes
 131  *          10 = 96 bytes
 132  *          11 = 128 bytes
 133  */
 134 #define SA_CTX_DMA_SIZE_0       0
 135 #define SA_CTX_DMA_SIZE_64      1
 136 #define SA_CTX_DMA_SIZE_96      2
 137 #define SA_CTX_DMA_SIZE_128     3
 138
 139 /*
 140  * Byte offset of the owner word in SCCTL
 141  * in the security context
 142  */
 143 #define SA_CTX_SCCTL_OWNER_OFFSET 0
 144
 145 #define SA_CTX_ENC_KEY_OFFSET   32
 146 #define SA_CTX_ENC_AUX1_OFFSET  64
 147 #define SA_CTX_ENC_AUX2_OFFSET  96
 148 #define SA_CTX_ENC_AUX3_OFFSET  112
 149 #define SA_CTX_ENC_AUX4_OFFSET  128
 150
 151 #define SA_SCCTL_FE_AUTH_ENC    0x65
 152 #define SA_SCCTL_FE_ENC         0x8D
 153
 154 #define SA_ALIGN_MASK           (sizeof(u32) - 1)
 155 #define SA_ALIGNED              __aligned(32)
 156
 157 #define SA_AUTH_SW_CTRL_MD5     1
 158 #define SA_AUTH_SW_CTRL_SHA1    2
 159 #define SA_AUTH_SW_CTRL_SHA224  3
 160 #define SA_AUTH_SW_CTRL_SHA256  4
 161 #define SA_AUTH_SW_CTRL_SHA384  5
 162 #define SA_AUTH_SW_CTRL_SHA512  6
 163
 164 /* SA2UL can only handle maximum data size of 64KB */
 165 #define SA_MAX_DATA_SZ          U16_MAX
 166
 167 /*
 168  * SA2UL can provide unpredictable results with packet sizes that fall
 169  * the following range, so avoid using it.
 170  */
 171 #define SA_UNSAFE_DATA_SZ_MIN   240
 172 #define SA_UNSAFE_DATA_SZ_MAX   256
 173
 174 struct sa_match_data;
 175
 176 /**
 177  * struct sa_crypto_data - Crypto driver instance data
 178  * @base: Base address of the register space
 179  * @soc_data: Pointer to SoC specific data
 180  * @pdev: Platform device pointer
 181  * @sc_pool: security context pool
 182  * @dev: Device pointer
 183  * @scid_lock: secure context ID lock
 184  * @sc_id_start: starting index for SC ID
 185  * @sc_id_end: Ending index for SC ID
 186  * @sc_id: Security Context ID
 187  * @ctx_bm: Bitmap to keep track of Security context ID's
 188  * @ctx: SA tfm context pointer
 189  * @dma_rx1: Pointer to DMA rx channel for sizes < 256 Bytes
 190  * @dma_rx2: Pointer to DMA rx channel for sizes > 256 Bytes
 191  * @dma_tx: Pointer to DMA TX channel
 192  */
 193 struct sa_crypto_data {
 194         void __iomem *base;
 195         const struct sa_match_data *match_data;
 196         struct platform_device  *pdev;
 197         struct dma_pool         *sc_pool;
 198         struct device *dev;
 199         spinlock_t      scid_lock; /* lock for SC-ID allocation */
 200         /* Security context data */
 201         u16             sc_id_start;
 202         u16             sc_id_end;
 203         u16             sc_id;
 204         unsigned long   ctx_bm[DIV_ROUND_UP(SA_MAX_NUM_CTX,
 205                                 BITS_PER_LONG)];
 206         struct sa_tfm_ctx       *ctx;
 207         struct dma_chan         *dma_rx1;
 208         struct dma_chan         *dma_rx2;
 209         struct dma_chan         *dma_tx;
 210 };
 211
 212 /**
 213  * struct sa_cmdl_param_info: Command label parameters info
 214  * @index: Index of the parameter in the command label format
 215  * @offset: the offset of the parameter
 216  * @size: Size of the parameter
 217  */
 218 struct sa_cmdl_param_info {
 219         u16     index;
 220         u16     offset;
 221         u16     size;
 222 };
 223
 224 /* Maximum length of Auxiliary data in 32bit words */
 225 #define SA_MAX_AUX_DATA_WORDS   8
 226
 227 /**
 228  * struct sa_cmdl_upd_info: Command label updation info
 229  * @flags: flags in command label
 230  * @submode: Encryption submodes
 231  * @enc_size: Size of first pass encryption size
 232  * @enc_size2: Size of second pass encryption size
 233  * @enc_offset: Encryption payload offset in the packet
 234  * @enc_iv: Encryption initialization vector for pass2
 235  * @enc_iv2: Encryption initialization vector for pass2
 236  * @aad: Associated data
 237  * @payload: Payload info
 238  * @auth_size: Authentication size for pass 1
 239  * @auth_size2: Authentication size for pass 2
 240  * @auth_offset: Authentication payload offset
 241  * @auth_iv: Authentication initialization vector
 242  * @aux_key_info: Authentication aux key information
 243  * @aux_key: Aux key for authentication
 244  */
 245 struct sa_cmdl_upd_info {
 246         u16     flags;
 247         u16     submode;
 248         struct sa_cmdl_param_info       enc_size;
 249         struct sa_cmdl_param_info       enc_size2;
 250         struct sa_cmdl_param_info       enc_offset;
 251         struct sa_cmdl_param_info       enc_iv;
 252         struct sa_cmdl_param_info       enc_iv2;
 253         struct sa_cmdl_param_info       aad;
 254         struct sa_cmdl_param_info       payload;
 255         struct sa_cmdl_param_info       auth_size;
 256         struct sa_cmdl_param_info       auth_size2;
 257         struct sa_cmdl_param_info       auth_offset;
 258         struct sa_cmdl_param_info       auth_iv;
 259         struct sa_cmdl_param_info       aux_key_info;
 260         u32                             aux_key[SA_MAX_AUX_DATA_WORDS];
 261 };
 262
 263 /*
 264  * Number of 32bit words appended after the command label
 265  * in PSDATA to identify the crypto request context.
 266  * word-0: Request type
 267  * word-1: pointer to request
 268  */
 269 #define SA_PSDATA_CTX_WORDS 4
 270
 271 /* Maximum size of Command label in 32 words */
 272 #define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS)
 273
 274 /**
 275  * struct sa_ctx_info: SA context information
 276  * @sc: Pointer to security context
 277  * @sc_phys: Security context physical address that is passed on to SA2UL
 278  * @sc_id: Security context ID
 279  * @cmdl_size: Command label size
 280  * @cmdl: Command label for a particular iteration
 281  * @cmdl_upd_info: structure holding command label updation info
 282  * @epib: Extended protocol information block words
 283  */
 284 struct sa_ctx_info {
 285         u8              *sc;
 286         dma_addr_t      sc_phys;
 287         u16             sc_id;
 288         u16             cmdl_size;
 289         u32             cmdl[SA_MAX_CMDL_WORDS];
 290         struct sa_cmdl_upd_info cmdl_upd_info;
 291         /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */
 292         u32             epib[SA_DMA_NUM_EPIB_WORDS];
 293 };
 294
 295 /**
 296  * struct sa_tfm_ctx: TFM context structure
 297  * @dev_data: struct sa_crypto_data pointer
 298  * @enc: struct sa_ctx_info for encryption
 299  * @dec: struct sa_ctx_info for decryption
 300  * @keylen: encrption/decryption keylength
 301  * @iv_idx: Initialization vector index
 302  * @key: encryption key
 303  * @fallback: SW fallback algorithm
 304  */
 305 struct sa_tfm_ctx {
 306         struct sa_crypto_data *dev_data;
 307         struct sa_ctx_info enc;
 308         struct sa_ctx_info dec;
 309         struct sa_ctx_info auth;
 310         int keylen;
 311         int iv_idx;
 312         u32 key[AES_KEYSIZE_256 / sizeof(u32)];
 313         u8 authkey[SHA512_BLOCK_SIZE];
 314         struct crypto_shash     *shash;
 315         /* for fallback */
 316         union {
 317                 struct crypto_skcipher          *skcipher;
 318                 struct crypto_ahash             *ahash;
 319                 struct crypto_aead              *aead;
 320         } fallback;
 321 };
 322
 323 /**
 324  * struct sa_sha_req_ctx: Structure used for sha request
 325  * @dev_data: struct sa_crypto_data pointer
 326  * @cmdl: Complete command label with psdata and epib included
 327  * @fallback_req: SW fallback request container
 328  */
 329 struct sa_sha_req_ctx {
 330         struct sa_crypto_data   *dev_data;
 331         u32                     cmdl[SA_MAX_CMDL_WORDS + SA_PSDATA_CTX_WORDS];
 332         struct ahash_request    fallback_req;
 333 };
 334
 335 enum sa_submode {
 336         SA_MODE_GEN = 0,
 337         SA_MODE_CCM,
 338         SA_MODE_GCM,
 339         SA_MODE_GMAC
 340 };
 341
 342 /* Encryption algorithms */
 343 enum sa_ealg_id {
 344         SA_EALG_ID_NONE = 0,        /* No encryption */
 345         SA_EALG_ID_NULL,            /* NULL encryption */
 346         SA_EALG_ID_AES_CTR,         /* AES Counter mode */
 347         SA_EALG_ID_AES_F8,          /* AES F8 mode */
 348         SA_EALG_ID_AES_CBC,         /* AES CBC mode */
 349         SA_EALG_ID_DES_CBC,         /* DES CBC mode */
 350         SA_EALG_ID_3DES_CBC,        /* 3DES CBC mode */
 351         SA_EALG_ID_CCM,             /* Counter with CBC-MAC mode */
 352         SA_EALG_ID_GCM,             /* Galois Counter mode */
 353         SA_EALG_ID_AES_ECB,
 354         SA_EALG_ID_LAST
 355 };
 356
 357 /* Authentication algorithms */
 358 enum sa_aalg_id {
 359         SA_AALG_ID_NONE = 0,      /* No Authentication  */
 360         SA_AALG_ID_NULL = SA_EALG_ID_LAST, /* NULL Authentication  */
 361         SA_AALG_ID_MD5,           /* MD5 mode */
 362         SA_AALG_ID_SHA1,          /* SHA1 mode */
 363         SA_AALG_ID_SHA2_224,      /* 224-bit SHA2 mode */
 364         SA_AALG_ID_SHA2_256,      /* 256-bit SHA2 mode */
 365         SA_AALG_ID_SHA2_512,      /* 512-bit SHA2 mode */
 366         SA_AALG_ID_HMAC_MD5,      /* HMAC with MD5 mode */
 367         SA_AALG_ID_HMAC_SHA1,     /* HMAC with SHA1 mode */
 368         SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */
 369         SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */
 370         SA_AALG_ID_GMAC,          /* Galois Message Auth. Code mode */
 371         SA_AALG_ID_CMAC,          /* Cipher-based Mes. Auth. Code mode */
 372         SA_AALG_ID_CBC_MAC,       /* Cipher Block Chaining */
 373         SA_AALG_ID_AES_XCBC       /* AES Extended Cipher Block Chaining */
 374 };
 375
 376 /*
 377  * Mode control engine algorithms used to index the
 378  * mode control instruction tables
 379  */
 380 enum sa_eng_algo_id {
 381         SA_ENG_ALGO_ECB = 0,
 382         SA_ENG_ALGO_CBC,
 383         SA_ENG_ALGO_CFB,
 384         SA_ENG_ALGO_OFB,
 385         SA_ENG_ALGO_CTR,
 386         SA_ENG_ALGO_F8,
 387         SA_ENG_ALGO_F8F9,
 388         SA_ENG_ALGO_GCM,
 389         SA_ENG_ALGO_GMAC,
 390         SA_ENG_ALGO_CCM,
 391         SA_ENG_ALGO_CMAC,
 392         SA_ENG_ALGO_CBCMAC,
 393         SA_NUM_ENG_ALGOS
 394 };
 395
 396 /**
 397  * struct sa_eng_info: Security accelerator engine info
 398  * @eng_id: Engine ID
 399  * @sc_size: security context size
 400  */
 401 struct sa_eng_info {
 402         u8      eng_id;
 403         u16     sc_size;
 404 };
 405
 406 #endif /* _K3_SA2UL_ */