drivers/dma/Kconfig

   1 #
   2 # DMA engine configuration
   3 #
   4
   5 menuconfig DMADEVICES
   6         bool "DMA Engine support"
   7         depends on HAS_DMA
   8         help
   9           DMA engines can do asynchronous data transfers without
  10           involving the host CPU.  Currently, this framework can be
  11           used to offload memory copies in the network stack and
  12           RAID operations in the MD driver.  This menu only presents
  13           DMA Device drivers supported by the configured arch, it may
  14           be empty in some cases.
  15
  16 config DMADEVICES_DEBUG
  17         bool "DMA Engine debugging"
  18         depends on DMADEVICES != n
  19         help
  20           This is an option for use by developers; most people should
  21           say N here.  This enables DMA engine core and driver debugging.
  22
  23 config DMADEVICES_VDEBUG
  24         bool "DMA Engine verbose debugging"
  25         depends on DMADEVICES_DEBUG != n
  26         help
  27           This is an option for use by developers; most people should
  28           say N here.  This enables deeper (more verbose) debugging of
  29           the DMA engine core and drivers.
  30
  31
  32 if DMADEVICES
  33
  34 comment "DMA Devices"
  35
  36 config ASYNC_TX_DISABLE_CHANNEL_SWITCH
  37         bool
  38
  39 config INTEL_IOATDMA
  40         tristate "Intel I/OAT DMA support"
  41         depends on PCI && X86
  42         select DMA_ENGINE
  43         select DCA
  44         select ASYNC_TX_DISABLE_CHANNEL_SWITCH
  45         select ASYNC_TX_DISABLE_PQ_VAL_DMA
  46         select ASYNC_TX_DISABLE_XOR_VAL_DMA
  47         help
  48           Enable support for the Intel(R) I/OAT DMA engine present
  49           in recent Intel Xeon chipsets.
  50
  51           Say Y here if you have such a chipset.
  52
  53           If unsure, say N.
  54
  55 config INTEL_IOP_ADMA
  56         tristate "Intel IOP ADMA support"
  57         depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  58         select DMA_ENGINE
  59         help
  60           Enable support for the Intel(R) IOP Series RAID engines.
  61
  62 config DW_DMAC
  63         tristate "Synopsys DesignWare AHB DMA support"
  64         depends on AVR32
  65         select DMA_ENGINE
  66         default y if CPU_AT32AP7000
  67         help
  68           Support the Synopsys DesignWare AHB DMA controller.  This
  69           can be integrated in chips such as the Atmel AT32ap7000.
  70
  71 config AT_HDMAC
  72         tristate "Atmel AHB DMA support"
  73         depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
  74         select DMA_ENGINE
  75         help
  76           Support the Atmel AHB DMA controller.  This can be integrated in
  77           chips such as the Atmel AT91SAM9RL.
  78
  79 config FSL_DMA
  80         tristate "Freescale Elo and Elo Plus DMA support"
  81         depends on FSL_SOC
  82         select DMA_ENGINE
  83         ---help---
  84           Enable support for the Freescale Elo and Elo Plus DMA controllers.
  85           The Elo is the DMA controller on some 82xx and 83xx parts, and the
  86           Elo Plus is the DMA controller on 85xx and 86xx parts.
  87
  88 config MPC512X_DMA
  89         tristate "Freescale MPC512x built-in DMA engine support"
  90         depends on PPC_MPC512x
  91         select DMA_ENGINE
  92         ---help---
  93           Enable support for the Freescale MPC512x built-in DMA engine.
  94
  95 config MV_XOR
  96         bool "Marvell XOR engine support"
  97         depends on PLAT_ORION
  98         select DMA_ENGINE
  99         ---help---
 100           Enable support for the Marvell XOR engine.
 101
 102 config MX3_IPU
 103         bool "MX3x Image Processing Unit support"
 104         depends on ARCH_MX3
 105         select DMA_ENGINE
 106         default y
 107         help
 108           If you plan to use the Image Processing unit in the i.MX3x, say
 109           Y here. If unsure, select Y.
 110
 111 config MX3_IPU_IRQS
 112         int "Number of dynamically mapped interrupts for IPU"
 113         depends on MX3_IPU
 114         range 2 137
 115         default 4
 116         help
 117           Out of 137 interrupt sources on i.MX31 IPU only very few are used.
 118           To avoid bloating the irq_desc[] array we allocate a sufficient
 119           number of IRQ slots and map them dynamically to specific sources.
 120
 121 config TXX9_DMAC
 122         tristate "Toshiba TXx9 SoC DMA support"
 123         depends on MACH_TX49XX || MACH_TX39XX
 124         select DMA_ENGINE
 125         help
 126           Support the TXx9 SoC internal DMA controller.  This can be
 127           integrated in chips such as the Toshiba TX4927/38/39.
 128
 129 config SH_DMAE
 130         tristate "Renesas SuperH DMAC support"
 131         depends on SUPERH && SH_DMA
 132         depends on !SH_DMA_API
 133         select DMA_ENGINE
 134         help
 135           Enable support for the Renesas SuperH DMA controllers.
 136
 137 config COH901318
 138         bool "ST-Ericsson COH901318 DMA support"
 139         select DMA_ENGINE
 140         depends on ARCH_U300
 141         help
 142           Enable support for ST-Ericsson COH 901 318 DMA.
 143
 144 config STE_DMA40
 145         bool "ST-Ericsson DMA40 support"
 146         depends on ARCH_U8500
 147         select DMA_ENGINE
 148         help
 149           Support for ST-Ericsson DMA40 controller
 150
 151 config AMCC_PPC440SPE_ADMA
 152         tristate "AMCC PPC440SPe ADMA support"
 153         depends on 440SPe || 440SP
 154         select DMA_ENGINE
 155         select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
 156         help
 157           Enable support for the AMCC PPC440SPe RAID engines.
 158
 159 config TIMB_DMA
 160         tristate "Timberdale FPGA DMA support"
 161         depends on MFD_TIMBERDALE || HAS_IOMEM
 162         select DMA_ENGINE
 163         help
 164           Enable support for the Timberdale FPGA DMA engine.
 165
 166 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
 167         bool
 168
 169 config DMA_ENGINE
 170         bool
 171
 172 comment "DMA Clients"
 173         depends on DMA_ENGINE
 174
 175 config NET_DMA
 176         bool "Network: TCP receive copy offload"
 177         depends on DMA_ENGINE && NET
 178         default (INTEL_IOATDMA || FSL_DMA)
 179         help
 180           This enables the use of DMA engines in the network stack to
 181           offload receive copy-to-user operations, freeing CPU cycles.
 182
 183           Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
 184           say N.
 185
 186 config ASYNC_TX_DMA
 187         bool "Async_tx: Offload support for the async_tx api"
 188         depends on DMA_ENGINE
 189         help
 190           This allows the async_tx api to take advantage of offload engines for
 191           memcpy, memset, xor, and raid6 p+q operations.  If your platform has
 192           a dma engine that can perform raid operations and you have enabled
 193           MD_RAID456 say Y.
 194
 195           If unsure, say N.
 196
 197 config DMATEST
 198         tristate "DMA Test client"
 199         depends on DMA_ENGINE
 200         help
 201           Simple DMA test client. Say N unless you're debugging a
 202           DMA Device driver.
 203
 204 endif