drivers/dma-buf/dma-fence.c

   1 /*
   2  * Fence mechanism for dma-buf and to allow for asynchronous dma access
   3  *
   4  * Copyright (C) 2012 Canonical Ltd
   5  * Copyright (C) 2012 Texas Instruments
   6  *
   7  * Authors:
   8  * Rob Clark <robdclark@gmail.com>
   9  * Maarten Lankhorst <maarten.lankhorst@canonical.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms of the GNU General Public License version 2 as published by
  13  * the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but WITHOUT
  16  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  18  * more details.
  19  */
  20
  21 #include <linux/slab.h>
  22 #include <linux/export.h>
  23 #include <linux/atomic.h>
  24 #include <linux/dma-fence.h>
  25 #include <linux/sched/signal.h>
  26
  27 #define CREATE_TRACE_POINTS
  28 #include <trace/events/dma_fence.h>
  29
  30 EXPORT_TRACEPOINT_SYMBOL(dma_fence_annotate_wait_on);
  31 EXPORT_TRACEPOINT_SYMBOL(dma_fence_emit);
  32 EXPORT_TRACEPOINT_SYMBOL(dma_fence_enable_signal);
  33
  34 /*
  35  * fence context counter: each execution context should have its own
  36  * fence context, this allows checking if fences belong to the same
  37  * context or not. One device can have multiple separate contexts,
  38  * and they're used if some engine can run independently of another.
  39  */
  40 static atomic64_t dma_fence_context_counter = ATOMIC64_INIT(0);
  41
  42 /**
  43  * dma_fence_context_alloc - allocate an array of fence contexts
  44  * @num:        [in]    amount of contexts to allocate
  45  *
  46  * This function will return the first index of the number of fences allocated.
  47  * The fence context is used for setting fence->context to a unique number.
  48  */
  49 u64 dma_fence_context_alloc(unsigned num)
  50 {
  51         BUG_ON(!num);
  52         return atomic64_add_return(num, &dma_fence_context_counter) - num;
  53 }
  54 EXPORT_SYMBOL(dma_fence_context_alloc);
  55
  56 /**
  57  * dma_fence_signal_locked - signal completion of a fence
  58  * @fence: the fence to signal
  59  *
  60  * Signal completion for software callbacks on a fence, this will unblock
  61  * dma_fence_wait() calls and run all the callbacks added with
  62  * dma_fence_add_callback(). Can be called multiple times, but since a fence
  63  * can only go from unsignaled to signaled state, it will only be effective
  64  * the first time.
  65  *
  66  * Unlike dma_fence_signal, this function must be called with fence->lock held.
  67  */
  68 int dma_fence_signal_locked(struct dma_fence *fence)
  69 {
  70         struct dma_fence_cb *cur, *tmp;
  71         int ret = 0;
  72
  73         lockdep_assert_held(fence->lock);
  74
  75         if (WARN_ON(!fence))
  76                 return -EINVAL;
  77
  78         if (!ktime_to_ns(fence->timestamp)) {
  79                 fence->timestamp = ktime_get();
  80                 smp_mb__before_atomic();
  81         }
  82
  83         if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
  84                 ret = -EINVAL;
  85
  86                 /*
  87                  * we might have raced with the unlocked dma_fence_signal,
  88                  * still run through all callbacks
  89                  */
  90         } else
  91                 trace_dma_fence_signaled(fence);
  92
  93         list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
  94                 list_del_init(&cur->node);
  95                 cur->func(fence, cur);
  96         }
  97         return ret;
  98 }
  99 EXPORT_SYMBOL(dma_fence_signal_locked);
 100
 101 /**
 102  * dma_fence_signal - signal completion of a fence
 103  * @fence: the fence to signal
 104  *
 105  * Signal completion for software callbacks on a fence, this will unblock
 106  * dma_fence_wait() calls and run all the callbacks added with
 107  * dma_fence_add_callback(). Can be called multiple times, but since a fence
 108  * can only go from unsignaled to signaled state, it will only be effective
 109  * the first time.
 110  */
 111 int dma_fence_signal(struct dma_fence *fence)
 112 {
 113         unsigned long flags;
 114
 115         if (!fence)
 116                 return -EINVAL;
 117
 118         if (!ktime_to_ns(fence->timestamp)) {
 119                 fence->timestamp = ktime_get();
 120                 smp_mb__before_atomic();
 121         }
 122
 123         if (test_and_set_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
 124                 return -EINVAL;
 125
 126         trace_dma_fence_signaled(fence);
 127
 128         if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &fence->flags)) {
 129                 struct dma_fence_cb *cur, *tmp;
 130
 131                 spin_lock_irqsave(fence->lock, flags);
 132                 list_for_each_entry_safe(cur, tmp, &fence->cb_list, node) {
 133                         list_del_init(&cur->node);
 134                         cur->func(fence, cur);
 135                 }
 136                 spin_unlock_irqrestore(fence->lock, flags);
 137         }
 138         return 0;
 139 }
 140 EXPORT_SYMBOL(dma_fence_signal);
 141
 142 /**
 143  * dma_fence_wait_timeout - sleep until the fence gets signaled
 144  * or until timeout elapses
 145  * @fence:      [in]    the fence to wait on
 146  * @intr:       [in]    if true, do an interruptible wait
 147  * @timeout:    [in]    timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
 148  *
 149  * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
 150  * remaining timeout in jiffies on success. Other error values may be
 151  * returned on custom implementations.
 152  *
 153  * Performs a synchronous wait on this fence. It is assumed the caller
 154  * directly or indirectly (buf-mgr between reservation and committing)
 155  * holds a reference to the fence, otherwise the fence might be
 156  * freed before return, resulting in undefined behavior.
 157  */
 158 signed long
 159 dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout)
 160 {
 161         signed long ret;
 162
 163         if (WARN_ON(timeout < 0))
 164                 return -EINVAL;
 165
 166         trace_dma_fence_wait_start(fence);
 167         ret = fence->ops->wait(fence, intr, timeout);
 168         trace_dma_fence_wait_end(fence);
 169         return ret;
 170 }
 171 EXPORT_SYMBOL(dma_fence_wait_timeout);
 172
 173 void dma_fence_release(struct kref *kref)
 174 {
 175         struct dma_fence *fence =
 176                 container_of(kref, struct dma_fence, refcount);
 177
 178         trace_dma_fence_destroy(fence);
 179
 180         BUG_ON(!list_empty(&fence->cb_list));
 181
 182         if (fence->ops->release)
 183                 fence->ops->release(fence);
 184         else
 185                 dma_fence_free(fence);
 186 }
 187 EXPORT_SYMBOL(dma_fence_release);
 188
 189 void dma_fence_free(struct dma_fence *fence)
 190 {
 191         kfree_rcu(fence, rcu);
 192 }
 193 EXPORT_SYMBOL(dma_fence_free);
 194
 195 /**
 196  * dma_fence_enable_sw_signaling - enable signaling on fence
 197  * @fence:      [in]    the fence to enable
 198  *
 199  * this will request for sw signaling to be enabled, to make the fence
 200  * complete as soon as possible
 201  */
 202 void dma_fence_enable_sw_signaling(struct dma_fence *fence)
 203 {
 204         unsigned long flags;
 205
 206         if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
 207                               &fence->flags) &&
 208             !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
 209                 trace_dma_fence_enable_signal(fence);
 210
 211                 spin_lock_irqsave(fence->lock, flags);
 212
 213                 if (!fence->ops->enable_signaling(fence))
 214                         dma_fence_signal_locked(fence);
 215
 216                 spin_unlock_irqrestore(fence->lock, flags);
 217         }
 218 }
 219 EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
 220
 221 /**
 222  * dma_fence_add_callback - add a callback to be called when the fence
 223  * is signaled
 224  * @fence:      [in]    the fence to wait on
 225  * @cb:         [in]    the callback to register
 226  * @func:       [in]    the function to call
 227  *
 228  * cb will be initialized by dma_fence_add_callback, no initialization
 229  * by the caller is required. Any number of callbacks can be registered
 230  * to a fence, but a callback can only be registered to one fence at a time.
 231  *
 232  * Note that the callback can be called from an atomic context.  If
 233  * fence is already signaled, this function will return -ENOENT (and
 234  * *not* call the callback)
 235  *
 236  * Add a software callback to the fence. Same restrictions apply to
 237  * refcount as it does to dma_fence_wait, however the caller doesn't need to
 238  * keep a refcount to fence afterwards: when software access is enabled,
 239  * the creator of the fence is required to keep the fence alive until
 240  * after it signals with dma_fence_signal. The callback itself can be called
 241  * from irq context.
 242  *
 243  * Returns 0 in case of success, -ENOENT if the fence is already signaled
 244  * and -EINVAL in case of error.
 245  */
 246 int dma_fence_add_callback(struct dma_fence *fence, struct dma_fence_cb *cb,
 247                            dma_fence_func_t func)
 248 {
 249         unsigned long flags;
 250         int ret = 0;
 251         bool was_set;
 252
 253         if (WARN_ON(!fence || !func))
 254                 return -EINVAL;
 255
 256         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
 257                 INIT_LIST_HEAD(&cb->node);
 258                 return -ENOENT;
 259         }
 260
 261         spin_lock_irqsave(fence->lock, flags);
 262
 263         was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
 264                                    &fence->flags);
 265
 266         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
 267                 ret = -ENOENT;
 268         else if (!was_set) {
 269                 trace_dma_fence_enable_signal(fence);
 270
 271                 if (!fence->ops->enable_signaling(fence)) {
 272                         dma_fence_signal_locked(fence);
 273                         ret = -ENOENT;
 274                 }
 275         }
 276
 277         if (!ret) {
 278                 cb->func = func;
 279                 list_add_tail(&cb->node, &fence->cb_list);
 280         } else
 281                 INIT_LIST_HEAD(&cb->node);
 282         spin_unlock_irqrestore(fence->lock, flags);
 283
 284         return ret;
 285 }
 286 EXPORT_SYMBOL(dma_fence_add_callback);
 287
 288 /**
 289  * dma_fence_get_status - returns the status upon completion
 290  * @fence: [in] the dma_fence to query
 291  *
 292  * This wraps dma_fence_get_status_locked() to return the error status
 293  * condition on a signaled fence. See dma_fence_get_status_locked() for more
 294  * details.
 295  *
 296  * Returns 0 if the fence has not yet been signaled, 1 if the fence has
 297  * been signaled without an error condition, or a negative error code
 298  * if the fence has been completed in err.
 299  */
 300 int dma_fence_get_status(struct dma_fence *fence)
 301 {
 302         unsigned long flags;
 303         int status;
 304
 305         spin_lock_irqsave(fence->lock, flags);
 306         status = dma_fence_get_status_locked(fence);
 307         spin_unlock_irqrestore(fence->lock, flags);
 308
 309         return status;
 310 }
 311 EXPORT_SYMBOL(dma_fence_get_status);
 312
 313 /**
 314  * dma_fence_remove_callback - remove a callback from the signaling list
 315  * @fence:      [in]    the fence to wait on
 316  * @cb:         [in]    the callback to remove
 317  *
 318  * Remove a previously queued callback from the fence. This function returns
 319  * true if the callback is successfully removed, or false if the fence has
 320  * already been signaled.
 321  *
 322  * *WARNING*:
 323  * Cancelling a callback should only be done if you really know what you're
 324  * doing, since deadlocks and race conditions could occur all too easily. For
 325  * this reason, it should only ever be done on hardware lockup recovery,
 326  * with a reference held to the fence.
 327  */
 328 bool
 329 dma_fence_remove_callback(struct dma_fence *fence, struct dma_fence_cb *cb)
 330 {
 331         unsigned long flags;
 332         bool ret;
 333
 334         spin_lock_irqsave(fence->lock, flags);
 335
 336         ret = !list_empty(&cb->node);
 337         if (ret)
 338                 list_del_init(&cb->node);
 339
 340         spin_unlock_irqrestore(fence->lock, flags);
 341
 342         return ret;
 343 }
 344 EXPORT_SYMBOL(dma_fence_remove_callback);
 345
 346 struct default_wait_cb {
 347         struct dma_fence_cb base;
 348         struct task_struct *task;
 349 };
 350
 351 static void
 352 dma_fence_default_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
 353 {
 354         struct default_wait_cb *wait =
 355                 container_of(cb, struct default_wait_cb, base);
 356
 357         wake_up_state(wait->task, TASK_NORMAL);
 358 }
 359
 360 /**
 361  * dma_fence_default_wait - default sleep until the fence gets signaled
 362  * or until timeout elapses
 363  * @fence:      [in]    the fence to wait on
 364  * @intr:       [in]    if true, do an interruptible wait
 365  * @timeout:    [in]    timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
 366  *
 367  * Returns -ERESTARTSYS if interrupted, 0 if the wait timed out, or the
 368  * remaining timeout in jiffies on success. If timeout is zero the value one is
 369  * returned if the fence is already signaled for consistency with other
 370  * functions taking a jiffies timeout.
 371  */
 372 signed long
 373 dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout)
 374 {
 375         struct default_wait_cb cb;
 376         unsigned long flags;
 377         signed long ret = timeout ? timeout : 1;
 378         bool was_set;
 379
 380         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
 381                 return ret;
 382
 383         spin_lock_irqsave(fence->lock, flags);
 384
 385         if (intr && signal_pending(current)) {
 386                 ret = -ERESTARTSYS;
 387                 goto out;
 388         }
 389
 390         was_set = test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
 391                                    &fence->flags);
 392
 393         if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
 394                 goto out;
 395
 396         if (!was_set) {
 397                 trace_dma_fence_enable_signal(fence);
 398
 399                 if (!fence->ops->enable_signaling(fence)) {
 400                         dma_fence_signal_locked(fence);
 401                         goto out;
 402                 }
 403         }
 404
 405         if (!timeout) {
 406                 ret = 0;
 407                 goto out;
 408         }
 409
 410         cb.base.func = dma_fence_default_wait_cb;
 411         cb.task = current;
 412         list_add(&cb.base.node, &fence->cb_list);
 413
 414         while (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) && ret > 0) {
 415                 if (intr)
 416                         __set_current_state(TASK_INTERRUPTIBLE);
 417                 else
 418                         __set_current_state(TASK_UNINTERRUPTIBLE);
 419                 spin_unlock_irqrestore(fence->lock, flags);
 420
 421                 ret = schedule_timeout(ret);
 422
 423                 spin_lock_irqsave(fence->lock, flags);
 424                 if (ret > 0 && intr && signal_pending(current))
 425                         ret = -ERESTARTSYS;
 426         }
 427
 428         if (!list_empty(&cb.base.node))
 429                 list_del(&cb.base.node);
 430         __set_current_state(TASK_RUNNING);
 431
 432 out:
 433         spin_unlock_irqrestore(fence->lock, flags);
 434         return ret;
 435 }
 436 EXPORT_SYMBOL(dma_fence_default_wait);
 437
 438 static bool
 439 dma_fence_test_signaled_any(struct dma_fence **fences, uint32_t count,
 440                             uint32_t *idx)
 441 {
 442         int i;
 443
 444         for (i = 0; i < count; ++i) {
 445                 struct dma_fence *fence = fences[i];
 446                 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
 447                         if (idx)
 448                                 *idx = i;
 449                         return true;
 450                 }
 451         }
 452         return false;
 453 }
 454
 455 /**
 456  * dma_fence_wait_any_timeout - sleep until any fence gets signaled
 457  * or until timeout elapses
 458  * @fences:     [in]    array of fences to wait on
 459  * @count:      [in]    number of fences to wait on
 460  * @intr:       [in]    if true, do an interruptible wait
 461  * @timeout:    [in]    timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
 462  * @idx:       [out]    the first signaled fence index, meaningful only on
 463  *                      positive return
 464  *
 465  * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
 466  * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
 467  * on success.
 468  *
 469  * Synchronous waits for the first fence in the array to be signaled. The
 470  * caller needs to hold a reference to all fences in the array, otherwise a
 471  * fence might be freed before return, resulting in undefined behavior.
 472  */
 473 signed long
 474 dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count,
 475                            bool intr, signed long timeout, uint32_t *idx)
 476 {
 477         struct default_wait_cb *cb;
 478         signed long ret = timeout;
 479         unsigned i;
 480
 481         if (WARN_ON(!fences || !count || timeout < 0))
 482                 return -EINVAL;
 483
 484         if (timeout == 0) {
 485                 for (i = 0; i < count; ++i)
 486                         if (dma_fence_is_signaled(fences[i])) {
 487                                 if (idx)
 488                                         *idx = i;
 489                                 return 1;
 490                         }
 491
 492                 return 0;
 493         }
 494
 495         cb = kcalloc(count, sizeof(struct default_wait_cb), GFP_KERNEL);
 496         if (cb == NULL) {
 497                 ret = -ENOMEM;
 498                 goto err_free_cb;
 499         }
 500
 501         for (i = 0; i < count; ++i) {
 502                 struct dma_fence *fence = fences[i];
 503
 504                 if (fence->ops->wait != dma_fence_default_wait) {
 505                         ret = -EINVAL;
 506                         goto fence_rm_cb;
 507                 }
 508
 509                 cb[i].task = current;
 510                 if (dma_fence_add_callback(fence, &cb[i].base,
 511                                            dma_fence_default_wait_cb)) {
 512                         /* This fence is already signaled */
 513                         if (idx)
 514                                 *idx = i;
 515                         goto fence_rm_cb;
 516                 }
 517         }
 518
 519         while (ret > 0) {
 520                 if (intr)
 521                         set_current_state(TASK_INTERRUPTIBLE);
 522                 else
 523                         set_current_state(TASK_UNINTERRUPTIBLE);
 524
 525                 if (dma_fence_test_signaled_any(fences, count, idx))
 526                         break;
 527
 528                 ret = schedule_timeout(ret);
 529
 530                 if (ret > 0 && intr && signal_pending(current))
 531                         ret = -ERESTARTSYS;
 532         }
 533
 534         __set_current_state(TASK_RUNNING);
 535
 536 fence_rm_cb:
 537         while (i-- > 0)
 538                 dma_fence_remove_callback(fences[i], &cb[i].base);
 539
 540 err_free_cb:
 541         kfree(cb);
 542
 543         return ret;
 544 }
 545 EXPORT_SYMBOL(dma_fence_wait_any_timeout);
 546
 547 /**
 548  * dma_fence_init - Initialize a custom fence.
 549  * @fence:      [in]    the fence to initialize
 550  * @ops:        [in]    the dma_fence_ops for operations on this fence
 551  * @lock:       [in]    the irqsafe spinlock to use for locking this fence
 552  * @context:    [in]    the execution context this fence is run on
 553  * @seqno:      [in]    a linear increasing sequence number for this context
 554  *
 555  * Initializes an allocated fence, the caller doesn't have to keep its
 556  * refcount after committing with this fence, but it will need to hold a
 557  * refcount again if dma_fence_ops.enable_signaling gets called. This can
 558  * be used for other implementing other types of fence.
 559  *
 560  * context and seqno are used for easy comparison between fences, allowing
 561  * to check which fence is later by simply using dma_fence_later.
 562  */
 563 void
 564 dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
 565                spinlock_t *lock, u64 context, unsigned seqno)
 566 {
 567         BUG_ON(!lock);
 568         BUG_ON(!ops || !ops->wait || !ops->enable_signaling ||
 569                !ops->get_driver_name || !ops->get_timeline_name);
 570
 571         kref_init(&fence->refcount);
 572         fence->ops = ops;
 573         INIT_LIST_HEAD(&fence->cb_list);
 574         fence->lock = lock;
 575         fence->context = context;
 576         fence->seqno = seqno;
 577         fence->flags = 0UL;
 578         fence->error = 0;
 579
 580         trace_dma_fence_init(fence);
 581 }
 582 EXPORT_SYMBOL(dma_fence_init);