2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/ctype.h>
29 #include <linux/edac.h>
30 #include <linux/bitops.h>
31 #include <asm/uaccess.h>
34 #include "edac_core.h"
35 #include "edac_module.h"
37 #define CREATE_TRACE_POINTS
38 #define TRACE_INCLUDE_PATH ../../include/ras
39 #include <ras/ras_event.h>
41 /* lock to memory controller's control array */
42 static DEFINE_MUTEX(mem_ctls_mutex
);
43 static LIST_HEAD(mc_devices
);
45 unsigned edac_dimm_info_location(struct dimm_info
*dimm
, char *buf
,
48 struct mem_ctl_info
*mci
= dimm
->mci
;
52 for (i
= 0; i
< mci
->n_layers
; i
++) {
53 n
= snprintf(p
, len
, "%s %d ",
54 edac_layer_name
[mci
->layers
[i
].type
],
66 #ifdef CONFIG_EDAC_DEBUG
68 static void edac_mc_dump_channel(struct rank_info
*chan
)
70 edac_dbg(4, " channel->chan_idx = %d\n", chan
->chan_idx
);
71 edac_dbg(4, " channel = %p\n", chan
);
72 edac_dbg(4, " channel->csrow = %p\n", chan
->csrow
);
73 edac_dbg(4, " channel->dimm = %p\n", chan
->dimm
);
76 static void edac_mc_dump_dimm(struct dimm_info
*dimm
, int number
)
80 edac_dimm_info_location(dimm
, location
, sizeof(location
));
82 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
83 dimm
->mci
->mem_is_per_rank
? "rank" : "dimm",
84 number
, location
, dimm
->csrow
, dimm
->cschannel
);
85 edac_dbg(4, " dimm = %p\n", dimm
);
86 edac_dbg(4, " dimm->label = '%s'\n", dimm
->label
);
87 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm
->nr_pages
);
88 edac_dbg(4, " dimm->grain = %d\n", dimm
->grain
);
89 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm
->nr_pages
);
92 static void edac_mc_dump_csrow(struct csrow_info
*csrow
)
94 edac_dbg(4, "csrow->csrow_idx = %d\n", csrow
->csrow_idx
);
95 edac_dbg(4, " csrow = %p\n", csrow
);
96 edac_dbg(4, " csrow->first_page = 0x%lx\n", csrow
->first_page
);
97 edac_dbg(4, " csrow->last_page = 0x%lx\n", csrow
->last_page
);
98 edac_dbg(4, " csrow->page_mask = 0x%lx\n", csrow
->page_mask
);
99 edac_dbg(4, " csrow->nr_channels = %d\n", csrow
->nr_channels
);
100 edac_dbg(4, " csrow->channels = %p\n", csrow
->channels
);
101 edac_dbg(4, " csrow->mci = %p\n", csrow
->mci
);
104 static void edac_mc_dump_mci(struct mem_ctl_info
*mci
)
106 edac_dbg(3, "\tmci = %p\n", mci
);
107 edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci
->mtype_cap
);
108 edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci
->edac_ctl_cap
);
109 edac_dbg(3, "\tmci->edac_cap = %lx\n", mci
->edac_cap
);
110 edac_dbg(4, "\tmci->edac_check = %p\n", mci
->edac_check
);
111 edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
112 mci
->nr_csrows
, mci
->csrows
);
113 edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
114 mci
->tot_dimms
, mci
->dimms
);
115 edac_dbg(3, "\tdev = %p\n", mci
->pdev
);
116 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
117 mci
->mod_name
, mci
->ctl_name
);
118 edac_dbg(3, "\tpvt_info = %p\n\n", mci
->pvt_info
);
121 #endif /* CONFIG_EDAC_DEBUG */
124 * keep those in sync with the enum mem_type
126 const char *edac_mem_types
[] = {
128 "Reserved csrow type",
129 "Unknown csrow type",
130 "Fast page mode RAM",
131 "Extended data out RAM",
132 "Burst Extended data out RAM",
133 "Single data rate SDRAM",
134 "Registered single data rate SDRAM",
135 "Double data rate SDRAM",
136 "Registered Double data rate SDRAM",
138 "Unbuffered DDR2 RAM",
139 "Fully buffered DDR2",
140 "Registered DDR2 RAM",
142 "Unbuffered DDR3 RAM",
143 "Registered DDR3 RAM",
145 EXPORT_SYMBOL_GPL(edac_mem_types
);
148 * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
149 * @p: pointer to a pointer with the memory offset to be used. At
150 * return, this will be incremented to point to the next offset
151 * @size: Size of the data structure to be reserved
152 * @n_elems: Number of elements that should be reserved
154 * If 'size' is a constant, the compiler will optimize this whole function
155 * down to either a no-op or the addition of a constant to the value of '*p'.
157 * The 'p' pointer is absolutely needed to keep the proper advancing
158 * further in memory to the proper offsets when allocating the struct along
159 * with its embedded structs, as edac_device_alloc_ctl_info() does it
160 * above, for example.
162 * At return, the pointer 'p' will be incremented to be used on a next call
165 void *edac_align_ptr(void **p
, unsigned size
, int n_elems
)
170 *p
+= size
* n_elems
;
173 * 'p' can possibly be an unaligned item X such that sizeof(X) is
174 * 'size'. Adjust 'p' so that its alignment is at least as
175 * stringent as what the compiler would provide for X and return
176 * the aligned result.
177 * Here we assume that the alignment of a "long long" is the most
178 * stringent alignment that the compiler will ever provide by default.
179 * As far as I know, this is a reasonable assumption.
181 if (size
> sizeof(long))
182 align
= sizeof(long long);
183 else if (size
> sizeof(int))
184 align
= sizeof(long);
185 else if (size
> sizeof(short))
187 else if (size
> sizeof(char))
188 align
= sizeof(short);
192 r
= (unsigned long)p
% align
;
199 return (void *)(((unsigned long)ptr
) + align
- r
);
203 * edac_mc_alloc: Allocate and partially fill a struct mem_ctl_info structure
204 * @mc_num: Memory controller number
205 * @n_layers: Number of MC hierarchy layers
206 * layers: Describes each layer as seen by the Memory Controller
207 * @size_pvt: size of private storage needed
210 * Everything is kmalloc'ed as one big chunk - more efficient.
211 * Only can be used if all structures have the same lifetime - otherwise
212 * you have to allocate and initialize your own structures.
214 * Use edac_mc_free() to free mc structures allocated by this function.
216 * NOTE: drivers handle multi-rank memories in different ways: in some
217 * drivers, one multi-rank memory stick is mapped as one entry, while, in
218 * others, a single multi-rank memory stick would be mapped into several
219 * entries. Currently, this function will allocate multiple struct dimm_info
220 * on such scenarios, as grouping the multiple ranks require drivers change.
224 * On success: struct mem_ctl_info pointer
226 struct mem_ctl_info
*edac_mc_alloc(unsigned mc_num
,
228 struct edac_mc_layer
*layers
,
231 struct mem_ctl_info
*mci
;
232 struct edac_mc_layer
*layer
;
233 struct csrow_info
*csr
;
234 struct rank_info
*chan
;
235 struct dimm_info
*dimm
;
236 u32
*ce_per_layer
[EDAC_MAX_LAYERS
], *ue_per_layer
[EDAC_MAX_LAYERS
];
237 unsigned pos
[EDAC_MAX_LAYERS
];
238 unsigned size
, tot_dimms
= 1, count
= 1;
239 unsigned tot_csrows
= 1, tot_channels
= 1, tot_errcount
= 0;
240 void *pvt
, *p
, *ptr
= NULL
;
241 int i
, j
, row
, chn
, n
, len
, off
;
242 bool per_rank
= false;
244 BUG_ON(n_layers
> EDAC_MAX_LAYERS
|| n_layers
== 0);
246 * Calculate the total amount of dimms and csrows/cschannels while
247 * in the old API emulation mode
249 for (i
= 0; i
< n_layers
; i
++) {
250 tot_dimms
*= layers
[i
].size
;
251 if (layers
[i
].is_virt_csrow
)
252 tot_csrows
*= layers
[i
].size
;
254 tot_channels
*= layers
[i
].size
;
256 if (layers
[i
].type
== EDAC_MC_LAYER_CHIP_SELECT
)
260 /* Figure out the offsets of the various items from the start of an mc
261 * structure. We want the alignment of each item to be at least as
262 * stringent as what the compiler would provide if we could simply
263 * hardcode everything into a single struct.
265 mci
= edac_align_ptr(&ptr
, sizeof(*mci
), 1);
266 layer
= edac_align_ptr(&ptr
, sizeof(*layer
), n_layers
);
267 for (i
= 0; i
< n_layers
; i
++) {
268 count
*= layers
[i
].size
;
269 edac_dbg(4, "errcount layer %d size %d\n", i
, count
);
270 ce_per_layer
[i
] = edac_align_ptr(&ptr
, sizeof(u32
), count
);
271 ue_per_layer
[i
] = edac_align_ptr(&ptr
, sizeof(u32
), count
);
272 tot_errcount
+= 2 * count
;
275 edac_dbg(4, "allocating %d error counters\n", tot_errcount
);
276 pvt
= edac_align_ptr(&ptr
, sz_pvt
, 1);
277 size
= ((unsigned long)pvt
) + sz_pvt
;
279 edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
282 per_rank
? "ranks" : "dimms",
283 tot_csrows
* tot_channels
);
285 mci
= kzalloc(size
, GFP_KERNEL
);
289 /* Adjust pointers so they point within the memory we just allocated
290 * rather than an imaginary chunk of memory located at address 0.
292 layer
= (struct edac_mc_layer
*)(((char *)mci
) + ((unsigned long)layer
));
293 for (i
= 0; i
< n_layers
; i
++) {
294 mci
->ce_per_layer
[i
] = (u32
*)((char *)mci
+ ((unsigned long)ce_per_layer
[i
]));
295 mci
->ue_per_layer
[i
] = (u32
*)((char *)mci
+ ((unsigned long)ue_per_layer
[i
]));
297 pvt
= sz_pvt
? (((char *)mci
) + ((unsigned long)pvt
)) : NULL
;
299 /* setup index and various internal pointers */
300 mci
->mc_idx
= mc_num
;
301 mci
->tot_dimms
= tot_dimms
;
303 mci
->n_layers
= n_layers
;
305 memcpy(mci
->layers
, layers
, sizeof(*layer
) * n_layers
);
306 mci
->nr_csrows
= tot_csrows
;
307 mci
->num_cschannel
= tot_channels
;
308 mci
->mem_is_per_rank
= per_rank
;
311 * Alocate and fill the csrow/channels structs
313 mci
->csrows
= kcalloc(sizeof(*mci
->csrows
), tot_csrows
, GFP_KERNEL
);
316 for (row
= 0; row
< tot_csrows
; row
++) {
317 csr
= kzalloc(sizeof(**mci
->csrows
), GFP_KERNEL
);
320 mci
->csrows
[row
] = csr
;
321 csr
->csrow_idx
= row
;
323 csr
->nr_channels
= tot_channels
;
324 csr
->channels
= kcalloc(sizeof(*csr
->channels
), tot_channels
,
329 for (chn
= 0; chn
< tot_channels
; chn
++) {
330 chan
= kzalloc(sizeof(**csr
->channels
), GFP_KERNEL
);
333 csr
->channels
[chn
] = chan
;
334 chan
->chan_idx
= chn
;
340 * Allocate and fill the dimm structs
342 mci
->dimms
= kcalloc(sizeof(*mci
->dimms
), tot_dimms
, GFP_KERNEL
);
346 memset(&pos
, 0, sizeof(pos
));
349 for (i
= 0; i
< tot_dimms
; i
++) {
350 chan
= mci
->csrows
[row
]->channels
[chn
];
351 off
= EDAC_DIMM_OFF(layer
, n_layers
, pos
[0], pos
[1], pos
[2]);
352 if (off
< 0 || off
>= tot_dimms
) {
353 edac_mc_printk(mci
, KERN_ERR
, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
357 dimm
= kzalloc(sizeof(**mci
->dimms
), GFP_KERNEL
);
360 mci
->dimms
[off
] = dimm
;
364 * Copy DIMM location and initialize it.
366 len
= sizeof(dimm
->label
);
368 n
= snprintf(p
, len
, "mc#%u", mc_num
);
371 for (j
= 0; j
< n_layers
; j
++) {
372 n
= snprintf(p
, len
, "%s#%u",
373 edac_layer_name
[layers
[j
].type
],
377 dimm
->location
[j
] = pos
[j
];
383 /* Link it to the csrows old API data */
386 dimm
->cschannel
= chn
;
388 /* Increment csrow location */
390 if (row
== tot_csrows
) {
395 /* Increment dimm location */
396 for (j
= n_layers
- 1; j
>= 0; j
--) {
398 if (pos
[j
] < layers
[j
].size
)
404 mci
->op_state
= OP_ALLOC
;
406 /* at this point, the root kobj is valid, and in order to
407 * 'free' the object, then the function:
408 * edac_mc_unregister_sysfs_main_kobj() must be called
409 * which will perform kobj unregistration and the actual free
410 * will occur during the kobject callback operation
417 for (i
= 0; i
< tot_dimms
; i
++)
418 kfree(mci
->dimms
[i
]);
422 for (chn
= 0; chn
< tot_channels
; chn
++) {
423 csr
= mci
->csrows
[chn
];
425 for (chn
= 0; chn
< tot_channels
; chn
++)
426 kfree(csr
->channels
[chn
]);
429 kfree(mci
->csrows
[i
]);
437 EXPORT_SYMBOL_GPL(edac_mc_alloc
);
441 * 'Free' a previously allocated 'mci' structure
442 * @mci: pointer to a struct mem_ctl_info structure
444 void edac_mc_free(struct mem_ctl_info
*mci
)
448 /* the mci instance is freed here, when the sysfs object is dropped */
449 edac_unregister_sysfs(mci
);
451 EXPORT_SYMBOL_GPL(edac_mc_free
);
457 * scan list of controllers looking for the one that manages
459 * @dev: pointer to a struct device related with the MCI
461 struct mem_ctl_info
*find_mci_by_dev(struct device
*dev
)
463 struct mem_ctl_info
*mci
;
464 struct list_head
*item
;
468 list_for_each(item
, &mc_devices
) {
469 mci
= list_entry(item
, struct mem_ctl_info
, link
);
471 if (mci
->pdev
== dev
)
477 EXPORT_SYMBOL_GPL(find_mci_by_dev
);
480 * handler for EDAC to check if NMI type handler has asserted interrupt
482 static int edac_mc_assert_error_check_and_clear(void)
486 if (edac_op_state
== EDAC_OPSTATE_POLL
)
489 old_state
= edac_err_assert
;
496 * edac_mc_workq_function
497 * performs the operation scheduled by a workq request
499 static void edac_mc_workq_function(struct work_struct
*work_req
)
501 struct delayed_work
*d_work
= to_delayed_work(work_req
);
502 struct mem_ctl_info
*mci
= to_edac_mem_ctl_work(d_work
);
504 mutex_lock(&mem_ctls_mutex
);
506 /* if this control struct has movd to offline state, we are done */
507 if (mci
->op_state
== OP_OFFLINE
) {
508 mutex_unlock(&mem_ctls_mutex
);
512 /* Only poll controllers that are running polled and have a check */
513 if (edac_mc_assert_error_check_and_clear() && (mci
->edac_check
!= NULL
))
514 mci
->edac_check(mci
);
516 mutex_unlock(&mem_ctls_mutex
);
519 queue_delayed_work(edac_workqueue
, &mci
->work
,
520 msecs_to_jiffies(edac_mc_get_poll_msec()));
524 * edac_mc_workq_setup
525 * initialize a workq item for this mci
526 * passing in the new delay period in msec
530 * called with the mem_ctls_mutex held
532 static void edac_mc_workq_setup(struct mem_ctl_info
*mci
, unsigned msec
)
536 /* if this instance is not in the POLL state, then simply return */
537 if (mci
->op_state
!= OP_RUNNING_POLL
)
540 INIT_DELAYED_WORK(&mci
->work
, edac_mc_workq_function
);
541 mod_delayed_work(edac_workqueue
, &mci
->work
, msecs_to_jiffies(msec
));
545 * edac_mc_workq_teardown
546 * stop the workq processing on this mci
550 * called WITHOUT lock held
552 static void edac_mc_workq_teardown(struct mem_ctl_info
*mci
)
556 if (mci
->op_state
!= OP_RUNNING_POLL
)
559 status
= cancel_delayed_work(&mci
->work
);
561 edac_dbg(0, "not canceled, flush the queue\n");
563 /* workq instance might be running, wait for it */
564 flush_workqueue(edac_workqueue
);
569 * edac_mc_reset_delay_period(unsigned long value)
571 * user space has updated our poll period value, need to
572 * reset our workq delays
574 void edac_mc_reset_delay_period(int value
)
576 struct mem_ctl_info
*mci
;
577 struct list_head
*item
;
579 mutex_lock(&mem_ctls_mutex
);
581 list_for_each(item
, &mc_devices
) {
582 mci
= list_entry(item
, struct mem_ctl_info
, link
);
584 edac_mc_workq_setup(mci
, (unsigned long) value
);
587 mutex_unlock(&mem_ctls_mutex
);
592 /* Return 0 on success, 1 on failure.
593 * Before calling this function, caller must
594 * assign a unique value to mci->mc_idx.
598 * called with the mem_ctls_mutex lock held
600 static int add_mc_to_global_list(struct mem_ctl_info
*mci
)
602 struct list_head
*item
, *insert_before
;
603 struct mem_ctl_info
*p
;
605 insert_before
= &mc_devices
;
607 p
= find_mci_by_dev(mci
->pdev
);
608 if (unlikely(p
!= NULL
))
611 list_for_each(item
, &mc_devices
) {
612 p
= list_entry(item
, struct mem_ctl_info
, link
);
614 if (p
->mc_idx
>= mci
->mc_idx
) {
615 if (unlikely(p
->mc_idx
== mci
->mc_idx
))
618 insert_before
= item
;
623 list_add_tail_rcu(&mci
->link
, insert_before
);
624 atomic_inc(&edac_handlers
);
628 edac_printk(KERN_WARNING
, EDAC_MC
,
629 "%s (%s) %s %s already assigned %d\n", dev_name(p
->pdev
),
630 edac_dev_name(mci
), p
->mod_name
, p
->ctl_name
, p
->mc_idx
);
634 edac_printk(KERN_WARNING
, EDAC_MC
,
635 "bug in low-level driver: attempt to assign\n"
636 " duplicate mc_idx %d in %s()\n", p
->mc_idx
, __func__
);
640 static void del_mc_from_global_list(struct mem_ctl_info
*mci
)
642 atomic_dec(&edac_handlers
);
643 list_del_rcu(&mci
->link
);
645 /* these are for safe removal of devices from global list while
646 * NMI handlers may be traversing list
649 INIT_LIST_HEAD(&mci
->link
);
653 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
655 * If found, return a pointer to the structure.
658 * Caller must hold mem_ctls_mutex.
660 struct mem_ctl_info
*edac_mc_find(int idx
)
662 struct list_head
*item
;
663 struct mem_ctl_info
*mci
;
665 list_for_each(item
, &mc_devices
) {
666 mci
= list_entry(item
, struct mem_ctl_info
, link
);
668 if (mci
->mc_idx
>= idx
) {
669 if (mci
->mc_idx
== idx
)
678 EXPORT_SYMBOL(edac_mc_find
);
681 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
682 * create sysfs entries associated with mci structure
683 * @mci: pointer to the mci structure to be added to the list
690 /* FIXME - should a warning be printed if no error detection? correction? */
691 int edac_mc_add_mc(struct mem_ctl_info
*mci
)
695 #ifdef CONFIG_EDAC_DEBUG
696 if (edac_debug_level
>= 3)
697 edac_mc_dump_mci(mci
);
699 if (edac_debug_level
>= 4) {
702 for (i
= 0; i
< mci
->nr_csrows
; i
++) {
703 struct csrow_info
*csrow
= mci
->csrows
[i
];
707 for (j
= 0; j
< csrow
->nr_channels
; j
++)
708 nr_pages
+= csrow
->channels
[j
]->dimm
->nr_pages
;
711 edac_mc_dump_csrow(csrow
);
712 for (j
= 0; j
< csrow
->nr_channels
; j
++)
713 if (csrow
->channels
[j
]->dimm
->nr_pages
)
714 edac_mc_dump_channel(csrow
->channels
[j
]);
716 for (i
= 0; i
< mci
->tot_dimms
; i
++)
717 if (mci
->dimms
[i
]->nr_pages
)
718 edac_mc_dump_dimm(mci
->dimms
[i
], i
);
721 mutex_lock(&mem_ctls_mutex
);
723 if (add_mc_to_global_list(mci
))
726 /* set load time so that error rate can be tracked */
727 mci
->start_time
= jiffies
;
729 if (edac_create_sysfs_mci_device(mci
)) {
730 edac_mc_printk(mci
, KERN_WARNING
,
731 "failed to create sysfs device\n");
735 /* If there IS a check routine, then we are running POLLED */
736 if (mci
->edac_check
!= NULL
) {
737 /* This instance is NOW RUNNING */
738 mci
->op_state
= OP_RUNNING_POLL
;
740 edac_mc_workq_setup(mci
, edac_mc_get_poll_msec());
742 mci
->op_state
= OP_RUNNING_INTERRUPT
;
745 /* Report action taken */
746 edac_mc_printk(mci
, KERN_INFO
, "Giving out device to '%s' '%s':"
747 " DEV %s\n", mci
->mod_name
, mci
->ctl_name
, edac_dev_name(mci
));
749 mutex_unlock(&mem_ctls_mutex
);
753 del_mc_from_global_list(mci
);
756 mutex_unlock(&mem_ctls_mutex
);
759 EXPORT_SYMBOL_GPL(edac_mc_add_mc
);
762 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
763 * remove mci structure from global list
764 * @pdev: Pointer to 'struct device' representing mci structure to remove.
766 * Return pointer to removed mci structure, or NULL if device not found.
768 struct mem_ctl_info
*edac_mc_del_mc(struct device
*dev
)
770 struct mem_ctl_info
*mci
;
774 mutex_lock(&mem_ctls_mutex
);
776 /* find the requested mci struct in the global list */
777 mci
= find_mci_by_dev(dev
);
779 mutex_unlock(&mem_ctls_mutex
);
783 del_mc_from_global_list(mci
);
784 mutex_unlock(&mem_ctls_mutex
);
786 /* flush workq processes */
787 edac_mc_workq_teardown(mci
);
789 /* marking MCI offline */
790 mci
->op_state
= OP_OFFLINE
;
792 /* remove from sysfs */
793 edac_remove_sysfs_mci_device(mci
);
795 edac_printk(KERN_INFO
, EDAC_MC
,
796 "Removed device %d for %s %s: DEV %s\n", mci
->mc_idx
,
797 mci
->mod_name
, mci
->ctl_name
, edac_dev_name(mci
));
801 EXPORT_SYMBOL_GPL(edac_mc_del_mc
);
803 static void edac_mc_scrub_block(unsigned long page
, unsigned long offset
,
808 unsigned long flags
= 0;
812 /* ECC error page was not in our memory. Ignore it. */
813 if (!pfn_valid(page
))
816 /* Find the actual page structure then map it and fix */
817 pg
= pfn_to_page(page
);
820 local_irq_save(flags
);
822 virt_addr
= kmap_atomic(pg
);
824 /* Perform architecture specific atomic scrub operation */
825 atomic_scrub(virt_addr
+ offset
, size
);
827 /* Unmap and complete */
828 kunmap_atomic(virt_addr
);
831 local_irq_restore(flags
);
834 /* FIXME - should return -1 */
835 int edac_mc_find_csrow_by_page(struct mem_ctl_info
*mci
, unsigned long page
)
837 struct csrow_info
**csrows
= mci
->csrows
;
840 edac_dbg(1, "MC%d: 0x%lx\n", mci
->mc_idx
, page
);
843 for (i
= 0; i
< mci
->nr_csrows
; i
++) {
844 struct csrow_info
*csrow
= csrows
[i
];
846 for (j
= 0; j
< csrow
->nr_channels
; j
++) {
847 struct dimm_info
*dimm
= csrow
->channels
[j
]->dimm
;
853 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
855 csrow
->first_page
, page
, csrow
->last_page
,
858 if ((page
>= csrow
->first_page
) &&
859 (page
<= csrow
->last_page
) &&
860 ((page
& csrow
->page_mask
) ==
861 (csrow
->first_page
& csrow
->page_mask
))) {
868 edac_mc_printk(mci
, KERN_ERR
,
869 "could not look up page error address %lx\n",
870 (unsigned long)page
);
874 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page
);
876 const char *edac_layer_name
[] = {
877 [EDAC_MC_LAYER_BRANCH
] = "branch",
878 [EDAC_MC_LAYER_CHANNEL
] = "channel",
879 [EDAC_MC_LAYER_SLOT
] = "slot",
880 [EDAC_MC_LAYER_CHIP_SELECT
] = "csrow",
882 EXPORT_SYMBOL_GPL(edac_layer_name
);
884 static void edac_inc_ce_error(struct mem_ctl_info
*mci
,
885 bool enable_per_layer_report
,
886 const int pos
[EDAC_MAX_LAYERS
],
893 if (!enable_per_layer_report
) {
894 mci
->ce_noinfo_count
+= count
;
898 for (i
= 0; i
< mci
->n_layers
; i
++) {
902 mci
->ce_per_layer
[i
][index
] += count
;
904 if (i
< mci
->n_layers
- 1)
905 index
*= mci
->layers
[i
+ 1].size
;
909 static void edac_inc_ue_error(struct mem_ctl_info
*mci
,
910 bool enable_per_layer_report
,
911 const int pos
[EDAC_MAX_LAYERS
],
918 if (!enable_per_layer_report
) {
919 mci
->ce_noinfo_count
+= count
;
923 for (i
= 0; i
< mci
->n_layers
; i
++) {
927 mci
->ue_per_layer
[i
][index
] += count
;
929 if (i
< mci
->n_layers
- 1)
930 index
*= mci
->layers
[i
+ 1].size
;
934 static void edac_ce_error(struct mem_ctl_info
*mci
,
935 const u16 error_count
,
936 const int pos
[EDAC_MAX_LAYERS
],
938 const char *location
,
941 const char *other_detail
,
942 const bool enable_per_layer_report
,
943 const unsigned long page_frame_number
,
944 const unsigned long offset_in_page
,
947 unsigned long remapped_page
;
949 if (edac_mc_get_log_ce()) {
950 if (other_detail
&& *other_detail
)
951 edac_mc_printk(mci
, KERN_WARNING
,
952 "%d CE %s on %s (%s %s - %s)\n",
954 msg
, label
, location
,
955 detail
, other_detail
);
957 edac_mc_printk(mci
, KERN_WARNING
,
958 "%d CE %s on %s (%s %s)\n",
960 msg
, label
, location
,
963 edac_inc_ce_error(mci
, enable_per_layer_report
, pos
, error_count
);
965 if (mci
->scrub_mode
& SCRUB_SW_SRC
) {
967 * Some memory controllers (called MCs below) can remap
968 * memory so that it is still available at a different
969 * address when PCI devices map into memory.
970 * MC's that can't do this, lose the memory where PCI
971 * devices are mapped. This mapping is MC-dependent
972 * and so we call back into the MC driver for it to
973 * map the MC page to a physical (CPU) page which can
974 * then be mapped to a virtual page - which can then
977 remapped_page
= mci
->ctl_page_to_phys
?
978 mci
->ctl_page_to_phys(mci
, page_frame_number
) :
981 edac_mc_scrub_block(remapped_page
,
982 offset_in_page
, grain
);
986 static void edac_ue_error(struct mem_ctl_info
*mci
,
987 const u16 error_count
,
988 const int pos
[EDAC_MAX_LAYERS
],
990 const char *location
,
993 const char *other_detail
,
994 const bool enable_per_layer_report
)
996 if (edac_mc_get_log_ue()) {
997 if (other_detail
&& *other_detail
)
998 edac_mc_printk(mci
, KERN_WARNING
,
999 "%d UE %s on %s (%s %s - %s)\n",
1001 msg
, label
, location
, detail
,
1004 edac_mc_printk(mci
, KERN_WARNING
,
1005 "%d UE %s on %s (%s %s)\n",
1007 msg
, label
, location
, detail
);
1010 if (edac_mc_get_panic_on_ue()) {
1011 if (other_detail
&& *other_detail
)
1012 panic("UE %s on %s (%s%s - %s)\n",
1013 msg
, label
, location
, detail
, other_detail
);
1015 panic("UE %s on %s (%s%s)\n",
1016 msg
, label
, location
, detail
);
1019 edac_inc_ue_error(mci
, enable_per_layer_report
, pos
, error_count
);
1022 #define OTHER_LABEL " or "
1025 * edac_mc_handle_error - reports a memory event to userspace
1027 * @type: severity of the error (CE/UE/Fatal)
1028 * @mci: a struct mem_ctl_info pointer
1029 * @error_count: Number of errors of the same type
1030 * @page_frame_number: mem page where the error occurred
1031 * @offset_in_page: offset of the error inside the page
1032 * @syndrome: ECC syndrome
1033 * @top_layer: Memory layer[0] position
1034 * @mid_layer: Memory layer[1] position
1035 * @low_layer: Memory layer[2] position
1036 * @msg: Message meaningful to the end users that
1037 * explains the event
1038 * @other_detail: Technical details about the event that
1039 * may help hardware manufacturers and
1040 * EDAC developers to analyse the event
1042 void edac_mc_handle_error(const enum hw_event_mc_err_type type
,
1043 struct mem_ctl_info
*mci
,
1044 const u16 error_count
,
1045 const unsigned long page_frame_number
,
1046 const unsigned long offset_in_page
,
1047 const unsigned long syndrome
,
1048 const int top_layer
,
1049 const int mid_layer
,
1050 const int low_layer
,
1052 const char *other_detail
)
1054 /* FIXME: too much for stack: move it to some pre-alocated area */
1055 char detail
[80], location
[80];
1056 char label
[(EDAC_MC_LABEL_LEN
+ 1 + sizeof(OTHER_LABEL
)) * mci
->tot_dimms
];
1058 int row
= -1, chan
= -1;
1059 int pos
[EDAC_MAX_LAYERS
] = { top_layer
, mid_layer
, low_layer
};
1062 bool enable_per_layer_report
= false;
1065 edac_dbg(3, "MC%d\n", mci
->mc_idx
);
1068 * Check if the event report is consistent and if the memory
1069 * location is known. If it is known, enable_per_layer_report will be
1070 * true, the DIMM(s) label info will be filled and the per-layer
1071 * error counters will be incremented.
1073 for (i
= 0; i
< mci
->n_layers
; i
++) {
1074 if (pos
[i
] >= (int)mci
->layers
[i
].size
) {
1075 if (type
== HW_EVENT_ERR_CORRECTED
)
1080 edac_mc_printk(mci
, KERN_ERR
,
1081 "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1082 edac_layer_name
[mci
->layers
[i
].type
],
1083 pos
[i
], mci
->layers
[i
].size
);
1085 * Instead of just returning it, let's use what's
1086 * known about the error. The increment routines and
1087 * the DIMM filter logic will do the right thing by
1088 * pointing the likely damaged DIMMs.
1093 enable_per_layer_report
= true;
1097 * Get the dimm label/grain that applies to the match criteria.
1098 * As the error algorithm may not be able to point to just one memory
1099 * stick, the logic here will get all possible labels that could
1100 * pottentially be affected by the error.
1101 * On FB-DIMM memory controllers, for uncorrected errors, it is common
1102 * to have only the MC channel and the MC dimm (also called "branch")
1103 * but the channel is not known, as the memory is arranged in pairs,
1104 * where each memory belongs to a separate channel within the same
1110 for (i
= 0; i
< mci
->tot_dimms
; i
++) {
1111 struct dimm_info
*dimm
= mci
->dimms
[i
];
1113 if (top_layer
>= 0 && top_layer
!= dimm
->location
[0])
1115 if (mid_layer
>= 0 && mid_layer
!= dimm
->location
[1])
1117 if (low_layer
>= 0 && low_layer
!= dimm
->location
[2])
1120 /* get the max grain, over the error match range */
1121 if (dimm
->grain
> grain
)
1122 grain
= dimm
->grain
;
1125 * If the error is memory-controller wide, there's no need to
1126 * seek for the affected DIMMs because the whole
1127 * channel/memory controller/... may be affected.
1128 * Also, don't show errors for empty DIMM slots.
1130 if (enable_per_layer_report
&& dimm
->nr_pages
) {
1132 strcpy(p
, OTHER_LABEL
);
1133 p
+= strlen(OTHER_LABEL
);
1135 strcpy(p
, dimm
->label
);
1140 * get csrow/channel of the DIMM, in order to allow
1141 * incrementing the compat API counters
1143 edac_dbg(4, "%s csrows map: (%d,%d)\n",
1144 mci
->mem_is_per_rank
? "rank" : "dimm",
1145 dimm
->csrow
, dimm
->cschannel
);
1148 else if (row
>= 0 && row
!= dimm
->csrow
)
1152 chan
= dimm
->cschannel
;
1153 else if (chan
>= 0 && chan
!= dimm
->cschannel
)
1158 if (!enable_per_layer_report
) {
1159 strcpy(label
, "any memory");
1161 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row
, chan
);
1163 strcpy(label
, "unknown memory");
1164 if (type
== HW_EVENT_ERR_CORRECTED
) {
1166 mci
->csrows
[row
]->ce_count
+= error_count
;
1168 mci
->csrows
[row
]->channels
[chan
]->ce_count
+= error_count
;
1172 mci
->csrows
[row
]->ue_count
+= error_count
;
1175 /* Fill the RAM location data */
1177 for (i
= 0; i
< mci
->n_layers
; i
++) {
1181 p
+= sprintf(p
, "%s:%d ",
1182 edac_layer_name
[mci
->layers
[i
].type
],
1188 /* Report the error via the trace interface */
1190 grain_bits
= fls_long(grain
) + 1;
1191 trace_mc_event(type
, msg
, label
, error_count
,
1192 mci
->mc_idx
, top_layer
, mid_layer
, low_layer
,
1193 PAGES_TO_MiB(page_frame_number
) | offset_in_page
,
1194 grain_bits
, syndrome
, other_detail
);
1196 /* Memory type dependent details about the error */
1197 if (type
== HW_EVENT_ERR_CORRECTED
) {
1198 snprintf(detail
, sizeof(detail
),
1199 "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1200 page_frame_number
, offset_in_page
,
1202 edac_ce_error(mci
, error_count
, pos
, msg
, location
, label
,
1203 detail
, other_detail
, enable_per_layer_report
,
1204 page_frame_number
, offset_in_page
, grain
);
1206 snprintf(detail
, sizeof(detail
),
1207 "page:0x%lx offset:0x%lx grain:%ld",
1208 page_frame_number
, offset_in_page
, grain
);
1210 edac_ue_error(mci
, error_count
, pos
, msg
, location
, label
,
1211 detail
, other_detail
, enable_per_layer_report
);
1214 EXPORT_SYMBOL_GPL(edac_mc_handle_error
);