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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/shaggy...
[mirror_ubuntu-zesty-kernel.git] / drivers / edac / edac_mc.c
1 /*
2 * edac_mc kernel module
3 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
10 *
11 * Modified by Dave Peterson and Doug Thompson
12 *
13 */
14
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/sysdev.h>
29 #include <linux/ctype.h>
30 #include <linux/kthread.h>
31 #include <asm/uaccess.h>
32 #include <asm/page.h>
33 #include <asm/edac.h>
34 #include "edac_mc.h"
35
36 #define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__
37
38
39 #ifdef CONFIG_EDAC_DEBUG
40 /* Values of 0 to 4 will generate output */
41 int edac_debug_level = 1;
42 EXPORT_SYMBOL_GPL(edac_debug_level);
43 #endif
44
45 /* EDAC Controls, setable by module parameter, and sysfs */
46 static int log_ue = 1;
47 static int log_ce = 1;
48 static int panic_on_ue;
49 static int poll_msec = 1000;
50
51 /* lock to memory controller's control array */
52 static DECLARE_MUTEX(mem_ctls_mutex);
53 static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
54
55 static struct task_struct *edac_thread;
56
57 #ifdef CONFIG_PCI
58 static int check_pci_parity = 0; /* default YES check PCI parity */
59 static int panic_on_pci_parity; /* default no panic on PCI Parity */
60 static atomic_t pci_parity_count = ATOMIC_INIT(0);
61
62 static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
63 static struct completion edac_pci_kobj_complete;
64 #endif /* CONFIG_PCI */
65
66 /* START sysfs data and methods */
67
68
69 static const char *mem_types[] = {
70 [MEM_EMPTY] = "Empty",
71 [MEM_RESERVED] = "Reserved",
72 [MEM_UNKNOWN] = "Unknown",
73 [MEM_FPM] = "FPM",
74 [MEM_EDO] = "EDO",
75 [MEM_BEDO] = "BEDO",
76 [MEM_SDR] = "Unbuffered-SDR",
77 [MEM_RDR] = "Registered-SDR",
78 [MEM_DDR] = "Unbuffered-DDR",
79 [MEM_RDDR] = "Registered-DDR",
80 [MEM_RMBS] = "RMBS"
81 };
82
83 static const char *dev_types[] = {
84 [DEV_UNKNOWN] = "Unknown",
85 [DEV_X1] = "x1",
86 [DEV_X2] = "x2",
87 [DEV_X4] = "x4",
88 [DEV_X8] = "x8",
89 [DEV_X16] = "x16",
90 [DEV_X32] = "x32",
91 [DEV_X64] = "x64"
92 };
93
94 static const char *edac_caps[] = {
95 [EDAC_UNKNOWN] = "Unknown",
96 [EDAC_NONE] = "None",
97 [EDAC_RESERVED] = "Reserved",
98 [EDAC_PARITY] = "PARITY",
99 [EDAC_EC] = "EC",
100 [EDAC_SECDED] = "SECDED",
101 [EDAC_S2ECD2ED] = "S2ECD2ED",
102 [EDAC_S4ECD4ED] = "S4ECD4ED",
103 [EDAC_S8ECD8ED] = "S8ECD8ED",
104 [EDAC_S16ECD16ED] = "S16ECD16ED"
105 };
106
107 /* sysfs object: /sys/devices/system/edac */
108 static struct sysdev_class edac_class = {
109 set_kset_name("edac"),
110 };
111
112 /* sysfs object:
113 * /sys/devices/system/edac/mc
114 */
115 static struct kobject edac_memctrl_kobj;
116
117 /* We use these to wait for the reference counts on edac_memctrl_kobj and
118 * edac_pci_kobj to reach 0.
119 */
120 static struct completion edac_memctrl_kobj_complete;
121
122 /*
123 * /sys/devices/system/edac/mc;
124 * data structures and methods
125 */
126 static ssize_t memctrl_int_show(void *ptr, char *buffer)
127 {
128 int *value = (int*) ptr;
129 return sprintf(buffer, "%u\n", *value);
130 }
131
132 static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
133 {
134 int *value = (int*) ptr;
135
136 if (isdigit(*buffer))
137 *value = simple_strtoul(buffer, NULL, 0);
138
139 return count;
140 }
141
142 struct memctrl_dev_attribute {
143 struct attribute attr;
144 void *value;
145 ssize_t (*show)(void *,char *);
146 ssize_t (*store)(void *, const char *, size_t);
147 };
148
149 /* Set of show/store abstract level functions for memory control object */
150 static ssize_t memctrl_dev_show(struct kobject *kobj,
151 struct attribute *attr, char *buffer)
152 {
153 struct memctrl_dev_attribute *memctrl_dev;
154 memctrl_dev = (struct memctrl_dev_attribute*)attr;
155
156 if (memctrl_dev->show)
157 return memctrl_dev->show(memctrl_dev->value, buffer);
158
159 return -EIO;
160 }
161
162 static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
163 const char *buffer, size_t count)
164 {
165 struct memctrl_dev_attribute *memctrl_dev;
166 memctrl_dev = (struct memctrl_dev_attribute*)attr;
167
168 if (memctrl_dev->store)
169 return memctrl_dev->store(memctrl_dev->value, buffer, count);
170
171 return -EIO;
172 }
173
174 static struct sysfs_ops memctrlfs_ops = {
175 .show = memctrl_dev_show,
176 .store = memctrl_dev_store
177 };
178
179 #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
180 struct memctrl_dev_attribute attr_##_name = { \
181 .attr = {.name = __stringify(_name), .mode = _mode }, \
182 .value = &_name, \
183 .show = _show, \
184 .store = _store, \
185 };
186
187 #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
188 struct memctrl_dev_attribute attr_##_name = { \
189 .attr = {.name = __stringify(_name), .mode = _mode }, \
190 .value = _data, \
191 .show = _show, \
192 .store = _store, \
193 };
194
195 /* csrow<id> control files */
196 MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
197 MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
198 MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
199 MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
200
201 /* Base Attributes of the memory ECC object */
202 static struct memctrl_dev_attribute *memctrl_attr[] = {
203 &attr_panic_on_ue,
204 &attr_log_ue,
205 &attr_log_ce,
206 &attr_poll_msec,
207 NULL,
208 };
209
210 /* Main MC kobject release() function */
211 static void edac_memctrl_master_release(struct kobject *kobj)
212 {
213 debugf1("%s()\n", __func__);
214 complete(&edac_memctrl_kobj_complete);
215 }
216
217 static struct kobj_type ktype_memctrl = {
218 .release = edac_memctrl_master_release,
219 .sysfs_ops = &memctrlfs_ops,
220 .default_attrs = (struct attribute **) memctrl_attr,
221 };
222
223 /* Initialize the main sysfs entries for edac:
224 * /sys/devices/system/edac
225 *
226 * and children
227 *
228 * Return: 0 SUCCESS
229 * !0 FAILURE
230 */
231 static int edac_sysfs_memctrl_setup(void)
232 {
233 int err=0;
234
235 debugf1("%s()\n", __func__);
236
237 /* create the /sys/devices/system/edac directory */
238 err = sysdev_class_register(&edac_class);
239
240 if (!err) {
241 /* Init the MC's kobject */
242 memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
243 edac_memctrl_kobj.parent = &edac_class.kset.kobj;
244 edac_memctrl_kobj.ktype = &ktype_memctrl;
245
246 /* generate sysfs "..../edac/mc" */
247 err = kobject_set_name(&edac_memctrl_kobj,"mc");
248
249 if (!err) {
250 /* FIXME: maybe new sysdev_create_subdir() */
251 err = kobject_register(&edac_memctrl_kobj);
252
253 if (err)
254 debugf1("Failed to register '.../edac/mc'\n");
255 else
256 debugf1("Registered '.../edac/mc' kobject\n");
257 }
258 } else
259 debugf1("%s() error=%d\n", __func__, err);
260
261 return err;
262 }
263
264 /*
265 * MC teardown:
266 * the '..../edac/mc' kobject followed by '..../edac' itself
267 */
268 static void edac_sysfs_memctrl_teardown(void)
269 {
270 debugf0("MC: " __FILE__ ": %s()\n", __func__);
271
272 /* Unregister the MC's kobject and wait for reference count to reach
273 * 0.
274 */
275 init_completion(&edac_memctrl_kobj_complete);
276 kobject_unregister(&edac_memctrl_kobj);
277 wait_for_completion(&edac_memctrl_kobj_complete);
278
279 /* Unregister the 'edac' object */
280 sysdev_class_unregister(&edac_class);
281 }
282
283 #ifdef CONFIG_PCI
284 static ssize_t edac_pci_int_show(void *ptr, char *buffer)
285 {
286 int *value = ptr;
287 return sprintf(buffer,"%d\n",*value);
288 }
289
290 static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
291 {
292 int *value = ptr;
293
294 if (isdigit(*buffer))
295 *value = simple_strtoul(buffer,NULL,0);
296
297 return count;
298 }
299
300 struct edac_pci_dev_attribute {
301 struct attribute attr;
302 void *value;
303 ssize_t (*show)(void *,char *);
304 ssize_t (*store)(void *, const char *,size_t);
305 };
306
307 /* Set of show/store abstract level functions for PCI Parity object */
308 static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
309 char *buffer)
310 {
311 struct edac_pci_dev_attribute *edac_pci_dev;
312 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
313
314 if (edac_pci_dev->show)
315 return edac_pci_dev->show(edac_pci_dev->value, buffer);
316 return -EIO;
317 }
318
319 static ssize_t edac_pci_dev_store(struct kobject *kobj,
320 struct attribute *attr, const char *buffer, size_t count)
321 {
322 struct edac_pci_dev_attribute *edac_pci_dev;
323 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
324
325 if (edac_pci_dev->show)
326 return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
327 return -EIO;
328 }
329
330 static struct sysfs_ops edac_pci_sysfs_ops = {
331 .show = edac_pci_dev_show,
332 .store = edac_pci_dev_store
333 };
334
335 #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
336 struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
337 .attr = {.name = __stringify(_name), .mode = _mode }, \
338 .value = &_name, \
339 .show = _show, \
340 .store = _store, \
341 };
342
343 #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
344 struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
345 .attr = {.name = __stringify(_name), .mode = _mode }, \
346 .value = _data, \
347 .show = _show, \
348 .store = _store, \
349 };
350
351 /* PCI Parity control files */
352 EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
353 edac_pci_int_store);
354 EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
355 edac_pci_int_store);
356 EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
357
358 /* Base Attributes of the memory ECC object */
359 static struct edac_pci_dev_attribute *edac_pci_attr[] = {
360 &edac_pci_attr_check_pci_parity,
361 &edac_pci_attr_panic_on_pci_parity,
362 &edac_pci_attr_pci_parity_count,
363 NULL,
364 };
365
366 /* No memory to release */
367 static void edac_pci_release(struct kobject *kobj)
368 {
369 debugf1("%s()\n", __func__);
370 complete(&edac_pci_kobj_complete);
371 }
372
373 static struct kobj_type ktype_edac_pci = {
374 .release = edac_pci_release,
375 .sysfs_ops = &edac_pci_sysfs_ops,
376 .default_attrs = (struct attribute **) edac_pci_attr,
377 };
378
379 /**
380 * edac_sysfs_pci_setup()
381 *
382 */
383 static int edac_sysfs_pci_setup(void)
384 {
385 int err;
386
387 debugf1("%s()\n", __func__);
388
389 memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
390 edac_pci_kobj.parent = &edac_class.kset.kobj;
391 edac_pci_kobj.ktype = &ktype_edac_pci;
392 err = kobject_set_name(&edac_pci_kobj, "pci");
393
394 if (!err) {
395 /* Instanstiate the csrow object */
396 /* FIXME: maybe new sysdev_create_subdir() */
397 err = kobject_register(&edac_pci_kobj);
398
399 if (err)
400 debugf1("Failed to register '.../edac/pci'\n");
401 else
402 debugf1("Registered '.../edac/pci' kobject\n");
403 }
404
405 return err;
406 }
407
408 static void edac_sysfs_pci_teardown(void)
409 {
410 debugf0("%s()\n", __func__);
411 init_completion(&edac_pci_kobj_complete);
412 kobject_unregister(&edac_pci_kobj);
413 wait_for_completion(&edac_pci_kobj_complete);
414 }
415
416
417 static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
418 {
419 int where;
420 u16 status;
421
422 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
423 pci_read_config_word(dev, where, &status);
424
425 /* If we get back 0xFFFF then we must suspect that the card has been
426 * pulled but the Linux PCI layer has not yet finished cleaning up.
427 * We don't want to report on such devices
428 */
429
430 if (status == 0xFFFF) {
431 u32 sanity;
432
433 pci_read_config_dword(dev, 0, &sanity);
434
435 if (sanity == 0xFFFFFFFF)
436 return 0;
437 }
438
439 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
440 PCI_STATUS_PARITY;
441
442 if (status)
443 /* reset only the bits we are interested in */
444 pci_write_config_word(dev, where, status);
445
446 return status;
447 }
448
449 typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
450
451 /* Clear any PCI parity errors logged by this device. */
452 static void edac_pci_dev_parity_clear(struct pci_dev *dev)
453 {
454 u8 header_type;
455
456 get_pci_parity_status(dev, 0);
457
458 /* read the device TYPE, looking for bridges */
459 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
460
461 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
462 get_pci_parity_status(dev, 1);
463 }
464
465 /*
466 * PCI Parity polling
467 *
468 */
469 static void edac_pci_dev_parity_test(struct pci_dev *dev)
470 {
471 u16 status;
472 u8 header_type;
473
474 /* read the STATUS register on this device
475 */
476 status = get_pci_parity_status(dev, 0);
477
478 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
479
480 /* check the status reg for errors */
481 if (status) {
482 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
483 edac_printk(KERN_CRIT, EDAC_PCI,
484 "Signaled System Error on %s\n",
485 pci_name(dev));
486
487 if (status & (PCI_STATUS_PARITY)) {
488 edac_printk(KERN_CRIT, EDAC_PCI,
489 "Master Data Parity Error on %s\n",
490 pci_name(dev));
491
492 atomic_inc(&pci_parity_count);
493 }
494
495 if (status & (PCI_STATUS_DETECTED_PARITY)) {
496 edac_printk(KERN_CRIT, EDAC_PCI,
497 "Detected Parity Error on %s\n",
498 pci_name(dev));
499
500 atomic_inc(&pci_parity_count);
501 }
502 }
503
504 /* read the device TYPE, looking for bridges */
505 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
506
507 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
508
509 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
510 /* On bridges, need to examine secondary status register */
511 status = get_pci_parity_status(dev, 1);
512
513 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
514 status, dev->dev.bus_id );
515
516 /* check the secondary status reg for errors */
517 if (status) {
518 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
519 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
520 "Signaled System Error on %s\n",
521 pci_name(dev));
522
523 if (status & (PCI_STATUS_PARITY)) {
524 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
525 "Master Data Parity Error on "
526 "%s\n", pci_name(dev));
527
528 atomic_inc(&pci_parity_count);
529 }
530
531 if (status & (PCI_STATUS_DETECTED_PARITY)) {
532 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
533 "Detected Parity Error on %s\n",
534 pci_name(dev));
535
536 atomic_inc(&pci_parity_count);
537 }
538 }
539 }
540 }
541
542 /*
543 * pci_dev parity list iterator
544 * Scan the PCI device list for one iteration, looking for SERRORs
545 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
546 */
547 static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
548 {
549 struct pci_dev *dev = NULL;
550
551 /* request for kernel access to the next PCI device, if any,
552 * and while we are looking at it have its reference count
553 * bumped until we are done with it
554 */
555 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
556 fn(dev);
557 }
558 }
559
560 static void do_pci_parity_check(void)
561 {
562 unsigned long flags;
563 int before_count;
564
565 debugf3("%s()\n", __func__);
566
567 if (!check_pci_parity)
568 return;
569
570 before_count = atomic_read(&pci_parity_count);
571
572 /* scan all PCI devices looking for a Parity Error on devices and
573 * bridges
574 */
575 local_irq_save(flags);
576 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
577 local_irq_restore(flags);
578
579 /* Only if operator has selected panic on PCI Error */
580 if (panic_on_pci_parity) {
581 /* If the count is different 'after' from 'before' */
582 if (before_count != atomic_read(&pci_parity_count))
583 panic("EDAC: PCI Parity Error");
584 }
585 }
586
587 static inline void clear_pci_parity_errors(void)
588 {
589 /* Clear any PCI bus parity errors that devices initially have logged
590 * in their registers.
591 */
592 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
593 }
594
595 #else /* CONFIG_PCI */
596
597 /* pre-process these away */
598 #define do_pci_parity_check()
599 #define clear_pci_parity_errors()
600 #define edac_sysfs_pci_teardown()
601 #define edac_sysfs_pci_setup() (0)
602
603 #endif /* CONFIG_PCI */
604
605 /* EDAC sysfs CSROW data structures and methods
606 */
607
608 /* Set of more default csrow<id> attribute show/store functions */
609 static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private)
610 {
611 return sprintf(data,"%u\n", csrow->ue_count);
612 }
613
614 static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private)
615 {
616 return sprintf(data,"%u\n", csrow->ce_count);
617 }
618
619 static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private)
620 {
621 return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
622 }
623
624 static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private)
625 {
626 return sprintf(data,"%s\n", mem_types[csrow->mtype]);
627 }
628
629 static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private)
630 {
631 return sprintf(data,"%s\n", dev_types[csrow->dtype]);
632 }
633
634 static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private)
635 {
636 return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
637 }
638
639 /* show/store functions for DIMM Label attributes */
640 static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
641 char *data, int channel)
642 {
643 return snprintf(data, EDAC_MC_LABEL_LEN,"%s",
644 csrow->channels[channel].label);
645 }
646
647 static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
648 const char *data,
649 size_t count,
650 int channel)
651 {
652 ssize_t max_size = 0;
653
654 max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1);
655 strncpy(csrow->channels[channel].label, data, max_size);
656 csrow->channels[channel].label[max_size] = '\0';
657
658 return max_size;
659 }
660
661 /* show function for dynamic chX_ce_count attribute */
662 static ssize_t channel_ce_count_show(struct csrow_info *csrow,
663 char *data,
664 int channel)
665 {
666 return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
667 }
668
669 /* csrow specific attribute structure */
670 struct csrowdev_attribute {
671 struct attribute attr;
672 ssize_t (*show)(struct csrow_info *,char *,int);
673 ssize_t (*store)(struct csrow_info *, const char *,size_t,int);
674 int private;
675 };
676
677 #define to_csrow(k) container_of(k, struct csrow_info, kobj)
678 #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
679
680 /* Set of show/store higher level functions for default csrow attributes */
681 static ssize_t csrowdev_show(struct kobject *kobj,
682 struct attribute *attr,
683 char *buffer)
684 {
685 struct csrow_info *csrow = to_csrow(kobj);
686 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
687
688 if (csrowdev_attr->show)
689 return csrowdev_attr->show(csrow,
690 buffer,
691 csrowdev_attr->private);
692 return -EIO;
693 }
694
695 static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
696 const char *buffer, size_t count)
697 {
698 struct csrow_info *csrow = to_csrow(kobj);
699 struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
700
701 if (csrowdev_attr->store)
702 return csrowdev_attr->store(csrow,
703 buffer,
704 count,
705 csrowdev_attr->private);
706 return -EIO;
707 }
708
709 static struct sysfs_ops csrowfs_ops = {
710 .show = csrowdev_show,
711 .store = csrowdev_store
712 };
713
714 #define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
715 struct csrowdev_attribute attr_##_name = { \
716 .attr = {.name = __stringify(_name), .mode = _mode }, \
717 .show = _show, \
718 .store = _store, \
719 .private = _private, \
720 };
721
722 /* default cwrow<id>/attribute files */
723 CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0);
724 CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0);
725 CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0);
726 CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0);
727 CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0);
728 CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0);
729
730 /* default attributes of the CSROW<id> object */
731 static struct csrowdev_attribute *default_csrow_attr[] = {
732 &attr_dev_type,
733 &attr_mem_type,
734 &attr_edac_mode,
735 &attr_size_mb,
736 &attr_ue_count,
737 &attr_ce_count,
738 NULL,
739 };
740
741
742 /* possible dynamic channel DIMM Label attribute files */
743 CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
744 channel_dimm_label_show,
745 channel_dimm_label_store,
746 0 );
747 CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
748 channel_dimm_label_show,
749 channel_dimm_label_store,
750 1 );
751 CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR,
752 channel_dimm_label_show,
753 channel_dimm_label_store,
754 2 );
755 CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR,
756 channel_dimm_label_show,
757 channel_dimm_label_store,
758 3 );
759 CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR,
760 channel_dimm_label_show,
761 channel_dimm_label_store,
762 4 );
763 CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR,
764 channel_dimm_label_show,
765 channel_dimm_label_store,
766 5 );
767
768 /* Total possible dynamic DIMM Label attribute file table */
769 static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
770 &attr_ch0_dimm_label,
771 &attr_ch1_dimm_label,
772 &attr_ch2_dimm_label,
773 &attr_ch3_dimm_label,
774 &attr_ch4_dimm_label,
775 &attr_ch5_dimm_label
776 };
777
778 /* possible dynamic channel ce_count attribute files */
779 CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR,
780 channel_ce_count_show,
781 NULL,
782 0 );
783 CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR,
784 channel_ce_count_show,
785 NULL,
786 1 );
787 CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR,
788 channel_ce_count_show,
789 NULL,
790 2 );
791 CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR,
792 channel_ce_count_show,
793 NULL,
794 3 );
795 CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR,
796 channel_ce_count_show,
797 NULL,
798 4 );
799 CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR,
800 channel_ce_count_show,
801 NULL,
802 5 );
803
804 /* Total possible dynamic ce_count attribute file table */
805 static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
806 &attr_ch0_ce_count,
807 &attr_ch1_ce_count,
808 &attr_ch2_ce_count,
809 &attr_ch3_ce_count,
810 &attr_ch4_ce_count,
811 &attr_ch5_ce_count
812 };
813
814
815 #define EDAC_NR_CHANNELS 6
816
817 /* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
818 static int edac_create_channel_files(struct kobject *kobj, int chan)
819 {
820 int err=-ENODEV;
821
822 if (chan >= EDAC_NR_CHANNELS)
823 return err;
824
825 /* create the DIMM label attribute file */
826 err = sysfs_create_file(kobj,
827 (struct attribute *) dynamic_csrow_dimm_attr[chan]);
828
829 if (!err) {
830 /* create the CE Count attribute file */
831 err = sysfs_create_file(kobj,
832 (struct attribute *) dynamic_csrow_ce_count_attr[chan]);
833 } else {
834 debugf1("%s() dimm labels and ce_count files created", __func__);
835 }
836
837 return err;
838 }
839
840 /* No memory to release for this kobj */
841 static void edac_csrow_instance_release(struct kobject *kobj)
842 {
843 struct csrow_info *cs;
844
845 cs = container_of(kobj, struct csrow_info, kobj);
846 complete(&cs->kobj_complete);
847 }
848
849 /* the kobj_type instance for a CSROW */
850 static struct kobj_type ktype_csrow = {
851 .release = edac_csrow_instance_release,
852 .sysfs_ops = &csrowfs_ops,
853 .default_attrs = (struct attribute **) default_csrow_attr,
854 };
855
856 /* Create a CSROW object under specifed edac_mc_device */
857 static int edac_create_csrow_object(
858 struct kobject *edac_mci_kobj,
859 struct csrow_info *csrow,
860 int index)
861 {
862 int err = 0;
863 int chan;
864
865 memset(&csrow->kobj, 0, sizeof(csrow->kobj));
866
867 /* generate ..../edac/mc/mc<id>/csrow<index> */
868
869 csrow->kobj.parent = edac_mci_kobj;
870 csrow->kobj.ktype = &ktype_csrow;
871
872 /* name this instance of csrow<id> */
873 err = kobject_set_name(&csrow->kobj,"csrow%d",index);
874 if (err)
875 goto error_exit;
876
877 /* Instanstiate the csrow object */
878 err = kobject_register(&csrow->kobj);
879 if (!err) {
880 /* Create the dyanmic attribute files on this csrow,
881 * namely, the DIMM labels and the channel ce_count
882 */
883 for (chan = 0; chan < csrow->nr_channels; chan++) {
884 err = edac_create_channel_files(&csrow->kobj,chan);
885 if (err)
886 break;
887 }
888 }
889
890 error_exit:
891 return err;
892 }
893
894 /* default sysfs methods and data structures for the main MCI kobject */
895
896 static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
897 const char *data, size_t count)
898 {
899 int row, chan;
900
901 mci->ue_noinfo_count = 0;
902 mci->ce_noinfo_count = 0;
903 mci->ue_count = 0;
904 mci->ce_count = 0;
905
906 for (row = 0; row < mci->nr_csrows; row++) {
907 struct csrow_info *ri = &mci->csrows[row];
908
909 ri->ue_count = 0;
910 ri->ce_count = 0;
911
912 for (chan = 0; chan < ri->nr_channels; chan++)
913 ri->channels[chan].ce_count = 0;
914 }
915
916 mci->start_time = jiffies;
917 return count;
918 }
919
920 /* default attribute files for the MCI object */
921 static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
922 {
923 return sprintf(data,"%d\n", mci->ue_count);
924 }
925
926 static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
927 {
928 return sprintf(data,"%d\n", mci->ce_count);
929 }
930
931 static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
932 {
933 return sprintf(data,"%d\n", mci->ce_noinfo_count);
934 }
935
936 static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
937 {
938 return sprintf(data,"%d\n", mci->ue_noinfo_count);
939 }
940
941 static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
942 {
943 return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
944 }
945
946 static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
947 {
948 return sprintf(data,"%s\n", mci->ctl_name);
949 }
950
951 static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
952 {
953 int total_pages, csrow_idx;
954
955 for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
956 csrow_idx++) {
957 struct csrow_info *csrow = &mci->csrows[csrow_idx];
958
959 if (!csrow->nr_pages)
960 continue;
961
962 total_pages += csrow->nr_pages;
963 }
964
965 return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
966 }
967
968 struct mcidev_attribute {
969 struct attribute attr;
970 ssize_t (*show)(struct mem_ctl_info *,char *);
971 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
972 };
973
974 #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
975 #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
976
977 /* MCI show/store functions for top most object */
978 static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
979 char *buffer)
980 {
981 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
982 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
983
984 if (mcidev_attr->show)
985 return mcidev_attr->show(mem_ctl_info, buffer);
986
987 return -EIO;
988 }
989
990 static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
991 const char *buffer, size_t count)
992 {
993 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
994 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
995
996 if (mcidev_attr->store)
997 return mcidev_attr->store(mem_ctl_info, buffer, count);
998
999 return -EIO;
1000 }
1001
1002 static struct sysfs_ops mci_ops = {
1003 .show = mcidev_show,
1004 .store = mcidev_store
1005 };
1006
1007 #define MCIDEV_ATTR(_name,_mode,_show,_store) \
1008 struct mcidev_attribute mci_attr_##_name = { \
1009 .attr = {.name = __stringify(_name), .mode = _mode }, \
1010 .show = _show, \
1011 .store = _store, \
1012 };
1013
1014 /* default Control file */
1015 MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
1016
1017 /* default Attribute files */
1018 MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
1019 MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
1020 MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
1021 MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
1022 MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
1023 MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
1024 MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
1025
1026 static struct mcidev_attribute *mci_attr[] = {
1027 &mci_attr_reset_counters,
1028 &mci_attr_mc_name,
1029 &mci_attr_size_mb,
1030 &mci_attr_seconds_since_reset,
1031 &mci_attr_ue_noinfo_count,
1032 &mci_attr_ce_noinfo_count,
1033 &mci_attr_ue_count,
1034 &mci_attr_ce_count,
1035 NULL
1036 };
1037
1038 /*
1039 * Release of a MC controlling instance
1040 */
1041 static void edac_mci_instance_release(struct kobject *kobj)
1042 {
1043 struct mem_ctl_info *mci;
1044
1045 mci = to_mci(kobj);
1046 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1047 complete(&mci->kobj_complete);
1048 }
1049
1050 static struct kobj_type ktype_mci = {
1051 .release = edac_mci_instance_release,
1052 .sysfs_ops = &mci_ops,
1053 .default_attrs = (struct attribute **) mci_attr,
1054 };
1055
1056
1057 #define EDAC_DEVICE_SYMLINK "device"
1058
1059 /*
1060 * Create a new Memory Controller kobject instance,
1061 * mc<id> under the 'mc' directory
1062 *
1063 * Return:
1064 * 0 Success
1065 * !0 Failure
1066 */
1067 static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
1068 {
1069 int i;
1070 int err;
1071 struct csrow_info *csrow;
1072 struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
1073
1074 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1075 memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
1076
1077 /* set the name of the mc<id> object */
1078 err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
1079 if (err)
1080 return err;
1081
1082 /* link to our parent the '..../edac/mc' object */
1083 edac_mci_kobj->parent = &edac_memctrl_kobj;
1084 edac_mci_kobj->ktype = &ktype_mci;
1085
1086 /* register the mc<id> kobject */
1087 err = kobject_register(edac_mci_kobj);
1088 if (err)
1089 return err;
1090
1091 /* create a symlink for the device */
1092 err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
1093 EDAC_DEVICE_SYMLINK);
1094 if (err)
1095 goto fail0;
1096
1097 /* Make directories for each CSROW object
1098 * under the mc<id> kobject
1099 */
1100 for (i = 0; i < mci->nr_csrows; i++) {
1101 csrow = &mci->csrows[i];
1102
1103 /* Only expose populated CSROWs */
1104 if (csrow->nr_pages > 0) {
1105 err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
1106 if (err)
1107 goto fail1;
1108 }
1109 }
1110
1111 return 0;
1112
1113 /* CSROW error: backout what has already been registered, */
1114 fail1:
1115 for ( i--; i >= 0; i--) {
1116 if (csrow->nr_pages > 0) {
1117 init_completion(&csrow->kobj_complete);
1118 kobject_unregister(&mci->csrows[i].kobj);
1119 wait_for_completion(&csrow->kobj_complete);
1120 }
1121 }
1122
1123 fail0:
1124 init_completion(&mci->kobj_complete);
1125 kobject_unregister(edac_mci_kobj);
1126 wait_for_completion(&mci->kobj_complete);
1127 return err;
1128 }
1129
1130 /*
1131 * remove a Memory Controller instance
1132 */
1133 static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1134 {
1135 int i;
1136
1137 debugf0("%s()\n", __func__);
1138
1139 /* remove all csrow kobjects */
1140 for (i = 0; i < mci->nr_csrows; i++) {
1141 if (mci->csrows[i].nr_pages > 0) {
1142 init_completion(&mci->csrows[i].kobj_complete);
1143 kobject_unregister(&mci->csrows[i].kobj);
1144 wait_for_completion(&mci->csrows[i].kobj_complete);
1145 }
1146 }
1147
1148 sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
1149 init_completion(&mci->kobj_complete);
1150 kobject_unregister(&mci->edac_mci_kobj);
1151 wait_for_completion(&mci->kobj_complete);
1152 }
1153
1154 /* END OF sysfs data and methods */
1155
1156 #ifdef CONFIG_EDAC_DEBUG
1157
1158 void edac_mc_dump_channel(struct channel_info *chan)
1159 {
1160 debugf4("\tchannel = %p\n", chan);
1161 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
1162 debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
1163 debugf4("\tchannel->label = '%s'\n", chan->label);
1164 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
1165 }
1166 EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
1167
1168 void edac_mc_dump_csrow(struct csrow_info *csrow)
1169 {
1170 debugf4("\tcsrow = %p\n", csrow);
1171 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
1172 debugf4("\tcsrow->first_page = 0x%lx\n",
1173 csrow->first_page);
1174 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
1175 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
1176 debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
1177 debugf4("\tcsrow->nr_channels = %d\n",
1178 csrow->nr_channels);
1179 debugf4("\tcsrow->channels = %p\n", csrow->channels);
1180 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
1181 }
1182 EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
1183
1184 void edac_mc_dump_mci(struct mem_ctl_info *mci)
1185 {
1186 debugf3("\tmci = %p\n", mci);
1187 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
1188 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
1189 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
1190 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
1191 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
1192 mci->nr_csrows, mci->csrows);
1193 debugf3("\tdev = %p\n", mci->dev);
1194 debugf3("\tmod_name:ctl_name = %s:%s\n",
1195 mci->mod_name, mci->ctl_name);
1196 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
1197 }
1198 EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
1199
1200 #endif /* CONFIG_EDAC_DEBUG */
1201
1202 /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
1203 * Adjust 'ptr' so that its alignment is at least as stringent as what the
1204 * compiler would provide for X and return the aligned result.
1205 *
1206 * If 'size' is a constant, the compiler will optimize this whole function
1207 * down to either a no-op or the addition of a constant to the value of 'ptr'.
1208 */
1209 static inline char * align_ptr(void *ptr, unsigned size)
1210 {
1211 unsigned align, r;
1212
1213 /* Here we assume that the alignment of a "long long" is the most
1214 * stringent alignment that the compiler will ever provide by default.
1215 * As far as I know, this is a reasonable assumption.
1216 */
1217 if (size > sizeof(long))
1218 align = sizeof(long long);
1219 else if (size > sizeof(int))
1220 align = sizeof(long);
1221 else if (size > sizeof(short))
1222 align = sizeof(int);
1223 else if (size > sizeof(char))
1224 align = sizeof(short);
1225 else
1226 return (char *) ptr;
1227
1228 r = size % align;
1229
1230 if (r == 0)
1231 return (char *) ptr;
1232
1233 return (char *) (((unsigned long) ptr) + align - r);
1234 }
1235
1236 /**
1237 * edac_mc_alloc: Allocate a struct mem_ctl_info structure
1238 * @size_pvt: size of private storage needed
1239 * @nr_csrows: Number of CWROWS needed for this MC
1240 * @nr_chans: Number of channels for the MC
1241 *
1242 * Everything is kmalloc'ed as one big chunk - more efficient.
1243 * Only can be used if all structures have the same lifetime - otherwise
1244 * you have to allocate and initialize your own structures.
1245 *
1246 * Use edac_mc_free() to free mc structures allocated by this function.
1247 *
1248 * Returns:
1249 * NULL allocation failed
1250 * struct mem_ctl_info pointer
1251 */
1252 struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
1253 unsigned nr_chans)
1254 {
1255 struct mem_ctl_info *mci;
1256 struct csrow_info *csi, *csrow;
1257 struct channel_info *chi, *chp, *chan;
1258 void *pvt;
1259 unsigned size;
1260 int row, chn;
1261
1262 /* Figure out the offsets of the various items from the start of an mc
1263 * structure. We want the alignment of each item to be at least as
1264 * stringent as what the compiler would provide if we could simply
1265 * hardcode everything into a single struct.
1266 */
1267 mci = (struct mem_ctl_info *) 0;
1268 csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
1269 chi = (struct channel_info *)
1270 align_ptr(&csi[nr_csrows], sizeof(*chi));
1271 pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
1272 size = ((unsigned long) pvt) + sz_pvt;
1273
1274 if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
1275 return NULL;
1276
1277 /* Adjust pointers so they point within the memory we just allocated
1278 * rather than an imaginary chunk of memory located at address 0.
1279 */
1280 csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
1281 chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
1282 pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
1283
1284 memset(mci, 0, size); /* clear all fields */
1285 mci->csrows = csi;
1286 mci->pvt_info = pvt;
1287 mci->nr_csrows = nr_csrows;
1288
1289 for (row = 0; row < nr_csrows; row++) {
1290 csrow = &csi[row];
1291 csrow->csrow_idx = row;
1292 csrow->mci = mci;
1293 csrow->nr_channels = nr_chans;
1294 chp = &chi[row * nr_chans];
1295 csrow->channels = chp;
1296
1297 for (chn = 0; chn < nr_chans; chn++) {
1298 chan = &chp[chn];
1299 chan->chan_idx = chn;
1300 chan->csrow = csrow;
1301 }
1302 }
1303
1304 return mci;
1305 }
1306 EXPORT_SYMBOL_GPL(edac_mc_alloc);
1307
1308 /**
1309 * edac_mc_free: Free a previously allocated 'mci' structure
1310 * @mci: pointer to a struct mem_ctl_info structure
1311 */
1312 void edac_mc_free(struct mem_ctl_info *mci)
1313 {
1314 kfree(mci);
1315 }
1316 EXPORT_SYMBOL_GPL(edac_mc_free);
1317
1318 static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
1319 {
1320 struct mem_ctl_info *mci;
1321 struct list_head *item;
1322
1323 debugf3("%s()\n", __func__);
1324
1325 list_for_each(item, &mc_devices) {
1326 mci = list_entry(item, struct mem_ctl_info, link);
1327
1328 if (mci->dev == dev)
1329 return mci;
1330 }
1331
1332 return NULL;
1333 }
1334
1335 /* Return 0 on success, 1 on failure.
1336 * Before calling this function, caller must
1337 * assign a unique value to mci->mc_idx.
1338 */
1339 static int add_mc_to_global_list (struct mem_ctl_info *mci)
1340 {
1341 struct list_head *item, *insert_before;
1342 struct mem_ctl_info *p;
1343
1344 insert_before = &mc_devices;
1345
1346 if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
1347 goto fail0;
1348
1349 list_for_each(item, &mc_devices) {
1350 p = list_entry(item, struct mem_ctl_info, link);
1351
1352 if (p->mc_idx >= mci->mc_idx) {
1353 if (unlikely(p->mc_idx == mci->mc_idx))
1354 goto fail1;
1355
1356 insert_before = item;
1357 break;
1358 }
1359 }
1360
1361 list_add_tail_rcu(&mci->link, insert_before);
1362 return 0;
1363
1364 fail0:
1365 edac_printk(KERN_WARNING, EDAC_MC,
1366 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
1367 dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
1368 return 1;
1369
1370 fail1:
1371 edac_printk(KERN_WARNING, EDAC_MC,
1372 "bug in low-level driver: attempt to assign\n"
1373 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
1374 return 1;
1375 }
1376
1377 static void complete_mc_list_del(struct rcu_head *head)
1378 {
1379 struct mem_ctl_info *mci;
1380
1381 mci = container_of(head, struct mem_ctl_info, rcu);
1382 INIT_LIST_HEAD(&mci->link);
1383 complete(&mci->complete);
1384 }
1385
1386 static void del_mc_from_global_list(struct mem_ctl_info *mci)
1387 {
1388 list_del_rcu(&mci->link);
1389 init_completion(&mci->complete);
1390 call_rcu(&mci->rcu, complete_mc_list_del);
1391 wait_for_completion(&mci->complete);
1392 }
1393
1394 /**
1395 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
1396 * create sysfs entries associated with mci structure
1397 * @mci: pointer to the mci structure to be added to the list
1398 * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
1399 *
1400 * Return:
1401 * 0 Success
1402 * !0 Failure
1403 */
1404
1405 /* FIXME - should a warning be printed if no error detection? correction? */
1406 int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
1407 {
1408 debugf0("%s()\n", __func__);
1409 mci->mc_idx = mc_idx;
1410 #ifdef CONFIG_EDAC_DEBUG
1411 if (edac_debug_level >= 3)
1412 edac_mc_dump_mci(mci);
1413
1414 if (edac_debug_level >= 4) {
1415 int i;
1416
1417 for (i = 0; i < mci->nr_csrows; i++) {
1418 int j;
1419
1420 edac_mc_dump_csrow(&mci->csrows[i]);
1421 for (j = 0; j < mci->csrows[i].nr_channels; j++)
1422 edac_mc_dump_channel(
1423 &mci->csrows[i].channels[j]);
1424 }
1425 }
1426 #endif
1427 down(&mem_ctls_mutex);
1428
1429 if (add_mc_to_global_list(mci))
1430 goto fail0;
1431
1432 /* set load time so that error rate can be tracked */
1433 mci->start_time = jiffies;
1434
1435 if (edac_create_sysfs_mci_device(mci)) {
1436 edac_mc_printk(mci, KERN_WARNING,
1437 "failed to create sysfs device\n");
1438 goto fail1;
1439 }
1440
1441 /* Report action taken */
1442 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
1443 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
1444
1445 up(&mem_ctls_mutex);
1446 return 0;
1447
1448 fail1:
1449 del_mc_from_global_list(mci);
1450
1451 fail0:
1452 up(&mem_ctls_mutex);
1453 return 1;
1454 }
1455 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
1456
1457 /**
1458 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
1459 * remove mci structure from global list
1460 * @pdev: Pointer to 'struct device' representing mci structure to remove.
1461 *
1462 * Return pointer to removed mci structure, or NULL if device not found.
1463 */
1464 struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
1465 {
1466 struct mem_ctl_info *mci;
1467
1468 debugf0("MC: %s()\n", __func__);
1469 down(&mem_ctls_mutex);
1470
1471 if ((mci = find_mci_by_dev(dev)) == NULL) {
1472 up(&mem_ctls_mutex);
1473 return NULL;
1474 }
1475
1476 edac_remove_sysfs_mci_device(mci);
1477 del_mc_from_global_list(mci);
1478 up(&mem_ctls_mutex);
1479 edac_printk(KERN_INFO, EDAC_MC,
1480 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
1481 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
1482 return mci;
1483 }
1484 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
1485
1486 void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
1487 {
1488 struct page *pg;
1489 void *virt_addr;
1490 unsigned long flags = 0;
1491
1492 debugf3("%s()\n", __func__);
1493
1494 /* ECC error page was not in our memory. Ignore it. */
1495 if(!pfn_valid(page))
1496 return;
1497
1498 /* Find the actual page structure then map it and fix */
1499 pg = pfn_to_page(page);
1500
1501 if (PageHighMem(pg))
1502 local_irq_save(flags);
1503
1504 virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
1505
1506 /* Perform architecture specific atomic scrub operation */
1507 atomic_scrub(virt_addr + offset, size);
1508
1509 /* Unmap and complete */
1510 kunmap_atomic(virt_addr, KM_BOUNCE_READ);
1511
1512 if (PageHighMem(pg))
1513 local_irq_restore(flags);
1514 }
1515 EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
1516
1517 /* FIXME - should return -1 */
1518 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
1519 {
1520 struct csrow_info *csrows = mci->csrows;
1521 int row, i;
1522
1523 debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
1524 row = -1;
1525
1526 for (i = 0; i < mci->nr_csrows; i++) {
1527 struct csrow_info *csrow = &csrows[i];
1528
1529 if (csrow->nr_pages == 0)
1530 continue;
1531
1532 debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
1533 "mask(0x%lx)\n", mci->mc_idx, __func__,
1534 csrow->first_page, page, csrow->last_page,
1535 csrow->page_mask);
1536
1537 if ((page >= csrow->first_page) &&
1538 (page <= csrow->last_page) &&
1539 ((page & csrow->page_mask) ==
1540 (csrow->first_page & csrow->page_mask))) {
1541 row = i;
1542 break;
1543 }
1544 }
1545
1546 if (row == -1)
1547 edac_mc_printk(mci, KERN_ERR,
1548 "could not look up page error address %lx\n",
1549 (unsigned long) page);
1550
1551 return row;
1552 }
1553 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
1554
1555 /* FIXME - setable log (warning/emerg) levels */
1556 /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
1557 void edac_mc_handle_ce(struct mem_ctl_info *mci,
1558 unsigned long page_frame_number, unsigned long offset_in_page,
1559 unsigned long syndrome, int row, int channel, const char *msg)
1560 {
1561 unsigned long remapped_page;
1562
1563 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
1564
1565 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1566 if (row >= mci->nr_csrows || row < 0) {
1567 /* something is wrong */
1568 edac_mc_printk(mci, KERN_ERR,
1569 "INTERNAL ERROR: row out of range "
1570 "(%d >= %d)\n", row, mci->nr_csrows);
1571 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1572 return;
1573 }
1574
1575 if (channel >= mci->csrows[row].nr_channels || channel < 0) {
1576 /* something is wrong */
1577 edac_mc_printk(mci, KERN_ERR,
1578 "INTERNAL ERROR: channel out of range "
1579 "(%d >= %d)\n", channel,
1580 mci->csrows[row].nr_channels);
1581 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1582 return;
1583 }
1584
1585 if (log_ce)
1586 /* FIXME - put in DIMM location */
1587 edac_mc_printk(mci, KERN_WARNING,
1588 "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
1589 "0x%lx, row %d, channel %d, label \"%s\": %s\n",
1590 page_frame_number, offset_in_page,
1591 mci->csrows[row].grain, syndrome, row, channel,
1592 mci->csrows[row].channels[channel].label, msg);
1593
1594 mci->ce_count++;
1595 mci->csrows[row].ce_count++;
1596 mci->csrows[row].channels[channel].ce_count++;
1597
1598 if (mci->scrub_mode & SCRUB_SW_SRC) {
1599 /*
1600 * Some MC's can remap memory so that it is still available
1601 * at a different address when PCI devices map into memory.
1602 * MC's that can't do this lose the memory where PCI devices
1603 * are mapped. This mapping is MC dependant and so we call
1604 * back into the MC driver for it to map the MC page to
1605 * a physical (CPU) page which can then be mapped to a virtual
1606 * page - which can then be scrubbed.
1607 */
1608 remapped_page = mci->ctl_page_to_phys ?
1609 mci->ctl_page_to_phys(mci, page_frame_number) :
1610 page_frame_number;
1611
1612 edac_mc_scrub_block(remapped_page, offset_in_page,
1613 mci->csrows[row].grain);
1614 }
1615 }
1616 EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
1617
1618 void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
1619 {
1620 if (log_ce)
1621 edac_mc_printk(mci, KERN_WARNING,
1622 "CE - no information available: %s\n", msg);
1623
1624 mci->ce_noinfo_count++;
1625 mci->ce_count++;
1626 }
1627 EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
1628
1629 void edac_mc_handle_ue(struct mem_ctl_info *mci,
1630 unsigned long page_frame_number, unsigned long offset_in_page,
1631 int row, const char *msg)
1632 {
1633 int len = EDAC_MC_LABEL_LEN * 4;
1634 char labels[len + 1];
1635 char *pos = labels;
1636 int chan;
1637 int chars;
1638
1639 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
1640
1641 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1642 if (row >= mci->nr_csrows || row < 0) {
1643 /* something is wrong */
1644 edac_mc_printk(mci, KERN_ERR,
1645 "INTERNAL ERROR: row out of range "
1646 "(%d >= %d)\n", row, mci->nr_csrows);
1647 edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
1648 return;
1649 }
1650
1651 chars = snprintf(pos, len + 1, "%s",
1652 mci->csrows[row].channels[0].label);
1653 len -= chars;
1654 pos += chars;
1655
1656 for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
1657 chan++) {
1658 chars = snprintf(pos, len + 1, ":%s",
1659 mci->csrows[row].channels[chan].label);
1660 len -= chars;
1661 pos += chars;
1662 }
1663
1664 if (log_ue)
1665 edac_mc_printk(mci, KERN_EMERG,
1666 "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
1667 "labels \"%s\": %s\n", page_frame_number,
1668 offset_in_page, mci->csrows[row].grain, row, labels,
1669 msg);
1670
1671 if (panic_on_ue)
1672 panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
1673 "row %d, labels \"%s\": %s\n", mci->mc_idx,
1674 page_frame_number, offset_in_page,
1675 mci->csrows[row].grain, row, labels, msg);
1676
1677 mci->ue_count++;
1678 mci->csrows[row].ue_count++;
1679 }
1680 EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
1681
1682 void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
1683 {
1684 if (panic_on_ue)
1685 panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
1686
1687 if (log_ue)
1688 edac_mc_printk(mci, KERN_WARNING,
1689 "UE - no information available: %s\n", msg);
1690 mci->ue_noinfo_count++;
1691 mci->ue_count++;
1692 }
1693 EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
1694
1695
1696 /*
1697 * Iterate over all MC instances and check for ECC, et al, errors
1698 */
1699 static inline void check_mc_devices(void)
1700 {
1701 struct list_head *item;
1702 struct mem_ctl_info *mci;
1703
1704 debugf3("%s()\n", __func__);
1705 down(&mem_ctls_mutex);
1706
1707 list_for_each(item, &mc_devices) {
1708 mci = list_entry(item, struct mem_ctl_info, link);
1709
1710 if (mci->edac_check != NULL)
1711 mci->edac_check(mci);
1712 }
1713
1714 up(&mem_ctls_mutex);
1715 }
1716
1717 /*
1718 * Check MC status every poll_msec.
1719 * Check PCI status every poll_msec as well.
1720 *
1721 * This where the work gets done for edac.
1722 *
1723 * SMP safe, doesn't use NMI, and auto-rate-limits.
1724 */
1725 static void do_edac_check(void)
1726 {
1727 debugf3("%s()\n", __func__);
1728 check_mc_devices();
1729 do_pci_parity_check();
1730 }
1731
1732 static int edac_kernel_thread(void *arg)
1733 {
1734 while (!kthread_should_stop()) {
1735 do_edac_check();
1736
1737 /* goto sleep for the interval */
1738 schedule_timeout_interruptible((HZ * poll_msec) / 1000);
1739 try_to_freeze();
1740 }
1741
1742 return 0;
1743 }
1744
1745 /*
1746 * edac_mc_init
1747 * module initialization entry point
1748 */
1749 static int __init edac_mc_init(void)
1750 {
1751 edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
1752
1753 /*
1754 * Harvest and clear any boot/initialization PCI parity errors
1755 *
1756 * FIXME: This only clears errors logged by devices present at time of
1757 * module initialization. We should also do an initial clear
1758 * of each newly hotplugged device.
1759 */
1760 clear_pci_parity_errors();
1761
1762 /* Create the MC sysfs entries */
1763 if (edac_sysfs_memctrl_setup()) {
1764 edac_printk(KERN_ERR, EDAC_MC,
1765 "Error initializing sysfs code\n");
1766 return -ENODEV;
1767 }
1768
1769 /* Create the PCI parity sysfs entries */
1770 if (edac_sysfs_pci_setup()) {
1771 edac_sysfs_memctrl_teardown();
1772 edac_printk(KERN_ERR, EDAC_MC,
1773 "EDAC PCI: Error initializing sysfs code\n");
1774 return -ENODEV;
1775 }
1776
1777 /* create our kernel thread */
1778 edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
1779
1780 if (IS_ERR(edac_thread)) {
1781 /* remove the sysfs entries */
1782 edac_sysfs_memctrl_teardown();
1783 edac_sysfs_pci_teardown();
1784 return PTR_ERR(edac_thread);
1785 }
1786
1787 return 0;
1788 }
1789
1790 /*
1791 * edac_mc_exit()
1792 * module exit/termination functioni
1793 */
1794 static void __exit edac_mc_exit(void)
1795 {
1796 debugf0("%s()\n", __func__);
1797 kthread_stop(edac_thread);
1798
1799 /* tear down the sysfs device */
1800 edac_sysfs_memctrl_teardown();
1801 edac_sysfs_pci_teardown();
1802 }
1803
1804 module_init(edac_mc_init);
1805 module_exit(edac_mc_exit);
1806
1807 MODULE_LICENSE("GPL");
1808 MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
1809 "Based on work by Dan Hollis et al");
1810 MODULE_DESCRIPTION("Core library routines for MC reporting");
1811
1812 module_param(panic_on_ue, int, 0644);
1813 MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
1814 #ifdef CONFIG_PCI
1815 module_param(check_pci_parity, int, 0644);
1816 MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
1817 module_param(panic_on_pci_parity, int, 0644);
1818 MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
1819 #endif
1820 module_param(log_ue, int, 0644);
1821 MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
1822 module_param(log_ce, int, 0644);
1823 MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
1824 module_param(poll_msec, int, 0644);
1825 MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
1826 #ifdef CONFIG_EDAC_DEBUG
1827 module_param(edac_debug_level, int, 0644);
1828 MODULE_PARM_DESC(edac_debug_level, "Debug level");
1829 #endif
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