]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/edac/edac_mc_sysfs.c
selftests: check hot-pluggagble memory for memory-hotplug test
[mirror_ubuntu-zesty-kernel.git] / drivers / edac / edac_mc_sysfs.c
1 /*
2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
9 *
10 * (c) 2012-2013 - Mauro Carvalho Chehab
11 * The entire API were re-written, and ported to use struct device
12 *
13 */
14
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
21
22 #include "edac_mc.h"
23 #include "edac_module.h"
24
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue = 1;
27 static int edac_mc_log_ce = 1;
28 static int edac_mc_panic_on_ue;
29 static int edac_mc_poll_msec = 1000;
30
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
33 {
34 return edac_mc_log_ue;
35 }
36
37 int edac_mc_get_log_ce(void)
38 {
39 return edac_mc_log_ce;
40 }
41
42 int edac_mc_get_panic_on_ue(void)
43 {
44 return edac_mc_panic_on_ue;
45 }
46
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
49 {
50 return edac_mc_poll_msec;
51 }
52
53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54 {
55 unsigned long l;
56 int ret;
57
58 if (!val)
59 return -EINVAL;
60
61 ret = kstrtoul(val, 0, &l);
62 if (ret)
63 return ret;
64
65 if (l < 1000)
66 return -EINVAL;
67
68 *((unsigned long *)kp->arg) = l;
69
70 /* notify edac_mc engine to reset the poll period */
71 edac_mc_reset_delay_period(l);
72
73 return 0;
74 }
75
76 /* Parameter declarations for above */
77 module_param(edac_mc_panic_on_ue, int, 0644);
78 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
79 module_param(edac_mc_log_ue, int, 0644);
80 MODULE_PARM_DESC(edac_mc_log_ue,
81 "Log uncorrectable error to console: 0=off 1=on");
82 module_param(edac_mc_log_ce, int, 0644);
83 MODULE_PARM_DESC(edac_mc_log_ce,
84 "Log correctable error to console: 0=off 1=on");
85 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
86 &edac_mc_poll_msec, 0644);
87 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
88
89 static struct device *mci_pdev;
90
91 /*
92 * various constants for Memory Controllers
93 */
94 static const char * const mem_types[] = {
95 [MEM_EMPTY] = "Empty",
96 [MEM_RESERVED] = "Reserved",
97 [MEM_UNKNOWN] = "Unknown",
98 [MEM_FPM] = "FPM",
99 [MEM_EDO] = "EDO",
100 [MEM_BEDO] = "BEDO",
101 [MEM_SDR] = "Unbuffered-SDR",
102 [MEM_RDR] = "Registered-SDR",
103 [MEM_DDR] = "Unbuffered-DDR",
104 [MEM_RDDR] = "Registered-DDR",
105 [MEM_RMBS] = "RMBS",
106 [MEM_DDR2] = "Unbuffered-DDR2",
107 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
108 [MEM_RDDR2] = "Registered-DDR2",
109 [MEM_XDR] = "XDR",
110 [MEM_DDR3] = "Unbuffered-DDR3",
111 [MEM_RDDR3] = "Registered-DDR3",
112 [MEM_DDR4] = "Unbuffered-DDR4",
113 [MEM_RDDR4] = "Registered-DDR4"
114 };
115
116 static const char * const dev_types[] = {
117 [DEV_UNKNOWN] = "Unknown",
118 [DEV_X1] = "x1",
119 [DEV_X2] = "x2",
120 [DEV_X4] = "x4",
121 [DEV_X8] = "x8",
122 [DEV_X16] = "x16",
123 [DEV_X32] = "x32",
124 [DEV_X64] = "x64"
125 };
126
127 static const char * const edac_caps[] = {
128 [EDAC_UNKNOWN] = "Unknown",
129 [EDAC_NONE] = "None",
130 [EDAC_RESERVED] = "Reserved",
131 [EDAC_PARITY] = "PARITY",
132 [EDAC_EC] = "EC",
133 [EDAC_SECDED] = "SECDED",
134 [EDAC_S2ECD2ED] = "S2ECD2ED",
135 [EDAC_S4ECD4ED] = "S4ECD4ED",
136 [EDAC_S8ECD8ED] = "S8ECD8ED",
137 [EDAC_S16ECD16ED] = "S16ECD16ED"
138 };
139
140 #ifdef CONFIG_EDAC_LEGACY_SYSFS
141 /*
142 * EDAC sysfs CSROW data structures and methods
143 */
144
145 #define to_csrow(k) container_of(k, struct csrow_info, dev)
146
147 /*
148 * We need it to avoid namespace conflicts between the legacy API
149 * and the per-dimm/per-rank one
150 */
151 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
152 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
153
154 struct dev_ch_attribute {
155 struct device_attribute attr;
156 int channel;
157 };
158
159 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
160 static struct dev_ch_attribute dev_attr_legacy_##_name = \
161 { __ATTR(_name, _mode, _show, _store), (_var) }
162
163 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
164
165 /* Set of more default csrow<id> attribute show/store functions */
166 static ssize_t csrow_ue_count_show(struct device *dev,
167 struct device_attribute *mattr, char *data)
168 {
169 struct csrow_info *csrow = to_csrow(dev);
170
171 return sprintf(data, "%u\n", csrow->ue_count);
172 }
173
174 static ssize_t csrow_ce_count_show(struct device *dev,
175 struct device_attribute *mattr, char *data)
176 {
177 struct csrow_info *csrow = to_csrow(dev);
178
179 return sprintf(data, "%u\n", csrow->ce_count);
180 }
181
182 static ssize_t csrow_size_show(struct device *dev,
183 struct device_attribute *mattr, char *data)
184 {
185 struct csrow_info *csrow = to_csrow(dev);
186 int i;
187 u32 nr_pages = 0;
188
189 for (i = 0; i < csrow->nr_channels; i++)
190 nr_pages += csrow->channels[i]->dimm->nr_pages;
191 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
192 }
193
194 static ssize_t csrow_mem_type_show(struct device *dev,
195 struct device_attribute *mattr, char *data)
196 {
197 struct csrow_info *csrow = to_csrow(dev);
198
199 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
200 }
201
202 static ssize_t csrow_dev_type_show(struct device *dev,
203 struct device_attribute *mattr, char *data)
204 {
205 struct csrow_info *csrow = to_csrow(dev);
206
207 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
208 }
209
210 static ssize_t csrow_edac_mode_show(struct device *dev,
211 struct device_attribute *mattr,
212 char *data)
213 {
214 struct csrow_info *csrow = to_csrow(dev);
215
216 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
217 }
218
219 /* show/store functions for DIMM Label attributes */
220 static ssize_t channel_dimm_label_show(struct device *dev,
221 struct device_attribute *mattr,
222 char *data)
223 {
224 struct csrow_info *csrow = to_csrow(dev);
225 unsigned chan = to_channel(mattr);
226 struct rank_info *rank = csrow->channels[chan];
227
228 /* if field has not been initialized, there is nothing to send */
229 if (!rank->dimm->label[0])
230 return 0;
231
232 return snprintf(data, sizeof(rank->dimm->label) + 1, "%s\n",
233 rank->dimm->label);
234 }
235
236 static ssize_t channel_dimm_label_store(struct device *dev,
237 struct device_attribute *mattr,
238 const char *data, size_t count)
239 {
240 struct csrow_info *csrow = to_csrow(dev);
241 unsigned chan = to_channel(mattr);
242 struct rank_info *rank = csrow->channels[chan];
243 size_t copy_count = count;
244
245 if (count == 0)
246 return -EINVAL;
247
248 if (data[count - 1] == '\0' || data[count - 1] == '\n')
249 copy_count -= 1;
250
251 if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label))
252 return -EINVAL;
253
254 strncpy(rank->dimm->label, data, copy_count);
255 rank->dimm->label[copy_count] = '\0';
256
257 return count;
258 }
259
260 /* show function for dynamic chX_ce_count attribute */
261 static ssize_t channel_ce_count_show(struct device *dev,
262 struct device_attribute *mattr, char *data)
263 {
264 struct csrow_info *csrow = to_csrow(dev);
265 unsigned chan = to_channel(mattr);
266 struct rank_info *rank = csrow->channels[chan];
267
268 return sprintf(data, "%u\n", rank->ce_count);
269 }
270
271 /* cwrow<id>/attribute files */
272 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
273 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
274 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
275 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
276 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
277 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
278
279 /* default attributes of the CSROW<id> object */
280 static struct attribute *csrow_attrs[] = {
281 &dev_attr_legacy_dev_type.attr,
282 &dev_attr_legacy_mem_type.attr,
283 &dev_attr_legacy_edac_mode.attr,
284 &dev_attr_legacy_size_mb.attr,
285 &dev_attr_legacy_ue_count.attr,
286 &dev_attr_legacy_ce_count.attr,
287 NULL,
288 };
289
290 static struct attribute_group csrow_attr_grp = {
291 .attrs = csrow_attrs,
292 };
293
294 static const struct attribute_group *csrow_attr_groups[] = {
295 &csrow_attr_grp,
296 NULL
297 };
298
299 static void csrow_attr_release(struct device *dev)
300 {
301 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
302
303 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
304 kfree(csrow);
305 }
306
307 static struct device_type csrow_attr_type = {
308 .groups = csrow_attr_groups,
309 .release = csrow_attr_release,
310 };
311
312 /*
313 * possible dynamic channel DIMM Label attribute files
314 *
315 */
316 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
317 channel_dimm_label_show, channel_dimm_label_store, 0);
318 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
319 channel_dimm_label_show, channel_dimm_label_store, 1);
320 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
321 channel_dimm_label_show, channel_dimm_label_store, 2);
322 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
323 channel_dimm_label_show, channel_dimm_label_store, 3);
324 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
325 channel_dimm_label_show, channel_dimm_label_store, 4);
326 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
327 channel_dimm_label_show, channel_dimm_label_store, 5);
328 DEVICE_CHANNEL(ch6_dimm_label, S_IRUGO | S_IWUSR,
329 channel_dimm_label_show, channel_dimm_label_store, 6);
330 DEVICE_CHANNEL(ch7_dimm_label, S_IRUGO | S_IWUSR,
331 channel_dimm_label_show, channel_dimm_label_store, 7);
332
333 /* Total possible dynamic DIMM Label attribute file table */
334 static struct attribute *dynamic_csrow_dimm_attr[] = {
335 &dev_attr_legacy_ch0_dimm_label.attr.attr,
336 &dev_attr_legacy_ch1_dimm_label.attr.attr,
337 &dev_attr_legacy_ch2_dimm_label.attr.attr,
338 &dev_attr_legacy_ch3_dimm_label.attr.attr,
339 &dev_attr_legacy_ch4_dimm_label.attr.attr,
340 &dev_attr_legacy_ch5_dimm_label.attr.attr,
341 &dev_attr_legacy_ch6_dimm_label.attr.attr,
342 &dev_attr_legacy_ch7_dimm_label.attr.attr,
343 NULL
344 };
345
346 /* possible dynamic channel ce_count attribute files */
347 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
348 channel_ce_count_show, NULL, 0);
349 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
350 channel_ce_count_show, NULL, 1);
351 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
352 channel_ce_count_show, NULL, 2);
353 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
354 channel_ce_count_show, NULL, 3);
355 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
356 channel_ce_count_show, NULL, 4);
357 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
358 channel_ce_count_show, NULL, 5);
359 DEVICE_CHANNEL(ch6_ce_count, S_IRUGO,
360 channel_ce_count_show, NULL, 6);
361 DEVICE_CHANNEL(ch7_ce_count, S_IRUGO,
362 channel_ce_count_show, NULL, 7);
363
364 /* Total possible dynamic ce_count attribute file table */
365 static struct attribute *dynamic_csrow_ce_count_attr[] = {
366 &dev_attr_legacy_ch0_ce_count.attr.attr,
367 &dev_attr_legacy_ch1_ce_count.attr.attr,
368 &dev_attr_legacy_ch2_ce_count.attr.attr,
369 &dev_attr_legacy_ch3_ce_count.attr.attr,
370 &dev_attr_legacy_ch4_ce_count.attr.attr,
371 &dev_attr_legacy_ch5_ce_count.attr.attr,
372 &dev_attr_legacy_ch6_ce_count.attr.attr,
373 &dev_attr_legacy_ch7_ce_count.attr.attr,
374 NULL
375 };
376
377 static umode_t csrow_dev_is_visible(struct kobject *kobj,
378 struct attribute *attr, int idx)
379 {
380 struct device *dev = kobj_to_dev(kobj);
381 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
382
383 if (idx >= csrow->nr_channels)
384 return 0;
385
386 if (idx >= ARRAY_SIZE(dynamic_csrow_ce_count_attr) - 1) {
387 WARN_ONCE(1, "idx: %d\n", idx);
388 return 0;
389 }
390
391 /* Only expose populated DIMMs */
392 if (!csrow->channels[idx]->dimm->nr_pages)
393 return 0;
394
395 return attr->mode;
396 }
397
398
399 static const struct attribute_group csrow_dev_dimm_group = {
400 .attrs = dynamic_csrow_dimm_attr,
401 .is_visible = csrow_dev_is_visible,
402 };
403
404 static const struct attribute_group csrow_dev_ce_count_group = {
405 .attrs = dynamic_csrow_ce_count_attr,
406 .is_visible = csrow_dev_is_visible,
407 };
408
409 static const struct attribute_group *csrow_dev_groups[] = {
410 &csrow_dev_dimm_group,
411 &csrow_dev_ce_count_group,
412 NULL
413 };
414
415 static inline int nr_pages_per_csrow(struct csrow_info *csrow)
416 {
417 int chan, nr_pages = 0;
418
419 for (chan = 0; chan < csrow->nr_channels; chan++)
420 nr_pages += csrow->channels[chan]->dimm->nr_pages;
421
422 return nr_pages;
423 }
424
425 /* Create a CSROW object under specifed edac_mc_device */
426 static int edac_create_csrow_object(struct mem_ctl_info *mci,
427 struct csrow_info *csrow, int index)
428 {
429 csrow->dev.type = &csrow_attr_type;
430 csrow->dev.bus = mci->bus;
431 csrow->dev.groups = csrow_dev_groups;
432 device_initialize(&csrow->dev);
433 csrow->dev.parent = &mci->dev;
434 csrow->mci = mci;
435 dev_set_name(&csrow->dev, "csrow%d", index);
436 dev_set_drvdata(&csrow->dev, csrow);
437
438 edac_dbg(0, "creating (virtual) csrow node %s\n",
439 dev_name(&csrow->dev));
440
441 return device_add(&csrow->dev);
442 }
443
444 /* Create a CSROW object under specifed edac_mc_device */
445 static int edac_create_csrow_objects(struct mem_ctl_info *mci)
446 {
447 int err, i;
448 struct csrow_info *csrow;
449
450 for (i = 0; i < mci->nr_csrows; i++) {
451 csrow = mci->csrows[i];
452 if (!nr_pages_per_csrow(csrow))
453 continue;
454 err = edac_create_csrow_object(mci, mci->csrows[i], i);
455 if (err < 0) {
456 edac_dbg(1,
457 "failure: create csrow objects for csrow %d\n",
458 i);
459 goto error;
460 }
461 }
462 return 0;
463
464 error:
465 for (--i; i >= 0; i--) {
466 csrow = mci->csrows[i];
467 if (!nr_pages_per_csrow(csrow))
468 continue;
469 put_device(&mci->csrows[i]->dev);
470 }
471
472 return err;
473 }
474
475 static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
476 {
477 int i;
478 struct csrow_info *csrow;
479
480 for (i = mci->nr_csrows - 1; i >= 0; i--) {
481 csrow = mci->csrows[i];
482 if (!nr_pages_per_csrow(csrow))
483 continue;
484 device_unregister(&mci->csrows[i]->dev);
485 }
486 }
487 #endif
488
489 /*
490 * Per-dimm (or per-rank) devices
491 */
492
493 #define to_dimm(k) container_of(k, struct dimm_info, dev)
494
495 /* show/store functions for DIMM Label attributes */
496 static ssize_t dimmdev_location_show(struct device *dev,
497 struct device_attribute *mattr, char *data)
498 {
499 struct dimm_info *dimm = to_dimm(dev);
500
501 return edac_dimm_info_location(dimm, data, PAGE_SIZE);
502 }
503
504 static ssize_t dimmdev_label_show(struct device *dev,
505 struct device_attribute *mattr, char *data)
506 {
507 struct dimm_info *dimm = to_dimm(dev);
508
509 /* if field has not been initialized, there is nothing to send */
510 if (!dimm->label[0])
511 return 0;
512
513 return snprintf(data, sizeof(dimm->label) + 1, "%s\n", dimm->label);
514 }
515
516 static ssize_t dimmdev_label_store(struct device *dev,
517 struct device_attribute *mattr,
518 const char *data,
519 size_t count)
520 {
521 struct dimm_info *dimm = to_dimm(dev);
522 size_t copy_count = count;
523
524 if (count == 0)
525 return -EINVAL;
526
527 if (data[count - 1] == '\0' || data[count - 1] == '\n')
528 copy_count -= 1;
529
530 if (copy_count == 0 || copy_count >= sizeof(dimm->label))
531 return -EINVAL;
532
533 strncpy(dimm->label, data, copy_count);
534 dimm->label[copy_count] = '\0';
535
536 return count;
537 }
538
539 static ssize_t dimmdev_size_show(struct device *dev,
540 struct device_attribute *mattr, char *data)
541 {
542 struct dimm_info *dimm = to_dimm(dev);
543
544 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
545 }
546
547 static ssize_t dimmdev_mem_type_show(struct device *dev,
548 struct device_attribute *mattr, char *data)
549 {
550 struct dimm_info *dimm = to_dimm(dev);
551
552 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
553 }
554
555 static ssize_t dimmdev_dev_type_show(struct device *dev,
556 struct device_attribute *mattr, char *data)
557 {
558 struct dimm_info *dimm = to_dimm(dev);
559
560 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
561 }
562
563 static ssize_t dimmdev_edac_mode_show(struct device *dev,
564 struct device_attribute *mattr,
565 char *data)
566 {
567 struct dimm_info *dimm = to_dimm(dev);
568
569 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
570 }
571
572 /* dimm/rank attribute files */
573 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
574 dimmdev_label_show, dimmdev_label_store);
575 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
576 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
577 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
578 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
579 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
580
581 /* attributes of the dimm<id>/rank<id> object */
582 static struct attribute *dimm_attrs[] = {
583 &dev_attr_dimm_label.attr,
584 &dev_attr_dimm_location.attr,
585 &dev_attr_size.attr,
586 &dev_attr_dimm_mem_type.attr,
587 &dev_attr_dimm_dev_type.attr,
588 &dev_attr_dimm_edac_mode.attr,
589 NULL,
590 };
591
592 static struct attribute_group dimm_attr_grp = {
593 .attrs = dimm_attrs,
594 };
595
596 static const struct attribute_group *dimm_attr_groups[] = {
597 &dimm_attr_grp,
598 NULL
599 };
600
601 static void dimm_attr_release(struct device *dev)
602 {
603 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
604
605 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
606 kfree(dimm);
607 }
608
609 static struct device_type dimm_attr_type = {
610 .groups = dimm_attr_groups,
611 .release = dimm_attr_release,
612 };
613
614 /* Create a DIMM object under specifed memory controller device */
615 static int edac_create_dimm_object(struct mem_ctl_info *mci,
616 struct dimm_info *dimm,
617 int index)
618 {
619 int err;
620 dimm->mci = mci;
621
622 dimm->dev.type = &dimm_attr_type;
623 dimm->dev.bus = mci->bus;
624 device_initialize(&dimm->dev);
625
626 dimm->dev.parent = &mci->dev;
627 if (mci->csbased)
628 dev_set_name(&dimm->dev, "rank%d", index);
629 else
630 dev_set_name(&dimm->dev, "dimm%d", index);
631 dev_set_drvdata(&dimm->dev, dimm);
632 pm_runtime_forbid(&mci->dev);
633
634 err = device_add(&dimm->dev);
635
636 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
637
638 return err;
639 }
640
641 /*
642 * Memory controller device
643 */
644
645 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
646
647 static ssize_t mci_reset_counters_store(struct device *dev,
648 struct device_attribute *mattr,
649 const char *data, size_t count)
650 {
651 struct mem_ctl_info *mci = to_mci(dev);
652 int cnt, row, chan, i;
653 mci->ue_mc = 0;
654 mci->ce_mc = 0;
655 mci->ue_noinfo_count = 0;
656 mci->ce_noinfo_count = 0;
657
658 for (row = 0; row < mci->nr_csrows; row++) {
659 struct csrow_info *ri = mci->csrows[row];
660
661 ri->ue_count = 0;
662 ri->ce_count = 0;
663
664 for (chan = 0; chan < ri->nr_channels; chan++)
665 ri->channels[chan]->ce_count = 0;
666 }
667
668 cnt = 1;
669 for (i = 0; i < mci->n_layers; i++) {
670 cnt *= mci->layers[i].size;
671 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
672 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
673 }
674
675 mci->start_time = jiffies;
676 return count;
677 }
678
679 /* Memory scrubbing interface:
680 *
681 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
682 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
683 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
684 *
685 * Negative value still means that an error has occurred while setting
686 * the scrub rate.
687 */
688 static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
689 struct device_attribute *mattr,
690 const char *data, size_t count)
691 {
692 struct mem_ctl_info *mci = to_mci(dev);
693 unsigned long bandwidth = 0;
694 int new_bw = 0;
695
696 if (kstrtoul(data, 10, &bandwidth) < 0)
697 return -EINVAL;
698
699 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
700 if (new_bw < 0) {
701 edac_printk(KERN_WARNING, EDAC_MC,
702 "Error setting scrub rate to: %lu\n", bandwidth);
703 return -EINVAL;
704 }
705
706 return count;
707 }
708
709 /*
710 * ->get_sdram_scrub_rate() return value semantics same as above.
711 */
712 static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
713 struct device_attribute *mattr,
714 char *data)
715 {
716 struct mem_ctl_info *mci = to_mci(dev);
717 int bandwidth = 0;
718
719 bandwidth = mci->get_sdram_scrub_rate(mci);
720 if (bandwidth < 0) {
721 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
722 return bandwidth;
723 }
724
725 return sprintf(data, "%d\n", bandwidth);
726 }
727
728 /* default attribute files for the MCI object */
729 static ssize_t mci_ue_count_show(struct device *dev,
730 struct device_attribute *mattr,
731 char *data)
732 {
733 struct mem_ctl_info *mci = to_mci(dev);
734
735 return sprintf(data, "%d\n", mci->ue_mc);
736 }
737
738 static ssize_t mci_ce_count_show(struct device *dev,
739 struct device_attribute *mattr,
740 char *data)
741 {
742 struct mem_ctl_info *mci = to_mci(dev);
743
744 return sprintf(data, "%d\n", mci->ce_mc);
745 }
746
747 static ssize_t mci_ce_noinfo_show(struct device *dev,
748 struct device_attribute *mattr,
749 char *data)
750 {
751 struct mem_ctl_info *mci = to_mci(dev);
752
753 return sprintf(data, "%d\n", mci->ce_noinfo_count);
754 }
755
756 static ssize_t mci_ue_noinfo_show(struct device *dev,
757 struct device_attribute *mattr,
758 char *data)
759 {
760 struct mem_ctl_info *mci = to_mci(dev);
761
762 return sprintf(data, "%d\n", mci->ue_noinfo_count);
763 }
764
765 static ssize_t mci_seconds_show(struct device *dev,
766 struct device_attribute *mattr,
767 char *data)
768 {
769 struct mem_ctl_info *mci = to_mci(dev);
770
771 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
772 }
773
774 static ssize_t mci_ctl_name_show(struct device *dev,
775 struct device_attribute *mattr,
776 char *data)
777 {
778 struct mem_ctl_info *mci = to_mci(dev);
779
780 return sprintf(data, "%s\n", mci->ctl_name);
781 }
782
783 static ssize_t mci_size_mb_show(struct device *dev,
784 struct device_attribute *mattr,
785 char *data)
786 {
787 struct mem_ctl_info *mci = to_mci(dev);
788 int total_pages = 0, csrow_idx, j;
789
790 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
791 struct csrow_info *csrow = mci->csrows[csrow_idx];
792
793 for (j = 0; j < csrow->nr_channels; j++) {
794 struct dimm_info *dimm = csrow->channels[j]->dimm;
795
796 total_pages += dimm->nr_pages;
797 }
798 }
799
800 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
801 }
802
803 static ssize_t mci_max_location_show(struct device *dev,
804 struct device_attribute *mattr,
805 char *data)
806 {
807 struct mem_ctl_info *mci = to_mci(dev);
808 int i;
809 char *p = data;
810
811 for (i = 0; i < mci->n_layers; i++) {
812 p += sprintf(p, "%s %d ",
813 edac_layer_name[mci->layers[i].type],
814 mci->layers[i].size - 1);
815 }
816
817 return p - data;
818 }
819
820 /* default Control file */
821 static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
822
823 /* default Attribute files */
824 static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
825 static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
826 static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
827 static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
828 static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
829 static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
830 static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
831 static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
832
833 /* memory scrubber attribute file */
834 DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show,
835 mci_sdram_scrub_rate_store); /* umode set later in is_visible */
836
837 static struct attribute *mci_attrs[] = {
838 &dev_attr_reset_counters.attr,
839 &dev_attr_mc_name.attr,
840 &dev_attr_size_mb.attr,
841 &dev_attr_seconds_since_reset.attr,
842 &dev_attr_ue_noinfo_count.attr,
843 &dev_attr_ce_noinfo_count.attr,
844 &dev_attr_ue_count.attr,
845 &dev_attr_ce_count.attr,
846 &dev_attr_max_location.attr,
847 &dev_attr_sdram_scrub_rate.attr,
848 NULL
849 };
850
851 static umode_t mci_attr_is_visible(struct kobject *kobj,
852 struct attribute *attr, int idx)
853 {
854 struct device *dev = kobj_to_dev(kobj);
855 struct mem_ctl_info *mci = to_mci(dev);
856 umode_t mode = 0;
857
858 if (attr != &dev_attr_sdram_scrub_rate.attr)
859 return attr->mode;
860 if (mci->get_sdram_scrub_rate)
861 mode |= S_IRUGO;
862 if (mci->set_sdram_scrub_rate)
863 mode |= S_IWUSR;
864 return mode;
865 }
866
867 static struct attribute_group mci_attr_grp = {
868 .attrs = mci_attrs,
869 .is_visible = mci_attr_is_visible,
870 };
871
872 static const struct attribute_group *mci_attr_groups[] = {
873 &mci_attr_grp,
874 NULL
875 };
876
877 static void mci_attr_release(struct device *dev)
878 {
879 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
880
881 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
882 kfree(mci);
883 }
884
885 static struct device_type mci_attr_type = {
886 .groups = mci_attr_groups,
887 .release = mci_attr_release,
888 };
889
890 /*
891 * Create a new Memory Controller kobject instance,
892 * mc<id> under the 'mc' directory
893 *
894 * Return:
895 * 0 Success
896 * !0 Failure
897 */
898 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
899 const struct attribute_group **groups)
900 {
901 char *name;
902 int i, err;
903
904 /*
905 * The memory controller needs its own bus, in order to avoid
906 * namespace conflicts at /sys/bus/edac.
907 */
908 name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
909 if (!name)
910 return -ENOMEM;
911
912 mci->bus->name = name;
913
914 edac_dbg(0, "creating bus %s\n", mci->bus->name);
915
916 err = bus_register(mci->bus);
917 if (err < 0) {
918 kfree(name);
919 return err;
920 }
921
922 /* get the /sys/devices/system/edac subsys reference */
923 mci->dev.type = &mci_attr_type;
924 device_initialize(&mci->dev);
925
926 mci->dev.parent = mci_pdev;
927 mci->dev.bus = mci->bus;
928 mci->dev.groups = groups;
929 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
930 dev_set_drvdata(&mci->dev, mci);
931 pm_runtime_forbid(&mci->dev);
932
933 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
934 err = device_add(&mci->dev);
935 if (err < 0) {
936 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
937 goto fail_unregister_bus;
938 }
939
940 /*
941 * Create the dimm/rank devices
942 */
943 for (i = 0; i < mci->tot_dimms; i++) {
944 struct dimm_info *dimm = mci->dimms[i];
945 /* Only expose populated DIMMs */
946 if (!dimm->nr_pages)
947 continue;
948
949 #ifdef CONFIG_EDAC_DEBUG
950 edac_dbg(1, "creating dimm%d, located at ", i);
951 if (edac_debug_level >= 1) {
952 int lay;
953 for (lay = 0; lay < mci->n_layers; lay++)
954 printk(KERN_CONT "%s %d ",
955 edac_layer_name[mci->layers[lay].type],
956 dimm->location[lay]);
957 printk(KERN_CONT "\n");
958 }
959 #endif
960 err = edac_create_dimm_object(mci, dimm, i);
961 if (err) {
962 edac_dbg(1, "failure: create dimm %d obj\n", i);
963 goto fail_unregister_dimm;
964 }
965 }
966
967 #ifdef CONFIG_EDAC_LEGACY_SYSFS
968 err = edac_create_csrow_objects(mci);
969 if (err < 0)
970 goto fail_unregister_dimm;
971 #endif
972
973 edac_create_debugfs_nodes(mci);
974 return 0;
975
976 fail_unregister_dimm:
977 for (i--; i >= 0; i--) {
978 struct dimm_info *dimm = mci->dimms[i];
979 if (!dimm->nr_pages)
980 continue;
981
982 device_unregister(&dimm->dev);
983 }
984 device_unregister(&mci->dev);
985 fail_unregister_bus:
986 bus_unregister(mci->bus);
987 kfree(name);
988
989 return err;
990 }
991
992 /*
993 * remove a Memory Controller instance
994 */
995 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
996 {
997 int i;
998
999 edac_dbg(0, "\n");
1000
1001 #ifdef CONFIG_EDAC_DEBUG
1002 edac_debugfs_remove_recursive(mci->debugfs);
1003 #endif
1004 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1005 edac_delete_csrow_objects(mci);
1006 #endif
1007
1008 for (i = 0; i < mci->tot_dimms; i++) {
1009 struct dimm_info *dimm = mci->dimms[i];
1010 if (dimm->nr_pages == 0)
1011 continue;
1012 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
1013 device_unregister(&dimm->dev);
1014 }
1015 }
1016
1017 void edac_unregister_sysfs(struct mem_ctl_info *mci)
1018 {
1019 struct bus_type *bus = mci->bus;
1020 const char *name = mci->bus->name;
1021
1022 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
1023 device_unregister(&mci->dev);
1024 bus_unregister(bus);
1025 kfree(name);
1026 }
1027
1028 static void mc_attr_release(struct device *dev)
1029 {
1030 /*
1031 * There's no container structure here, as this is just the mci
1032 * parent device, used to create the /sys/devices/mc sysfs node.
1033 * So, there are no attributes on it.
1034 */
1035 edac_dbg(1, "Releasing device %s\n", dev_name(dev));
1036 kfree(dev);
1037 }
1038
1039 static struct device_type mc_attr_type = {
1040 .release = mc_attr_release,
1041 };
1042 /*
1043 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1044 */
1045 int __init edac_mc_sysfs_init(void)
1046 {
1047 int err;
1048
1049 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
1050 if (!mci_pdev) {
1051 err = -ENOMEM;
1052 goto out;
1053 }
1054
1055 mci_pdev->bus = edac_get_sysfs_subsys();
1056 mci_pdev->type = &mc_attr_type;
1057 device_initialize(mci_pdev);
1058 dev_set_name(mci_pdev, "mc");
1059
1060 err = device_add(mci_pdev);
1061 if (err < 0)
1062 goto out_dev_free;
1063
1064 edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
1065
1066 return 0;
1067
1068 out_dev_free:
1069 kfree(mci_pdev);
1070 out:
1071 return err;
1072 }
1073
1074 void edac_mc_sysfs_exit(void)
1075 {
1076 device_unregister(mci_pdev);
1077 }