drivers/firmware/qcom_scm.c

   1 /*
   2  * Qualcomm SCM driver
   3  *
   4  * Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
   5  * Copyright (C) 2015 Linaro Ltd.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 and
   9  * only version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  */
  17 #include <linux/platform_device.h>
  18 #include <linux/init.h>
  19 #include <linux/cpumask.h>
  20 #include <linux/export.h>
  21 #include <linux/dma-mapping.h>
  22 #include <linux/module.h>
  23 #include <linux/types.h>
  24 #include <linux/qcom_scm.h>
  25 #include <linux/of.h>
  26 #include <linux/of_address.h>
  27 #include <linux/of_platform.h>
  28 #include <linux/clk.h>
  29 #include <linux/reset-controller.h>
  30
  31 #include "qcom_scm.h"
  32
  33 static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT);
  34 module_param(download_mode, bool, 0);
  35
  36 #define SCM_HAS_CORE_CLK        BIT(0)
  37 #define SCM_HAS_IFACE_CLK       BIT(1)
  38 #define SCM_HAS_BUS_CLK         BIT(2)
  39
  40 struct qcom_scm {
  41         struct device *dev;
  42         struct clk *core_clk;
  43         struct clk *iface_clk;
  44         struct clk *bus_clk;
  45         struct reset_controller_dev reset;
  46
  47         u64 dload_mode_addr;
  48 };
  49
  50 static struct qcom_scm *__scm;
  51
  52 static int qcom_scm_clk_enable(void)
  53 {
  54         int ret;
  55
  56         ret = clk_prepare_enable(__scm->core_clk);
  57         if (ret)
  58                 goto bail;
  59
  60         ret = clk_prepare_enable(__scm->iface_clk);
  61         if (ret)
  62                 goto disable_core;
  63
  64         ret = clk_prepare_enable(__scm->bus_clk);
  65         if (ret)
  66                 goto disable_iface;
  67
  68         return 0;
  69
  70 disable_iface:
  71         clk_disable_unprepare(__scm->iface_clk);
  72 disable_core:
  73         clk_disable_unprepare(__scm->core_clk);
  74 bail:
  75         return ret;
  76 }
  77
  78 static void qcom_scm_clk_disable(void)
  79 {
  80         clk_disable_unprepare(__scm->core_clk);
  81         clk_disable_unprepare(__scm->iface_clk);
  82         clk_disable_unprepare(__scm->bus_clk);
  83 }
  84
  85 /**
  86  * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
  87  * @entry: Entry point function for the cpus
  88  * @cpus: The cpumask of cpus that will use the entry point
  89  *
  90  * Set the cold boot address of the cpus. Any cpu outside the supported
  91  * range would be removed from the cpu present mask.
  92  */
  93 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
  94 {
  95         return __qcom_scm_set_cold_boot_addr(entry, cpus);
  96 }
  97 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
  98
  99 /**
 100  * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
 101  * @entry: Entry point function for the cpus
 102  * @cpus: The cpumask of cpus that will use the entry point
 103  *
 104  * Set the Linux entry point for the SCM to transfer control to when coming
 105  * out of a power down. CPU power down may be executed on cpuidle or hotplug.
 106  */
 107 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
 108 {
 109         return __qcom_scm_set_warm_boot_addr(__scm->dev, entry, cpus);
 110 }
 111 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
 112
 113 /**
 114  * qcom_scm_cpu_power_down() - Power down the cpu
 115  * @flags - Flags to flush cache
 116  *
 117  * This is an end point to power down cpu. If there was a pending interrupt,
 118  * the control would return from this function, otherwise, the cpu jumps to the
 119  * warm boot entry point set for this cpu upon reset.
 120  */
 121 void qcom_scm_cpu_power_down(u32 flags)
 122 {
 123         __qcom_scm_cpu_power_down(flags);
 124 }
 125 EXPORT_SYMBOL(qcom_scm_cpu_power_down);
 126
 127 /**
 128  * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
 129  *
 130  * Return true if HDCP is supported, false if not.
 131  */
 132 bool qcom_scm_hdcp_available(void)
 133 {
 134         int ret = qcom_scm_clk_enable();
 135
 136         if (ret)
 137                 return ret;
 138
 139         ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_HDCP,
 140                                                 QCOM_SCM_CMD_HDCP);
 141
 142         qcom_scm_clk_disable();
 143
 144         return ret > 0 ? true : false;
 145 }
 146 EXPORT_SYMBOL(qcom_scm_hdcp_available);
 147
 148 /**
 149  * qcom_scm_hdcp_req() - Send HDCP request.
 150  * @req: HDCP request array
 151  * @req_cnt: HDCP request array count
 152  * @resp: response buffer passed to SCM
 153  *
 154  * Write HDCP register(s) through SCM.
 155  */
 156 int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
 157 {
 158         int ret = qcom_scm_clk_enable();
 159
 160         if (ret)
 161                 return ret;
 162
 163         ret = __qcom_scm_hdcp_req(__scm->dev, req, req_cnt, resp);
 164         qcom_scm_clk_disable();
 165         return ret;
 166 }
 167 EXPORT_SYMBOL(qcom_scm_hdcp_req);
 168
 169 /**
 170  * qcom_scm_pas_supported() - Check if the peripheral authentication service is
 171  *                            available for the given peripherial
 172  * @peripheral: peripheral id
 173  *
 174  * Returns true if PAS is supported for this peripheral, otherwise false.
 175  */
 176 bool qcom_scm_pas_supported(u32 peripheral)
 177 {
 178         int ret;
 179
 180         ret = __qcom_scm_is_call_available(__scm->dev, QCOM_SCM_SVC_PIL,
 181                                            QCOM_SCM_PAS_IS_SUPPORTED_CMD);
 182         if (ret <= 0)
 183                 return false;
 184
 185         return __qcom_scm_pas_supported(__scm->dev, peripheral);
 186 }
 187 EXPORT_SYMBOL(qcom_scm_pas_supported);
 188
 189 /**
 190  * qcom_scm_pas_init_image() - Initialize peripheral authentication service
 191  *                             state machine for a given peripheral, using the
 192  *                             metadata
 193  * @peripheral: peripheral id
 194  * @metadata:   pointer to memory containing ELF header, program header table
 195  *              and optional blob of data used for authenticating the metadata
 196  *              and the rest of the firmware
 197  * @size:       size of the metadata
 198  *
 199  * Returns 0 on success.
 200  */
 201 int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
 202 {
 203         dma_addr_t mdata_phys;
 204         void *mdata_buf;
 205         int ret;
 206
 207         /*
 208          * During the scm call memory protection will be enabled for the meta
 209          * data blob, so make sure it's physically contiguous, 4K aligned and
 210          * non-cachable to avoid XPU violations.
 211          */
 212         mdata_buf = dma_alloc_coherent(__scm->dev, size, &mdata_phys,
 213                                        GFP_KERNEL);
 214         if (!mdata_buf) {
 215                 dev_err(__scm->dev, "Allocation of metadata buffer failed.\n");
 216                 return -ENOMEM;
 217         }
 218         memcpy(mdata_buf, metadata, size);
 219
 220         ret = qcom_scm_clk_enable();
 221         if (ret)
 222                 goto free_metadata;
 223
 224         ret = __qcom_scm_pas_init_image(__scm->dev, peripheral, mdata_phys);
 225
 226         qcom_scm_clk_disable();
 227
 228 free_metadata:
 229         dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
 230
 231         return ret;
 232 }
 233 EXPORT_SYMBOL(qcom_scm_pas_init_image);
 234
 235 /**
 236  * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
 237  *                            for firmware loading
 238  * @peripheral: peripheral id
 239  * @addr:       start address of memory area to prepare
 240  * @size:       size of the memory area to prepare
 241  *
 242  * Returns 0 on success.
 243  */
 244 int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
 245 {
 246         int ret;
 247
 248         ret = qcom_scm_clk_enable();
 249         if (ret)
 250                 return ret;
 251
 252         ret = __qcom_scm_pas_mem_setup(__scm->dev, peripheral, addr, size);
 253         qcom_scm_clk_disable();
 254
 255         return ret;
 256 }
 257 EXPORT_SYMBOL(qcom_scm_pas_mem_setup);
 258
 259 /**
 260  * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware
 261  *                                 and reset the remote processor
 262  * @peripheral: peripheral id
 263  *
 264  * Return 0 on success.
 265  */
 266 int qcom_scm_pas_auth_and_reset(u32 peripheral)
 267 {
 268         int ret;
 269
 270         ret = qcom_scm_clk_enable();
 271         if (ret)
 272                 return ret;
 273
 274         ret = __qcom_scm_pas_auth_and_reset(__scm->dev, peripheral);
 275         qcom_scm_clk_disable();
 276
 277         return ret;
 278 }
 279 EXPORT_SYMBOL(qcom_scm_pas_auth_and_reset);
 280
 281 /**
 282  * qcom_scm_pas_shutdown() - Shut down the remote processor
 283  * @peripheral: peripheral id
 284  *
 285  * Returns 0 on success.
 286  */
 287 int qcom_scm_pas_shutdown(u32 peripheral)
 288 {
 289         int ret;
 290
 291         ret = qcom_scm_clk_enable();
 292         if (ret)
 293                 return ret;
 294
 295         ret = __qcom_scm_pas_shutdown(__scm->dev, peripheral);
 296         qcom_scm_clk_disable();
 297
 298         return ret;
 299 }
 300 EXPORT_SYMBOL(qcom_scm_pas_shutdown);
 301
 302 static int qcom_scm_pas_reset_assert(struct reset_controller_dev *rcdev,
 303                                      unsigned long idx)
 304 {
 305         if (idx != 0)
 306                 return -EINVAL;
 307
 308         return __qcom_scm_pas_mss_reset(__scm->dev, 1);
 309 }
 310
 311 static int qcom_scm_pas_reset_deassert(struct reset_controller_dev *rcdev,
 312                                        unsigned long idx)
 313 {
 314         if (idx != 0)
 315                 return -EINVAL;
 316
 317         return __qcom_scm_pas_mss_reset(__scm->dev, 0);
 318 }
 319
 320 static const struct reset_control_ops qcom_scm_pas_reset_ops = {
 321         .assert = qcom_scm_pas_reset_assert,
 322         .deassert = qcom_scm_pas_reset_deassert,
 323 };
 324
 325 int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare)
 326 {
 327         return __qcom_scm_restore_sec_cfg(__scm->dev, device_id, spare);
 328 }
 329 EXPORT_SYMBOL(qcom_scm_restore_sec_cfg);
 330
 331 int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size)
 332 {
 333         return __qcom_scm_iommu_secure_ptbl_size(__scm->dev, spare, size);
 334 }
 335 EXPORT_SYMBOL(qcom_scm_iommu_secure_ptbl_size);
 336
 337 int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
 338 {
 339         return __qcom_scm_iommu_secure_ptbl_init(__scm->dev, addr, size, spare);
 340 }
 341 EXPORT_SYMBOL(qcom_scm_iommu_secure_ptbl_init);
 342
 343 int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
 344 {
 345         return __qcom_scm_io_readl(__scm->dev, addr, val);
 346 }
 347 EXPORT_SYMBOL(qcom_scm_io_readl);
 348
 349 int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
 350 {
 351         return __qcom_scm_io_writel(__scm->dev, addr, val);
 352 }
 353 EXPORT_SYMBOL(qcom_scm_io_writel);
 354
 355 static void qcom_scm_set_download_mode(bool enable)
 356 {
 357         bool avail;
 358         int ret = 0;
 359
 360         avail = __qcom_scm_is_call_available(__scm->dev,
 361                                              QCOM_SCM_SVC_BOOT,
 362                                              QCOM_SCM_SET_DLOAD_MODE);
 363         if (avail) {
 364                 ret = __qcom_scm_set_dload_mode(__scm->dev, enable);
 365         } else if (__scm->dload_mode_addr) {
 366                 ret = __qcom_scm_io_writel(__scm->dev, __scm->dload_mode_addr,
 367                                            enable ? QCOM_SCM_SET_DLOAD_MODE : 0);
 368         } else {
 369                 dev_err(__scm->dev,
 370                         "No available mechanism for setting download mode\n");
 371         }
 372
 373         if (ret)
 374                 dev_err(__scm->dev, "failed to set download mode: %d\n", ret);
 375 }
 376
 377 static int qcom_scm_find_dload_address(struct device *dev, u64 *addr)
 378 {
 379         struct device_node *tcsr;
 380         struct device_node *np = dev->of_node;
 381         struct resource res;
 382         u32 offset;
 383         int ret;
 384
 385         tcsr = of_parse_phandle(np, "qcom,dload-mode", 0);
 386         if (!tcsr)
 387                 return 0;
 388
 389         ret = of_address_to_resource(tcsr, 0, &res);
 390         of_node_put(tcsr);
 391         if (ret)
 392                 return ret;
 393
 394         ret = of_property_read_u32_index(np, "qcom,dload-mode", 1, &offset);
 395         if (ret < 0)
 396                 return ret;
 397
 398         *addr = res.start + offset;
 399
 400         return 0;
 401 }
 402
 403 /**
 404  * qcom_scm_is_available() - Checks if SCM is available
 405  */
 406 bool qcom_scm_is_available(void)
 407 {
 408         return !!__scm;
 409 }
 410 EXPORT_SYMBOL(qcom_scm_is_available);
 411
 412 int qcom_scm_set_remote_state(u32 state, u32 id)
 413 {
 414         return __qcom_scm_set_remote_state(__scm->dev, state, id);
 415 }
 416 EXPORT_SYMBOL(qcom_scm_set_remote_state);
 417
 418 static int qcom_scm_probe(struct platform_device *pdev)
 419 {
 420         struct qcom_scm *scm;
 421         unsigned long clks;
 422         int ret;
 423
 424         scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL);
 425         if (!scm)
 426                 return -ENOMEM;
 427
 428         ret = qcom_scm_find_dload_address(&pdev->dev, &scm->dload_mode_addr);
 429         if (ret < 0)
 430                 return ret;
 431
 432         clks = (unsigned long)of_device_get_match_data(&pdev->dev);
 433         if (clks & SCM_HAS_CORE_CLK) {
 434                 scm->core_clk = devm_clk_get(&pdev->dev, "core");
 435                 if (IS_ERR(scm->core_clk)) {
 436                         if (PTR_ERR(scm->core_clk) != -EPROBE_DEFER)
 437                                 dev_err(&pdev->dev,
 438                                         "failed to acquire core clk\n");
 439                         return PTR_ERR(scm->core_clk);
 440                 }
 441         }
 442
 443         if (clks & SCM_HAS_IFACE_CLK) {
 444                 scm->iface_clk = devm_clk_get(&pdev->dev, "iface");
 445                 if (IS_ERR(scm->iface_clk)) {
 446                         if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER)
 447                                 dev_err(&pdev->dev,
 448                                         "failed to acquire iface clk\n");
 449                         return PTR_ERR(scm->iface_clk);
 450                 }
 451         }
 452
 453         if (clks & SCM_HAS_BUS_CLK) {
 454                 scm->bus_clk = devm_clk_get(&pdev->dev, "bus");
 455                 if (IS_ERR(scm->bus_clk)) {
 456                         if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER)
 457                                 dev_err(&pdev->dev,
 458                                         "failed to acquire bus clk\n");
 459                         return PTR_ERR(scm->bus_clk);
 460                 }
 461         }
 462
 463         scm->reset.ops = &qcom_scm_pas_reset_ops;
 464         scm->reset.nr_resets = 1;
 465         scm->reset.of_node = pdev->dev.of_node;
 466         ret = devm_reset_controller_register(&pdev->dev, &scm->reset);
 467         if (ret)
 468                 return ret;
 469
 470         /* vote for max clk rate for highest performance */
 471         ret = clk_set_rate(scm->core_clk, INT_MAX);
 472         if (ret)
 473                 return ret;
 474
 475         __scm = scm;
 476         __scm->dev = &pdev->dev;
 477
 478         __qcom_scm_init();
 479
 480         /*
 481          * If requested enable "download mode", from this point on warmboot
 482          * will cause the the boot stages to enter download mode, unless
 483          * disabled below by a clean shutdown/reboot.
 484          */
 485         if (download_mode)
 486                 qcom_scm_set_download_mode(true);
 487
 488         return 0;
 489 }
 490
 491 static void qcom_scm_shutdown(struct platform_device *pdev)
 492 {
 493         /* Clean shutdown, disable download mode to allow normal restart */
 494         if (download_mode)
 495                 qcom_scm_set_download_mode(false);
 496 }
 497
 498 static const struct of_device_id qcom_scm_dt_match[] = {
 499         { .compatible = "qcom,scm-apq8064",
 500           /* FIXME: This should have .data = (void *) SCM_HAS_CORE_CLK */
 501         },
 502         { .compatible = "qcom,scm-msm8660",
 503           .data = (void *) SCM_HAS_CORE_CLK,
 504         },
 505         { .compatible = "qcom,scm-msm8960",
 506           .data = (void *) SCM_HAS_CORE_CLK,
 507         },
 508         { .compatible = "qcom,scm-msm8996",
 509           .data = NULL, /* no clocks */
 510         },
 511         { .compatible = "qcom,scm",
 512           .data = (void *)(SCM_HAS_CORE_CLK
 513                            | SCM_HAS_IFACE_CLK
 514                            | SCM_HAS_BUS_CLK),
 515         },
 516         {}
 517 };
 518
 519 static struct platform_driver qcom_scm_driver = {
 520         .driver = {
 521                 .name   = "qcom_scm",
 522                 .of_match_table = qcom_scm_dt_match,
 523         },
 524         .probe = qcom_scm_probe,
 525         .shutdown = qcom_scm_shutdown,
 526 };
 527
 528 static int __init qcom_scm_init(void)
 529 {
 530         struct device_node *np, *fw_np;
 531         int ret;
 532
 533         fw_np = of_find_node_by_name(NULL, "firmware");
 534
 535         if (!fw_np)
 536                 return -ENODEV;
 537
 538         np = of_find_matching_node(fw_np, qcom_scm_dt_match);
 539
 540         if (!np) {
 541                 of_node_put(fw_np);
 542                 return -ENODEV;
 543         }
 544
 545         of_node_put(np);
 546
 547         ret = of_platform_populate(fw_np, qcom_scm_dt_match, NULL, NULL);
 548
 549         of_node_put(fw_np);
 550
 551         if (ret)
 552                 return ret;
 553
 554         return platform_driver_register(&qcom_scm_driver);
 555 }
 556 subsys_initcall(qcom_scm_init);