drivers/fsi/fsi-master-gpio.c

   1 /*
   2  * A FSI master controller, using a simple GPIO bit-banging interface
   3  */
   4
   5 #include <linux/crc4.h>
   6 #include <linux/delay.h>
   7 #include <linux/device.h>
   8 #include <linux/fsi.h>
   9 #include <linux/gpio/consumer.h>
  10 #include <linux/io.h>
  11 #include <linux/module.h>
  12 #include <linux/of.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/slab.h>
  15 #include <linux/spinlock.h>
  16
  17 #include "fsi-master.h"
  18
  19 #define FSI_GPIO_STD_DLY        1       /* Standard pin delay in nS */
  20 #define FSI_ECHO_DELAY_CLOCKS   16      /* Number clocks for echo delay */
  21 #define FSI_PRE_BREAK_CLOCKS    50      /* Number clocks to prep for break */
  22 #define FSI_BREAK_CLOCKS        256     /* Number of clocks to issue break */
  23 #define FSI_POST_BREAK_CLOCKS   16000   /* Number clocks to set up cfam */
  24 #define FSI_INIT_CLOCKS         5000    /* Clock out any old data */
  25 #define FSI_GPIO_STD_DELAY      10      /* Standard GPIO delay in nS */
  26                                         /* todo: adjust down as low as */
  27                                         /* possible or eliminate */
  28 #define FSI_GPIO_CMD_DPOLL      0x2
  29 #define FSI_GPIO_CMD_TERM       0x3f
  30 #define FSI_GPIO_CMD_ABS_AR     0x4
  31
  32 #define FSI_GPIO_DPOLL_CLOCKS   100      /* < 21 will cause slave to hang */
  33
  34 /* Bus errors */
  35 #define FSI_GPIO_ERR_BUSY       1       /* Slave stuck in busy state */
  36 #define FSI_GPIO_RESP_ERRA      2       /* Any (misc) Error */
  37 #define FSI_GPIO_RESP_ERRC      3       /* Slave reports master CRC error */
  38 #define FSI_GPIO_MTOE           4       /* Master time out error */
  39 #define FSI_GPIO_CRC_INVAL      5       /* Master reports slave CRC error */
  40
  41 /* Normal slave responses */
  42 #define FSI_GPIO_RESP_BUSY      1
  43 #define FSI_GPIO_RESP_ACK       0
  44 #define FSI_GPIO_RESP_ACKD      4
  45
  46 #define FSI_GPIO_MAX_BUSY       100
  47 #define FSI_GPIO_MTOE_COUNT     1000
  48 #define FSI_GPIO_DRAIN_BITS     20
  49 #define FSI_GPIO_CRC_SIZE       4
  50 #define FSI_GPIO_MSG_ID_SIZE            2
  51 #define FSI_GPIO_MSG_RESPID_SIZE        2
  52 #define FSI_GPIO_PRIME_SLAVE_CLOCKS     100
  53
  54 struct fsi_master_gpio {
  55         struct fsi_master       master;
  56         struct device           *dev;
  57         spinlock_t              cmd_lock;       /* Lock for commands */
  58         struct gpio_desc        *gpio_clk;
  59         struct gpio_desc        *gpio_data;
  60         struct gpio_desc        *gpio_trans;    /* Voltage translator */
  61         struct gpio_desc        *gpio_enable;   /* FSI enable */
  62         struct gpio_desc        *gpio_mux;      /* Mux control */
  63         bool                    external_mode;
  64 };
  65
  66 #define CREATE_TRACE_POINTS
  67 #include <trace/events/fsi_master_gpio.h>
  68
  69 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
  70
  71 struct fsi_gpio_msg {
  72         uint64_t        msg;
  73         uint8_t         bits;
  74 };
  75
  76 static void clock_toggle(struct fsi_master_gpio *master, int count)
  77 {
  78         int i;
  79
  80         for (i = 0; i < count; i++) {
  81                 ndelay(FSI_GPIO_STD_DLY);
  82                 gpiod_set_value(master->gpio_clk, 0);
  83                 ndelay(FSI_GPIO_STD_DLY);
  84                 gpiod_set_value(master->gpio_clk, 1);
  85         }
  86 }
  87
  88 static int sda_in(struct fsi_master_gpio *master)
  89 {
  90         int in;
  91
  92         ndelay(FSI_GPIO_STD_DLY);
  93         in = gpiod_get_value(master->gpio_data);
  94         return in ? 1 : 0;
  95 }
  96
  97 static void sda_out(struct fsi_master_gpio *master, int value)
  98 {
  99         gpiod_set_value(master->gpio_data, value);
 100 }
 101
 102 static void set_sda_input(struct fsi_master_gpio *master)
 103 {
 104         gpiod_direction_input(master->gpio_data);
 105         gpiod_set_value(master->gpio_trans, 0);
 106 }
 107
 108 static void set_sda_output(struct fsi_master_gpio *master, int value)
 109 {
 110         gpiod_set_value(master->gpio_trans, 1);
 111         gpiod_direction_output(master->gpio_data, value);
 112 }
 113
 114 static void clock_zeros(struct fsi_master_gpio *master, int count)
 115 {
 116         set_sda_output(master, 1);
 117         clock_toggle(master, count);
 118 }
 119
 120 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
 121                         uint8_t num_bits)
 122 {
 123         uint8_t bit, in_bit;
 124
 125         set_sda_input(master);
 126
 127         for (bit = 0; bit < num_bits; bit++) {
 128                 clock_toggle(master, 1);
 129                 in_bit = sda_in(master);
 130                 msg->msg <<= 1;
 131                 msg->msg |= ~in_bit & 0x1;      /* Data is active low */
 132         }
 133         msg->bits += num_bits;
 134
 135         trace_fsi_master_gpio_in(master, num_bits, msg->msg);
 136 }
 137
 138 static void serial_out(struct fsi_master_gpio *master,
 139                         const struct fsi_gpio_msg *cmd)
 140 {
 141         uint8_t bit;
 142         uint64_t msg = ~cmd->msg;       /* Data is active low */
 143         uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
 144         uint64_t last_bit = ~0;
 145         int next_bit;
 146
 147         trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
 148
 149         if (!cmd->bits) {
 150                 dev_warn(master->dev, "trying to output 0 bits\n");
 151                 return;
 152         }
 153         set_sda_output(master, 0);
 154
 155         /* Send the start bit */
 156         sda_out(master, 0);
 157         clock_toggle(master, 1);
 158
 159         /* Send the message */
 160         for (bit = 0; bit < cmd->bits; bit++) {
 161                 next_bit = (msg & sda_mask) >> (cmd->bits - 1);
 162                 if (last_bit ^ next_bit) {
 163                         sda_out(master, next_bit);
 164                         last_bit = next_bit;
 165                 }
 166                 clock_toggle(master, 1);
 167                 msg <<= 1;
 168         }
 169 }
 170
 171 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
 172 {
 173         msg->msg <<= bits;
 174         msg->msg |= data & ((1ull << bits) - 1);
 175         msg->bits += bits;
 176 }
 177
 178 static void msg_push_crc(struct fsi_gpio_msg *msg)
 179 {
 180         uint8_t crc;
 181         int top;
 182
 183         top = msg->bits & 0x3;
 184
 185         /* start bit, and any non-aligned top bits */
 186         crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
 187
 188         /* aligned bits */
 189         crc = crc4(crc, msg->msg, msg->bits - top);
 190
 191         msg_push_bits(msg, crc, 4);
 192 }
 193
 194 /*
 195  * Encode an Absolute Address command
 196  */
 197 static void build_abs_ar_command(struct fsi_gpio_msg *cmd,
 198                 uint8_t id, uint32_t addr, size_t size, const void *data)
 199 {
 200         bool write = !!data;
 201         uint8_t ds;
 202         int i;
 203
 204         cmd->bits = 0;
 205         cmd->msg = 0;
 206
 207         msg_push_bits(cmd, id, 2);
 208         msg_push_bits(cmd, FSI_GPIO_CMD_ABS_AR, 3);
 209         msg_push_bits(cmd, write ? 0 : 1, 1);
 210
 211         /*
 212          * The read/write size is encoded in the lower bits of the address
 213          * (as it must be naturally-aligned), and the following ds bit.
 214          *
 215          *      size    addr:1  addr:0  ds
 216          *      1       x       x       0
 217          *      2       x       0       1
 218          *      4       0       1       1
 219          *
 220          */
 221         ds = size > 1 ? 1 : 0;
 222         addr &= ~(size - 1);
 223         if (size == 4)
 224                 addr |= 1;
 225
 226         msg_push_bits(cmd, addr & ((1 << 21) - 1), 21);
 227         msg_push_bits(cmd, ds, 1);
 228         for (i = 0; write && i < size; i++)
 229                 msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
 230
 231         msg_push_crc(cmd);
 232 }
 233
 234 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
 235 {
 236         cmd->bits = 0;
 237         cmd->msg = 0;
 238
 239         msg_push_bits(cmd, slave_id, 2);
 240         msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
 241         msg_push_crc(cmd);
 242 }
 243
 244 static void echo_delay(struct fsi_master_gpio *master)
 245 {
 246         set_sda_output(master, 1);
 247         clock_toggle(master, FSI_ECHO_DELAY_CLOCKS);
 248 }
 249
 250 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
 251 {
 252         cmd->bits = 0;
 253         cmd->msg = 0;
 254
 255         msg_push_bits(cmd, slave_id, 2);
 256         msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
 257         msg_push_crc(cmd);
 258 }
 259
 260 /*
 261  * Store information on master errors so handler can detect and clean
 262  * up the bus
 263  */
 264 static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error)
 265 {
 266
 267 }
 268
 269 static int read_one_response(struct fsi_master_gpio *master,
 270                 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
 271 {
 272         struct fsi_gpio_msg msg;
 273         uint8_t id, tag;
 274         uint32_t crc;
 275         int i;
 276
 277         /* wait for the start bit */
 278         for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
 279                 msg.bits = 0;
 280                 msg.msg = 0;
 281                 serial_in(master, &msg, 1);
 282                 if (msg.msg)
 283                         break;
 284         }
 285         if (i == FSI_GPIO_MTOE_COUNT) {
 286                 dev_dbg(master->dev,
 287                         "Master time out waiting for response\n");
 288                 fsi_master_gpio_error(master, FSI_GPIO_MTOE);
 289                 return -EIO;
 290         }
 291
 292         msg.bits = 0;
 293         msg.msg = 0;
 294
 295         /* Read slave ID & response tag */
 296         serial_in(master, &msg, 4);
 297
 298         id = (msg.msg >> FSI_GPIO_MSG_RESPID_SIZE) & 0x3;
 299         tag = msg.msg & 0x3;
 300
 301         /* If we have an ACK and we're expecting data, clock the data in too */
 302         if (tag == FSI_GPIO_RESP_ACK && data_size)
 303                 serial_in(master, &msg, data_size * 8);
 304
 305         /* read CRC */
 306         serial_in(master, &msg, FSI_GPIO_CRC_SIZE);
 307
 308         /* we have a whole message now; check CRC */
 309         crc = crc4(0, 1, 1);
 310         crc = crc4(crc, msg.msg, msg.bits);
 311         if (crc) {
 312                 dev_dbg(master->dev, "ERR response CRC\n");
 313                 fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL);
 314                 return -EIO;
 315         }
 316
 317         if (msgp)
 318                 *msgp = msg;
 319         if (tagp)
 320                 *tagp = tag;
 321
 322         return 0;
 323 }
 324
 325 static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
 326 {
 327         struct fsi_gpio_msg cmd;
 328         uint8_t tag;
 329         int rc;
 330
 331         build_term_command(&cmd, slave);
 332         serial_out(master, &cmd);
 333         echo_delay(master);
 334
 335         rc = read_one_response(master, 0, NULL, &tag);
 336         if (rc < 0) {
 337                 dev_err(master->dev,
 338                                 "TERM failed; lost communication with slave\n");
 339                 return -EIO;
 340         } else if (tag != FSI_GPIO_RESP_ACK) {
 341                 dev_err(master->dev, "TERM failed; response %d\n", tag);
 342                 return -EIO;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int poll_for_response(struct fsi_master_gpio *master,
 349                 uint8_t slave, uint8_t size, void *data)
 350 {
 351         struct fsi_gpio_msg response, cmd;
 352         int busy_count = 0, rc, i;
 353         uint8_t tag;
 354         uint8_t *data_byte = data;
 355
 356 retry:
 357         rc = read_one_response(master, size, &response, &tag);
 358         if (rc)
 359                 return rc;
 360
 361         switch (tag) {
 362         case FSI_GPIO_RESP_ACK:
 363                 if (size && data) {
 364                         uint64_t val = response.msg;
 365                         /* clear crc & mask */
 366                         val >>= 4;
 367                         val &= (1ull << (size * 8)) - 1;
 368
 369                         for (i = 0; i < size; i++) {
 370                                 data_byte[size-i-1] = val;
 371                                 val >>= 8;
 372                         }
 373                 }
 374                 break;
 375         case FSI_GPIO_RESP_BUSY:
 376                 /*
 377                  * Its necessary to clock slave before issuing
 378                  * d-poll, not indicated in the hardware protocol
 379                  * spec. < 20 clocks causes slave to hang, 21 ok.
 380                  */
 381                 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
 382                 if (busy_count++ < FSI_GPIO_MAX_BUSY) {
 383                         build_dpoll_command(&cmd, slave);
 384                         serial_out(master, &cmd);
 385                         echo_delay(master);
 386                         goto retry;
 387                 }
 388                 dev_warn(master->dev,
 389                         "ERR slave is stuck in busy state, issuing TERM\n");
 390                 issue_term(master, slave);
 391                 rc = -EIO;
 392                 break;
 393
 394         case FSI_GPIO_RESP_ERRA:
 395         case FSI_GPIO_RESP_ERRC:
 396                 dev_dbg(master->dev, "ERR%c received: 0x%x\n",
 397                         tag == FSI_GPIO_RESP_ERRA ? 'A' : 'C',
 398                         (int)response.msg);
 399                 fsi_master_gpio_error(master, response.msg);
 400                 rc = -EIO;
 401                 break;
 402         }
 403
 404         /* Clock the slave enough to be ready for next operation */
 405         clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS);
 406         return rc;
 407 }
 408
 409 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
 410                 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
 411 {
 412         unsigned long flags;
 413         int rc;
 414
 415         spin_lock_irqsave(&master->cmd_lock, flags);
 416
 417         if (master->external_mode) {
 418                 spin_unlock_irqrestore(&master->cmd_lock, flags);
 419                 return -EBUSY;
 420         }
 421
 422         serial_out(master, cmd);
 423         echo_delay(master);
 424         rc = poll_for_response(master, slave, resp_len, resp);
 425         spin_unlock_irqrestore(&master->cmd_lock, flags);
 426
 427         return rc;
 428 }
 429
 430 static int fsi_master_gpio_read(struct fsi_master *_master, int link,
 431                 uint8_t id, uint32_t addr, void *val, size_t size)
 432 {
 433         struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
 434         struct fsi_gpio_msg cmd;
 435
 436         if (link != 0)
 437                 return -ENODEV;
 438
 439         build_abs_ar_command(&cmd, id, addr, size, NULL);
 440         return fsi_master_gpio_xfer(master, id, &cmd, size, val);
 441 }
 442
 443 static int fsi_master_gpio_write(struct fsi_master *_master, int link,
 444                 uint8_t id, uint32_t addr, const void *val, size_t size)
 445 {
 446         struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
 447         struct fsi_gpio_msg cmd;
 448
 449         if (link != 0)
 450                 return -ENODEV;
 451
 452         build_abs_ar_command(&cmd, id, addr, size, val);
 453         return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
 454 }
 455
 456 static int fsi_master_gpio_term(struct fsi_master *_master,
 457                 int link, uint8_t id)
 458 {
 459         struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
 460         struct fsi_gpio_msg cmd;
 461
 462         if (link != 0)
 463                 return -ENODEV;
 464
 465         build_term_command(&cmd, id);
 466         return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
 467 }
 468
 469 static int fsi_master_gpio_break(struct fsi_master *_master, int link)
 470 {
 471         struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
 472         unsigned long flags;
 473
 474         if (link != 0)
 475                 return -ENODEV;
 476
 477         trace_fsi_master_gpio_break(master);
 478
 479         spin_lock_irqsave(&master->cmd_lock, flags);
 480         if (master->external_mode) {
 481                 spin_unlock_irqrestore(&master->cmd_lock, flags);
 482                 return -EBUSY;
 483         }
 484         set_sda_output(master, 1);
 485         sda_out(master, 1);
 486         clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
 487         sda_out(master, 0);
 488         clock_toggle(master, FSI_BREAK_CLOCKS);
 489         echo_delay(master);
 490         sda_out(master, 1);
 491         clock_toggle(master, FSI_POST_BREAK_CLOCKS);
 492         spin_unlock_irqrestore(&master->cmd_lock, flags);
 493
 494         /* Wait for logic reset to take effect */
 495         udelay(200);
 496
 497         return 0;
 498 }
 499
 500 static void fsi_master_gpio_init(struct fsi_master_gpio *master)
 501 {
 502         gpiod_direction_output(master->gpio_mux, 1);
 503         gpiod_direction_output(master->gpio_trans, 1);
 504         gpiod_direction_output(master->gpio_enable, 1);
 505         gpiod_direction_output(master->gpio_clk, 1);
 506         gpiod_direction_output(master->gpio_data, 1);
 507
 508         /* todo: evaluate if clocks can be reduced */
 509         clock_zeros(master, FSI_INIT_CLOCKS);
 510 }
 511
 512 static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
 513 {
 514         gpiod_direction_output(master->gpio_mux, 0);
 515         gpiod_direction_output(master->gpio_trans, 0);
 516         gpiod_direction_output(master->gpio_enable, 1);
 517         gpiod_direction_input(master->gpio_clk);
 518         gpiod_direction_input(master->gpio_data);
 519 }
 520
 521 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link)
 522 {
 523         struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
 524         unsigned long flags;
 525         int rc = -EBUSY;
 526
 527         if (link != 0)
 528                 return -ENODEV;
 529
 530         spin_lock_irqsave(&master->cmd_lock, flags);
 531         if (!master->external_mode) {
 532                 gpiod_set_value(master->gpio_enable, 1);
 533                 rc = 0;
 534         }
 535         spin_unlock_irqrestore(&master->cmd_lock, flags);
 536
 537         return rc;
 538 }
 539
 540 static ssize_t external_mode_show(struct device *dev,
 541                 struct device_attribute *attr, char *buf)
 542 {
 543         struct fsi_master_gpio *master = dev_get_drvdata(dev);
 544
 545         return snprintf(buf, PAGE_SIZE - 1, "%u\n",
 546                         master->external_mode ? 1 : 0);
 547 }
 548
 549 static ssize_t external_mode_store(struct device *dev,
 550                 struct device_attribute *attr, const char *buf, size_t count)
 551 {
 552         struct fsi_master_gpio *master = dev_get_drvdata(dev);
 553         unsigned long flags, val;
 554         bool external_mode;
 555         int err;
 556
 557         err = kstrtoul(buf, 0, &val);
 558         if (err)
 559                 return err;
 560
 561         external_mode = !!val;
 562
 563         spin_lock_irqsave(&master->cmd_lock, flags);
 564
 565         if (external_mode == master->external_mode) {
 566                 spin_unlock_irqrestore(&master->cmd_lock, flags);
 567                 return count;
 568         }
 569
 570         master->external_mode = external_mode;
 571         if (master->external_mode)
 572                 fsi_master_gpio_init_external(master);
 573         else
 574                 fsi_master_gpio_init(master);
 575         spin_unlock_irqrestore(&master->cmd_lock, flags);
 576
 577         fsi_master_rescan(&master->master);
 578
 579         return count;
 580 }
 581
 582 static DEVICE_ATTR(external_mode, 0664,
 583                 external_mode_show, external_mode_store);
 584
 585 static int fsi_master_gpio_probe(struct platform_device *pdev)
 586 {
 587         struct fsi_master_gpio *master;
 588         struct gpio_desc *gpio;
 589         int rc;
 590
 591         master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
 592         if (!master)
 593                 return -ENOMEM;
 594
 595         master->dev = &pdev->dev;
 596         master->master.dev.parent = master->dev;
 597         master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
 598
 599         gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
 600         if (IS_ERR(gpio)) {
 601                 dev_err(&pdev->dev, "failed to get clock gpio\n");
 602                 return PTR_ERR(gpio);
 603         }
 604         master->gpio_clk = gpio;
 605
 606         gpio = devm_gpiod_get(&pdev->dev, "data", 0);
 607         if (IS_ERR(gpio)) {
 608                 dev_err(&pdev->dev, "failed to get data gpio\n");
 609                 return PTR_ERR(gpio);
 610         }
 611         master->gpio_data = gpio;
 612
 613         /* Optional GPIOs */
 614         gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
 615         if (IS_ERR(gpio)) {
 616                 dev_err(&pdev->dev, "failed to get trans gpio\n");
 617                 return PTR_ERR(gpio);
 618         }
 619         master->gpio_trans = gpio;
 620
 621         gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
 622         if (IS_ERR(gpio)) {
 623                 dev_err(&pdev->dev, "failed to get enable gpio\n");
 624                 return PTR_ERR(gpio);
 625         }
 626         master->gpio_enable = gpio;
 627
 628         gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
 629         if (IS_ERR(gpio)) {
 630                 dev_err(&pdev->dev, "failed to get mux gpio\n");
 631                 return PTR_ERR(gpio);
 632         }
 633         master->gpio_mux = gpio;
 634
 635         master->master.n_links = 1;
 636         master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
 637         master->master.read = fsi_master_gpio_read;
 638         master->master.write = fsi_master_gpio_write;
 639         master->master.term = fsi_master_gpio_term;
 640         master->master.send_break = fsi_master_gpio_break;
 641         master->master.link_enable = fsi_master_gpio_link_enable;
 642         platform_set_drvdata(pdev, master);
 643         spin_lock_init(&master->cmd_lock);
 644
 645         fsi_master_gpio_init(master);
 646
 647         rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
 648         if (rc)
 649                 return rc;
 650
 651         return fsi_master_register(&master->master);
 652 }
 653
 654
 655 static int fsi_master_gpio_remove(struct platform_device *pdev)
 656 {
 657         struct fsi_master_gpio *master = platform_get_drvdata(pdev);
 658
 659         devm_gpiod_put(&pdev->dev, master->gpio_clk);
 660         devm_gpiod_put(&pdev->dev, master->gpio_data);
 661         if (master->gpio_trans)
 662                 devm_gpiod_put(&pdev->dev, master->gpio_trans);
 663         if (master->gpio_enable)
 664                 devm_gpiod_put(&pdev->dev, master->gpio_enable);
 665         if (master->gpio_mux)
 666                 devm_gpiod_put(&pdev->dev, master->gpio_mux);
 667         fsi_master_unregister(&master->master);
 668
 669         of_node_put(master->master.dev.of_node);
 670
 671         return 0;
 672 }
 673
 674 static const struct of_device_id fsi_master_gpio_match[] = {
 675         { .compatible = "fsi-master-gpio" },
 676         { },
 677 };
 678
 679 static struct platform_driver fsi_master_gpio_driver = {
 680         .driver = {
 681                 .name           = "fsi-master-gpio",
 682                 .of_match_table = fsi_master_gpio_match,
 683         },
 684         .probe  = fsi_master_gpio_probe,
 685         .remove = fsi_master_gpio_remove,
 686 };
 687
 688 module_platform_driver(fsi_master_gpio_driver);
 689 MODULE_LICENSE("GPL");