drivers/gpio/gpio-adnp.c

   1 /*
   2  * Copyright (C) 2011-2012 Avionic Design GmbH
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/gpio/driver.h>
  10 #include <linux/i2c.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/module.h>
  13 #include <linux/of_irq.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/slab.h>
  16
  17 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift)
  18 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift)
  19 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift)
  20 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift)
  21 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift)
  22
  23 struct adnp {
  24         struct i2c_client *client;
  25         struct gpio_chip gpio;
  26         unsigned int reg_shift;
  27
  28         struct mutex i2c_lock;
  29         struct mutex irq_lock;
  30
  31         u8 *irq_enable;
  32         u8 *irq_level;
  33         u8 *irq_rise;
  34         u8 *irq_fall;
  35         u8 *irq_high;
  36         u8 *irq_low;
  37 };
  38
  39 static int adnp_read(struct adnp *adnp, unsigned offset, uint8_t *value)
  40 {
  41         int err;
  42
  43         err = i2c_smbus_read_byte_data(adnp->client, offset);
  44         if (err < 0) {
  45                 dev_err(adnp->gpio.parent, "%s failed: %d\n",
  46                         "i2c_smbus_read_byte_data()", err);
  47                 return err;
  48         }
  49
  50         *value = err;
  51         return 0;
  52 }
  53
  54 static int adnp_write(struct adnp *adnp, unsigned offset, uint8_t value)
  55 {
  56         int err;
  57
  58         err = i2c_smbus_write_byte_data(adnp->client, offset, value);
  59         if (err < 0) {
  60                 dev_err(adnp->gpio.parent, "%s failed: %d\n",
  61                         "i2c_smbus_write_byte_data()", err);
  62                 return err;
  63         }
  64
  65         return 0;
  66 }
  67
  68 static int adnp_gpio_get(struct gpio_chip *chip, unsigned offset)
  69 {
  70         struct adnp *adnp = gpiochip_get_data(chip);
  71         unsigned int reg = offset >> adnp->reg_shift;
  72         unsigned int pos = offset & 7;
  73         u8 value;
  74         int err;
  75
  76         err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &value);
  77         if (err < 0)
  78                 return err;
  79
  80         return (value & BIT(pos)) ? 1 : 0;
  81 }
  82
  83 static void __adnp_gpio_set(struct adnp *adnp, unsigned offset, int value)
  84 {
  85         unsigned int reg = offset >> adnp->reg_shift;
  86         unsigned int pos = offset & 7;
  87         int err;
  88         u8 val;
  89
  90         err = adnp_read(adnp, GPIO_PLR(adnp) + reg, &val);
  91         if (err < 0)
  92                 return;
  93
  94         if (value)
  95                 val |= BIT(pos);
  96         else
  97                 val &= ~BIT(pos);
  98
  99         adnp_write(adnp, GPIO_PLR(adnp) + reg, val);
 100 }
 101
 102 static void adnp_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 103 {
 104         struct adnp *adnp = gpiochip_get_data(chip);
 105
 106         mutex_lock(&adnp->i2c_lock);
 107         __adnp_gpio_set(adnp, offset, value);
 108         mutex_unlock(&adnp->i2c_lock);
 109 }
 110
 111 static int adnp_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 112 {
 113         struct adnp *adnp = gpiochip_get_data(chip);
 114         unsigned int reg = offset >> adnp->reg_shift;
 115         unsigned int pos = offset & 7;
 116         u8 value;
 117         int err;
 118
 119         mutex_lock(&adnp->i2c_lock);
 120
 121         err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
 122         if (err < 0)
 123                 goto out;
 124
 125         value &= ~BIT(pos);
 126
 127         err = adnp_write(adnp, GPIO_DDR(adnp) + reg, value);
 128         if (err < 0)
 129                 goto out;
 130
 131         err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &value);
 132         if (err < 0)
 133                 goto out;
 134
 135         if (value & BIT(pos)) {
 136                 err = -EPERM;
 137                 goto out;
 138         }
 139
 140         err = 0;
 141
 142 out:
 143         mutex_unlock(&adnp->i2c_lock);
 144         return err;
 145 }
 146
 147 static int adnp_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
 148                                       int value)
 149 {
 150         struct adnp *adnp = gpiochip_get_data(chip);
 151         unsigned int reg = offset >> adnp->reg_shift;
 152         unsigned int pos = offset & 7;
 153         int err;
 154         u8 val;
 155
 156         mutex_lock(&adnp->i2c_lock);
 157
 158         err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
 159         if (err < 0)
 160                 goto out;
 161
 162         val |= BIT(pos);
 163
 164         err = adnp_write(adnp, GPIO_DDR(adnp) + reg, val);
 165         if (err < 0)
 166                 goto out;
 167
 168         err = adnp_read(adnp, GPIO_DDR(adnp) + reg, &val);
 169         if (err < 0)
 170                 goto out;
 171
 172         if (!(val & BIT(pos))) {
 173                 err = -EPERM;
 174                 goto out;
 175         }
 176
 177         __adnp_gpio_set(adnp, offset, value);
 178         err = 0;
 179
 180 out:
 181         mutex_unlock(&adnp->i2c_lock);
 182         return err;
 183 }
 184
 185 static void adnp_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 186 {
 187         struct adnp *adnp = gpiochip_get_data(chip);
 188         unsigned int num_regs = 1 << adnp->reg_shift, i, j;
 189         int err;
 190
 191         for (i = 0; i < num_regs; i++) {
 192                 u8 ddr, plr, ier, isr;
 193
 194                 mutex_lock(&adnp->i2c_lock);
 195
 196                 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr);
 197                 if (err < 0)
 198                         goto unlock;
 199
 200                 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &plr);
 201                 if (err < 0)
 202                         goto unlock;
 203
 204                 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
 205                 if (err < 0)
 206                         goto unlock;
 207
 208                 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
 209                 if (err < 0)
 210                         goto unlock;
 211
 212                 mutex_unlock(&adnp->i2c_lock);
 213
 214                 for (j = 0; j < 8; j++) {
 215                         unsigned int bit = (i << adnp->reg_shift) + j;
 216                         const char *direction = "input ";
 217                         const char *level = "low ";
 218                         const char *interrupt = "disabled";
 219                         const char *pending = "";
 220
 221                         if (ddr & BIT(j))
 222                                 direction = "output";
 223
 224                         if (plr & BIT(j))
 225                                 level = "high";
 226
 227                         if (ier & BIT(j))
 228                                 interrupt = "enabled ";
 229
 230                         if (isr & BIT(j))
 231                                 pending = "pending";
 232
 233                         seq_printf(s, "%2u: %s %s IRQ %s %s\n", bit,
 234                                    direction, level, interrupt, pending);
 235                 }
 236         }
 237
 238         return;
 239
 240 unlock:
 241         mutex_unlock(&adnp->i2c_lock);
 242 }
 243
 244 static int adnp_gpio_setup(struct adnp *adnp, unsigned int num_gpios)
 245 {
 246         struct gpio_chip *chip = &adnp->gpio;
 247         int err;
 248
 249         adnp->reg_shift = get_count_order(num_gpios) - 3;
 250
 251         chip->direction_input = adnp_gpio_direction_input;
 252         chip->direction_output = adnp_gpio_direction_output;
 253         chip->get = adnp_gpio_get;
 254         chip->set = adnp_gpio_set;
 255         chip->can_sleep = true;
 256
 257         if (IS_ENABLED(CONFIG_DEBUG_FS))
 258                 chip->dbg_show = adnp_gpio_dbg_show;
 259
 260         chip->base = -1;
 261         chip->ngpio = num_gpios;
 262         chip->label = adnp->client->name;
 263         chip->parent = &adnp->client->dev;
 264         chip->of_node = chip->parent->of_node;
 265         chip->owner = THIS_MODULE;
 266
 267         err = devm_gpiochip_add_data(&adnp->client->dev, chip, adnp);
 268         if (err)
 269                 return err;
 270
 271         return 0;
 272 }
 273
 274 static irqreturn_t adnp_irq(int irq, void *data)
 275 {
 276         struct adnp *adnp = data;
 277         unsigned int num_regs, i;
 278
 279         num_regs = 1 << adnp->reg_shift;
 280
 281         for (i = 0; i < num_regs; i++) {
 282                 unsigned int base = i << adnp->reg_shift, bit;
 283                 u8 changed, level, isr, ier;
 284                 unsigned long pending;
 285                 int err;
 286
 287                 mutex_lock(&adnp->i2c_lock);
 288
 289                 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &level);
 290                 if (err < 0) {
 291                         mutex_unlock(&adnp->i2c_lock);
 292                         continue;
 293                 }
 294
 295                 err = adnp_read(adnp, GPIO_ISR(adnp) + i, &isr);
 296                 if (err < 0) {
 297                         mutex_unlock(&adnp->i2c_lock);
 298                         continue;
 299                 }
 300
 301                 err = adnp_read(adnp, GPIO_IER(adnp) + i, &ier);
 302                 if (err < 0) {
 303                         mutex_unlock(&adnp->i2c_lock);
 304                         continue;
 305                 }
 306
 307                 mutex_unlock(&adnp->i2c_lock);
 308
 309                 /* determine pins that changed levels */
 310                 changed = level ^ adnp->irq_level[i];
 311
 312                 /* compute edge-triggered interrupts */
 313                 pending = changed & ((adnp->irq_fall[i] & ~level) |
 314                                      (adnp->irq_rise[i] & level));
 315
 316                 /* add in level-triggered interrupts */
 317                 pending |= (adnp->irq_high[i] & level) |
 318                            (adnp->irq_low[i] & ~level);
 319
 320                 /* mask out non-pending and disabled interrupts */
 321                 pending &= isr & ier;
 322
 323                 for_each_set_bit(bit, &pending, 8) {
 324                         unsigned int child_irq;
 325                         child_irq = irq_find_mapping(adnp->gpio.irq.domain,
 326                                                      base + bit);
 327                         handle_nested_irq(child_irq);
 328                 }
 329         }
 330
 331         return IRQ_HANDLED;
 332 }
 333
 334 static void adnp_irq_mask(struct irq_data *d)
 335 {
 336         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 337         struct adnp *adnp = gpiochip_get_data(gc);
 338         unsigned int reg = d->hwirq >> adnp->reg_shift;
 339         unsigned int pos = d->hwirq & 7;
 340
 341         adnp->irq_enable[reg] &= ~BIT(pos);
 342 }
 343
 344 static void adnp_irq_unmask(struct irq_data *d)
 345 {
 346         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 347         struct adnp *adnp = gpiochip_get_data(gc);
 348         unsigned int reg = d->hwirq >> adnp->reg_shift;
 349         unsigned int pos = d->hwirq & 7;
 350
 351         adnp->irq_enable[reg] |= BIT(pos);
 352 }
 353
 354 static int adnp_irq_set_type(struct irq_data *d, unsigned int type)
 355 {
 356         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 357         struct adnp *adnp = gpiochip_get_data(gc);
 358         unsigned int reg = d->hwirq >> adnp->reg_shift;
 359         unsigned int pos = d->hwirq & 7;
 360
 361         if (type & IRQ_TYPE_EDGE_RISING)
 362                 adnp->irq_rise[reg] |= BIT(pos);
 363         else
 364                 adnp->irq_rise[reg] &= ~BIT(pos);
 365
 366         if (type & IRQ_TYPE_EDGE_FALLING)
 367                 adnp->irq_fall[reg] |= BIT(pos);
 368         else
 369                 adnp->irq_fall[reg] &= ~BIT(pos);
 370
 371         if (type & IRQ_TYPE_LEVEL_HIGH)
 372                 adnp->irq_high[reg] |= BIT(pos);
 373         else
 374                 adnp->irq_high[reg] &= ~BIT(pos);
 375
 376         if (type & IRQ_TYPE_LEVEL_LOW)
 377                 adnp->irq_low[reg] |= BIT(pos);
 378         else
 379                 adnp->irq_low[reg] &= ~BIT(pos);
 380
 381         return 0;
 382 }
 383
 384 static void adnp_irq_bus_lock(struct irq_data *d)
 385 {
 386         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 387         struct adnp *adnp = gpiochip_get_data(gc);
 388
 389         mutex_lock(&adnp->irq_lock);
 390 }
 391
 392 static void adnp_irq_bus_unlock(struct irq_data *d)
 393 {
 394         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 395         struct adnp *adnp = gpiochip_get_data(gc);
 396         unsigned int num_regs = 1 << adnp->reg_shift, i;
 397
 398         mutex_lock(&adnp->i2c_lock);
 399
 400         for (i = 0; i < num_regs; i++)
 401                 adnp_write(adnp, GPIO_IER(adnp) + i, adnp->irq_enable[i]);
 402
 403         mutex_unlock(&adnp->i2c_lock);
 404         mutex_unlock(&adnp->irq_lock);
 405 }
 406
 407 static struct irq_chip adnp_irq_chip = {
 408         .name = "gpio-adnp",
 409         .irq_mask = adnp_irq_mask,
 410         .irq_unmask = adnp_irq_unmask,
 411         .irq_set_type = adnp_irq_set_type,
 412         .irq_bus_lock = adnp_irq_bus_lock,
 413         .irq_bus_sync_unlock = adnp_irq_bus_unlock,
 414 };
 415
 416 static int adnp_irq_setup(struct adnp *adnp)
 417 {
 418         unsigned int num_regs = 1 << adnp->reg_shift, i;
 419         struct gpio_chip *chip = &adnp->gpio;
 420         int err;
 421
 422         mutex_init(&adnp->irq_lock);
 423
 424         /*
 425          * Allocate memory to keep track of the current level and trigger
 426          * modes of the interrupts. To avoid multiple allocations, a single
 427          * large buffer is allocated and pointers are setup to point at the
 428          * corresponding offsets. For consistency, the layout of the buffer
 429          * is chosen to match the register layout of the hardware in that
 430          * each segment contains the corresponding bits for all interrupts.
 431          */
 432         adnp->irq_enable = devm_kcalloc(chip->parent, num_regs, 6,
 433                                         GFP_KERNEL);
 434         if (!adnp->irq_enable)
 435                 return -ENOMEM;
 436
 437         adnp->irq_level = adnp->irq_enable + (num_regs * 1);
 438         adnp->irq_rise = adnp->irq_enable + (num_regs * 2);
 439         adnp->irq_fall = adnp->irq_enable + (num_regs * 3);
 440         adnp->irq_high = adnp->irq_enable + (num_regs * 4);
 441         adnp->irq_low = adnp->irq_enable + (num_regs * 5);
 442
 443         for (i = 0; i < num_regs; i++) {
 444                 /*
 445                  * Read the initial level of all pins to allow the emulation
 446                  * of edge triggered interrupts.
 447                  */
 448                 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &adnp->irq_level[i]);
 449                 if (err < 0)
 450                         return err;
 451
 452                 /* disable all interrupts */
 453                 err = adnp_write(adnp, GPIO_IER(adnp) + i, 0);
 454                 if (err < 0)
 455                         return err;
 456
 457                 adnp->irq_enable[i] = 0x00;
 458         }
 459
 460         err = devm_request_threaded_irq(chip->parent, adnp->client->irq,
 461                                         NULL, adnp_irq,
 462                                         IRQF_TRIGGER_RISING | IRQF_ONESHOT,
 463                                         dev_name(chip->parent), adnp);
 464         if (err != 0) {
 465                 dev_err(chip->parent, "can't request IRQ#%d: %d\n",
 466                         adnp->client->irq, err);
 467                 return err;
 468         }
 469
 470         err = gpiochip_irqchip_add_nested(chip,
 471                                           &adnp_irq_chip,
 472                                           0,
 473                                           handle_simple_irq,
 474                                           IRQ_TYPE_NONE);
 475         if (err) {
 476                 dev_err(chip->parent,
 477                         "could not connect irqchip to gpiochip\n");
 478                 return err;
 479         }
 480
 481         gpiochip_set_nested_irqchip(chip, &adnp_irq_chip, adnp->client->irq);
 482
 483         return 0;
 484 }
 485
 486 static int adnp_i2c_probe(struct i2c_client *client,
 487                                     const struct i2c_device_id *id)
 488 {
 489         struct device_node *np = client->dev.of_node;
 490         struct adnp *adnp;
 491         u32 num_gpios;
 492         int err;
 493
 494         err = of_property_read_u32(np, "nr-gpios", &num_gpios);
 495         if (err < 0)
 496                 return err;
 497
 498         client->irq = irq_of_parse_and_map(np, 0);
 499         if (!client->irq)
 500                 return -EPROBE_DEFER;
 501
 502         adnp = devm_kzalloc(&client->dev, sizeof(*adnp), GFP_KERNEL);
 503         if (!adnp)
 504                 return -ENOMEM;
 505
 506         mutex_init(&adnp->i2c_lock);
 507         adnp->client = client;
 508
 509         err = adnp_gpio_setup(adnp, num_gpios);
 510         if (err)
 511                 return err;
 512
 513         if (of_find_property(np, "interrupt-controller", NULL)) {
 514                 err = adnp_irq_setup(adnp);
 515                 if (err)
 516                         return err;
 517         }
 518
 519         i2c_set_clientdata(client, adnp);
 520
 521         return 0;
 522 }
 523
 524 static const struct i2c_device_id adnp_i2c_id[] = {
 525         { "gpio-adnp" },
 526         { },
 527 };
 528 MODULE_DEVICE_TABLE(i2c, adnp_i2c_id);
 529
 530 static const struct of_device_id adnp_of_match[] = {
 531         { .compatible = "ad,gpio-adnp", },
 532         { },
 533 };
 534 MODULE_DEVICE_TABLE(of, adnp_of_match);
 535
 536 static struct i2c_driver adnp_i2c_driver = {
 537         .driver = {
 538                 .name = "gpio-adnp",
 539                 .of_match_table = adnp_of_match,
 540         },
 541         .probe = adnp_i2c_probe,
 542         .id_table = adnp_i2c_id,
 543 };
 544 module_i2c_driver(adnp_i2c_driver);
 545
 546 MODULE_DESCRIPTION("Avionic Design N-bit GPIO expander");
 547 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
 548 MODULE_LICENSE("GPL");