drivers/gpio/gpio-f7188x.c

   1 /*
   2  * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
   3  *
   4  * Copyright (C) 2010-2013 LaCie
   5  *
   6  * Author: Simon Guinot <simon.guinot@sequanux.org>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/init.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18 #include <linux/gpio/driver.h>
  19 #include <linux/bitops.h>
  20
  21 #define DRVNAME "gpio-f7188x"
  22
  23 /*
  24  * Super-I/O registers
  25  */
  26 #define SIO_LDSEL               0x07    /* Logical device select */
  27 #define SIO_DEVID               0x20    /* Device ID (2 bytes) */
  28 #define SIO_DEVREV              0x22    /* Device revision */
  29 #define SIO_MANID               0x23    /* Fintek ID (2 bytes) */
  30
  31 #define SIO_LD_GPIO             0x06    /* GPIO logical device */
  32 #define SIO_UNLOCK_KEY          0x87    /* Key to enable Super-I/O */
  33 #define SIO_LOCK_KEY            0xAA    /* Key to disable Super-I/O */
  34
  35 #define SIO_FINTEK_ID           0x1934  /* Manufacturer ID */
  36 #define SIO_F71869_ID           0x0814  /* F71869 chipset ID */
  37 #define SIO_F71869A_ID          0x1007  /* F71869A chipset ID */
  38 #define SIO_F71882_ID           0x0541  /* F71882 chipset ID */
  39 #define SIO_F71889_ID           0x0909  /* F71889 chipset ID */
  40 #define SIO_F81866_ID           0x1010  /* F81866 chipset ID */
  41
  42 enum chips { f71869, f71869a, f71882fg, f71889f, f81866 };
  43
  44 static const char * const f7188x_names[] = {
  45         "f71869",
  46         "f71869a",
  47         "f71882fg",
  48         "f71889f",
  49         "f81866",
  50 };
  51
  52 struct f7188x_sio {
  53         int addr;
  54         enum chips type;
  55 };
  56
  57 struct f7188x_gpio_bank {
  58         struct gpio_chip chip;
  59         unsigned int regbase;
  60         struct f7188x_gpio_data *data;
  61 };
  62
  63 struct f7188x_gpio_data {
  64         struct f7188x_sio *sio;
  65         int nr_bank;
  66         struct f7188x_gpio_bank *bank;
  67 };
  68
  69 /*
  70  * Super-I/O functions.
  71  */
  72
  73 static inline int superio_inb(int base, int reg)
  74 {
  75         outb(reg, base);
  76         return inb(base + 1);
  77 }
  78
  79 static int superio_inw(int base, int reg)
  80 {
  81         int val;
  82
  83         outb(reg++, base);
  84         val = inb(base + 1) << 8;
  85         outb(reg, base);
  86         val |= inb(base + 1);
  87
  88         return val;
  89 }
  90
  91 static inline void superio_outb(int base, int reg, int val)
  92 {
  93         outb(reg, base);
  94         outb(val, base + 1);
  95 }
  96
  97 static inline int superio_enter(int base)
  98 {
  99         /* Don't step on other drivers' I/O space by accident. */
 100         if (!request_muxed_region(base, 2, DRVNAME)) {
 101                 pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
 102                 return -EBUSY;
 103         }
 104
 105         /* According to the datasheet the key must be send twice. */
 106         outb(SIO_UNLOCK_KEY, base);
 107         outb(SIO_UNLOCK_KEY, base);
 108
 109         return 0;
 110 }
 111
 112 static inline void superio_select(int base, int ld)
 113 {
 114         outb(SIO_LDSEL, base);
 115         outb(ld, base + 1);
 116 }
 117
 118 static inline void superio_exit(int base)
 119 {
 120         outb(SIO_LOCK_KEY, base);
 121         release_region(base, 2);
 122 }
 123
 124 /*
 125  * GPIO chip.
 126  */
 127
 128 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset);
 129 static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
 130 static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
 131 static int f7188x_gpio_direction_out(struct gpio_chip *chip,
 132                                      unsigned offset, int value);
 133 static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
 134 static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
 135                                   unsigned long config);
 136
 137 #define F7188X_GPIO_BANK(_base, _ngpio, _regbase)                       \
 138         {                                                               \
 139                 .chip = {                                               \
 140                         .label            = DRVNAME,                    \
 141                         .owner            = THIS_MODULE,                \
 142                         .get_direction    = f7188x_gpio_get_direction,  \
 143                         .direction_input  = f7188x_gpio_direction_in,   \
 144                         .get              = f7188x_gpio_get,            \
 145                         .direction_output = f7188x_gpio_direction_out,  \
 146                         .set              = f7188x_gpio_set,            \
 147                         .set_config       = f7188x_gpio_set_config,     \
 148                         .base             = _base,                      \
 149                         .ngpio            = _ngpio,                     \
 150                         .can_sleep        = true,                       \
 151                 },                                                      \
 152                 .regbase = _regbase,                                    \
 153         }
 154
 155 #define gpio_dir(base) (base + 0)
 156 #define gpio_data_out(base) (base + 1)
 157 #define gpio_data_in(base) (base + 2)
 158 /* Output mode register (0:open drain 1:push-pull). */
 159 #define gpio_out_mode(base) (base + 3)
 160
 161 static struct f7188x_gpio_bank f71869_gpio_bank[] = {
 162         F7188X_GPIO_BANK(0, 6, 0xF0),
 163         F7188X_GPIO_BANK(10, 8, 0xE0),
 164         F7188X_GPIO_BANK(20, 8, 0xD0),
 165         F7188X_GPIO_BANK(30, 8, 0xC0),
 166         F7188X_GPIO_BANK(40, 8, 0xB0),
 167         F7188X_GPIO_BANK(50, 5, 0xA0),
 168         F7188X_GPIO_BANK(60, 6, 0x90),
 169 };
 170
 171 static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
 172         F7188X_GPIO_BANK(0, 6, 0xF0),
 173         F7188X_GPIO_BANK(10, 8, 0xE0),
 174         F7188X_GPIO_BANK(20, 8, 0xD0),
 175         F7188X_GPIO_BANK(30, 8, 0xC0),
 176         F7188X_GPIO_BANK(40, 8, 0xB0),
 177         F7188X_GPIO_BANK(50, 5, 0xA0),
 178         F7188X_GPIO_BANK(60, 8, 0x90),
 179         F7188X_GPIO_BANK(70, 8, 0x80),
 180 };
 181
 182 static struct f7188x_gpio_bank f71882_gpio_bank[] = {
 183         F7188X_GPIO_BANK(0, 8, 0xF0),
 184         F7188X_GPIO_BANK(10, 8, 0xE0),
 185         F7188X_GPIO_BANK(20, 8, 0xD0),
 186         F7188X_GPIO_BANK(30, 4, 0xC0),
 187         F7188X_GPIO_BANK(40, 4, 0xB0),
 188 };
 189
 190 static struct f7188x_gpio_bank f71889_gpio_bank[] = {
 191         F7188X_GPIO_BANK(0, 7, 0xF0),
 192         F7188X_GPIO_BANK(10, 7, 0xE0),
 193         F7188X_GPIO_BANK(20, 8, 0xD0),
 194         F7188X_GPIO_BANK(30, 8, 0xC0),
 195         F7188X_GPIO_BANK(40, 8, 0xB0),
 196         F7188X_GPIO_BANK(50, 5, 0xA0),
 197         F7188X_GPIO_BANK(60, 8, 0x90),
 198         F7188X_GPIO_BANK(70, 8, 0x80),
 199 };
 200
 201 static struct f7188x_gpio_bank f81866_gpio_bank[] = {
 202         F7188X_GPIO_BANK(0, 8, 0xF0),
 203         F7188X_GPIO_BANK(10, 8, 0xE0),
 204         F7188X_GPIO_BANK(20, 8, 0xD0),
 205         F7188X_GPIO_BANK(30, 8, 0xC0),
 206         F7188X_GPIO_BANK(40, 8, 0xB0),
 207         F7188X_GPIO_BANK(50, 8, 0xA0),
 208         F7188X_GPIO_BANK(60, 8, 0x90),
 209         F7188X_GPIO_BANK(70, 8, 0x80),
 210         F7188X_GPIO_BANK(80, 8, 0x88),
 211 };
 212
 213 static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
 214 {
 215         int err;
 216         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 217         struct f7188x_sio *sio = bank->data->sio;
 218         u8 dir;
 219
 220         err = superio_enter(sio->addr);
 221         if (err)
 222                 return err;
 223         superio_select(sio->addr, SIO_LD_GPIO);
 224
 225         dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
 226
 227         superio_exit(sio->addr);
 228
 229         return !(dir & 1 << offset);
 230 }
 231
 232 static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
 233 {
 234         int err;
 235         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 236         struct f7188x_sio *sio = bank->data->sio;
 237         u8 dir;
 238
 239         err = superio_enter(sio->addr);
 240         if (err)
 241                 return err;
 242         superio_select(sio->addr, SIO_LD_GPIO);
 243
 244         dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
 245         dir &= ~BIT(offset);
 246         superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
 247
 248         superio_exit(sio->addr);
 249
 250         return 0;
 251 }
 252
 253 static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
 254 {
 255         int err;
 256         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 257         struct f7188x_sio *sio = bank->data->sio;
 258         u8 dir, data;
 259
 260         err = superio_enter(sio->addr);
 261         if (err)
 262                 return err;
 263         superio_select(sio->addr, SIO_LD_GPIO);
 264
 265         dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
 266         dir = !!(dir & BIT(offset));
 267         if (dir)
 268                 data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
 269         else
 270                 data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
 271
 272         superio_exit(sio->addr);
 273
 274         return !!(data & BIT(offset));
 275 }
 276
 277 static int f7188x_gpio_direction_out(struct gpio_chip *chip,
 278                                      unsigned offset, int value)
 279 {
 280         int err;
 281         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 282         struct f7188x_sio *sio = bank->data->sio;
 283         u8 dir, data_out;
 284
 285         err = superio_enter(sio->addr);
 286         if (err)
 287                 return err;
 288         superio_select(sio->addr, SIO_LD_GPIO);
 289
 290         data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
 291         if (value)
 292                 data_out |= BIT(offset);
 293         else
 294                 data_out &= ~BIT(offset);
 295         superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
 296
 297         dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
 298         dir |= BIT(offset);
 299         superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
 300
 301         superio_exit(sio->addr);
 302
 303         return 0;
 304 }
 305
 306 static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 307 {
 308         int err;
 309         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 310         struct f7188x_sio *sio = bank->data->sio;
 311         u8 data_out;
 312
 313         err = superio_enter(sio->addr);
 314         if (err)
 315                 return;
 316         superio_select(sio->addr, SIO_LD_GPIO);
 317
 318         data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
 319         if (value)
 320                 data_out |= BIT(offset);
 321         else
 322                 data_out &= ~BIT(offset);
 323         superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
 324
 325         superio_exit(sio->addr);
 326 }
 327
 328 static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
 329                                   unsigned long config)
 330 {
 331         int err;
 332         enum pin_config_param param = pinconf_to_config_param(config);
 333         struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
 334         struct f7188x_sio *sio = bank->data->sio;
 335         u8 data;
 336
 337         if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN &&
 338             param != PIN_CONFIG_DRIVE_PUSH_PULL)
 339                 return -ENOTSUPP;
 340
 341         err = superio_enter(sio->addr);
 342         if (err)
 343                 return err;
 344         superio_select(sio->addr, SIO_LD_GPIO);
 345
 346         data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
 347         if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
 348                 data &= ~BIT(offset);
 349         else
 350                 data |= BIT(offset);
 351         superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
 352
 353         superio_exit(sio->addr);
 354         return 0;
 355 }
 356
 357 /*
 358  * Platform device and driver.
 359  */
 360
 361 static int f7188x_gpio_probe(struct platform_device *pdev)
 362 {
 363         int err;
 364         int i;
 365         struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
 366         struct f7188x_gpio_data *data;
 367
 368         data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
 369         if (!data)
 370                 return -ENOMEM;
 371
 372         switch (sio->type) {
 373         case f71869:
 374                 data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
 375                 data->bank = f71869_gpio_bank;
 376                 break;
 377         case f71869a:
 378                 data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
 379                 data->bank = f71869a_gpio_bank;
 380                 break;
 381         case f71882fg:
 382                 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
 383                 data->bank = f71882_gpio_bank;
 384                 break;
 385         case f71889f:
 386                 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
 387                 data->bank = f71889_gpio_bank;
 388                 break;
 389         case f81866:
 390                 data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
 391                 data->bank = f81866_gpio_bank;
 392                 break;
 393         default:
 394                 return -ENODEV;
 395         }
 396         data->sio = sio;
 397
 398         platform_set_drvdata(pdev, data);
 399
 400         /* For each GPIO bank, register a GPIO chip. */
 401         for (i = 0; i < data->nr_bank; i++) {
 402                 struct f7188x_gpio_bank *bank = &data->bank[i];
 403
 404                 bank->chip.parent = &pdev->dev;
 405                 bank->data = data;
 406
 407                 err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank);
 408                 if (err) {
 409                         dev_err(&pdev->dev,
 410                                 "Failed to register gpiochip %d: %d\n",
 411                                 i, err);
 412                         return err;
 413                 }
 414         }
 415
 416         return 0;
 417 }
 418
 419 static int __init f7188x_find(int addr, struct f7188x_sio *sio)
 420 {
 421         int err;
 422         u16 devid;
 423
 424         err = superio_enter(addr);
 425         if (err)
 426                 return err;
 427
 428         err = -ENODEV;
 429         devid = superio_inw(addr, SIO_MANID);
 430         if (devid != SIO_FINTEK_ID) {
 431                 pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
 432                 goto err;
 433         }
 434
 435         devid = superio_inw(addr, SIO_DEVID);
 436         switch (devid) {
 437         case SIO_F71869_ID:
 438                 sio->type = f71869;
 439                 break;
 440         case SIO_F71869A_ID:
 441                 sio->type = f71869a;
 442                 break;
 443         case SIO_F71882_ID:
 444                 sio->type = f71882fg;
 445                 break;
 446         case SIO_F71889_ID:
 447                 sio->type = f71889f;
 448                 break;
 449         case SIO_F81866_ID:
 450                 sio->type = f81866;
 451                 break;
 452         default:
 453                 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
 454                 goto err;
 455         }
 456         sio->addr = addr;
 457         err = 0;
 458
 459         pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
 460                 f7188x_names[sio->type],
 461                 (unsigned int) addr,
 462                 (int) superio_inb(addr, SIO_DEVREV));
 463
 464 err:
 465         superio_exit(addr);
 466         return err;
 467 }
 468
 469 static struct platform_device *f7188x_gpio_pdev;
 470
 471 static int __init
 472 f7188x_gpio_device_add(const struct f7188x_sio *sio)
 473 {
 474         int err;
 475
 476         f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
 477         if (!f7188x_gpio_pdev)
 478                 return -ENOMEM;
 479
 480         err = platform_device_add_data(f7188x_gpio_pdev,
 481                                        sio, sizeof(*sio));
 482         if (err) {
 483                 pr_err(DRVNAME "Platform data allocation failed\n");
 484                 goto err;
 485         }
 486
 487         err = platform_device_add(f7188x_gpio_pdev);
 488         if (err) {
 489                 pr_err(DRVNAME "Device addition failed\n");
 490                 goto err;
 491         }
 492
 493         return 0;
 494
 495 err:
 496         platform_device_put(f7188x_gpio_pdev);
 497
 498         return err;
 499 }
 500
 501 /*
 502  * Try to match a supported Fintek device by reading the (hard-wired)
 503  * configuration I/O ports. If available, then register both the platform
 504  * device and driver to support the GPIOs.
 505  */
 506
 507 static struct platform_driver f7188x_gpio_driver = {
 508         .driver = {
 509                 .name   = DRVNAME,
 510         },
 511         .probe          = f7188x_gpio_probe,
 512 };
 513
 514 static int __init f7188x_gpio_init(void)
 515 {
 516         int err;
 517         struct f7188x_sio sio;
 518
 519         if (f7188x_find(0x2e, &sio) &&
 520             f7188x_find(0x4e, &sio))
 521                 return -ENODEV;
 522
 523         err = platform_driver_register(&f7188x_gpio_driver);
 524         if (!err) {
 525                 err = f7188x_gpio_device_add(&sio);
 526                 if (err)
 527                         platform_driver_unregister(&f7188x_gpio_driver);
 528         }
 529
 530         return err;
 531 }
 532 subsys_initcall(f7188x_gpio_init);
 533
 534 static void __exit f7188x_gpio_exit(void)
 535 {
 536         platform_device_unregister(f7188x_gpio_pdev);
 537         platform_driver_unregister(&f7188x_gpio_driver);
 538 }
 539 module_exit(f7188x_gpio_exit);
 540
 541 MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
 542 MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
 543 MODULE_LICENSE("GPL");