2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
4 * Copyright (C) 2010-2013 LaCie
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
18 #include <linux/gpio/driver.h>
19 #include <linux/bitops.h>
21 #define DRVNAME "gpio-f7188x"
26 #define SIO_LDSEL 0x07 /* Logical device select */
27 #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
28 #define SIO_DEVREV 0x22 /* Device revision */
29 #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
31 #define SIO_LD_GPIO 0x06 /* GPIO logical device */
32 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
33 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
35 #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
36 #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
37 #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
38 #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
39 #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
40 #define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
42 enum chips
{ f71869
, f71869a
, f71882fg
, f71889f
, f81866
};
44 static const char * const f7188x_names
[] = {
57 struct f7188x_gpio_bank
{
58 struct gpio_chip chip
;
60 struct f7188x_gpio_data
*data
;
63 struct f7188x_gpio_data
{
64 struct f7188x_sio
*sio
;
66 struct f7188x_gpio_bank
*bank
;
70 * Super-I/O functions.
73 static inline int superio_inb(int base
, int reg
)
79 static int superio_inw(int base
, int reg
)
84 val
= inb(base
+ 1) << 8;
91 static inline void superio_outb(int base
, int reg
, int val
)
97 static inline int superio_enter(int base
)
99 /* Don't step on other drivers' I/O space by accident. */
100 if (!request_muxed_region(base
, 2, DRVNAME
)) {
101 pr_err(DRVNAME
"I/O address 0x%04x already in use\n", base
);
105 /* According to the datasheet the key must be send twice. */
106 outb(SIO_UNLOCK_KEY
, base
);
107 outb(SIO_UNLOCK_KEY
, base
);
112 static inline void superio_select(int base
, int ld
)
114 outb(SIO_LDSEL
, base
);
118 static inline void superio_exit(int base
)
120 outb(SIO_LOCK_KEY
, base
);
121 release_region(base
, 2);
128 static int f7188x_gpio_get_direction(struct gpio_chip
*chip
, unsigned offset
);
129 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
);
130 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
);
131 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
132 unsigned offset
, int value
);
133 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
);
134 static int f7188x_gpio_set_single_ended(struct gpio_chip
*gc
,
136 enum single_ended_mode mode
);
138 #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
142 .owner = THIS_MODULE, \
143 .get_direction = f7188x_gpio_get_direction, \
144 .direction_input = f7188x_gpio_direction_in, \
145 .get = f7188x_gpio_get, \
146 .direction_output = f7188x_gpio_direction_out, \
147 .set = f7188x_gpio_set, \
148 .set_single_ended = f7188x_gpio_set_single_ended, \
153 .regbase = _regbase, \
156 #define gpio_dir(base) (base + 0)
157 #define gpio_data_out(base) (base + 1)
158 #define gpio_data_in(base) (base + 2)
159 /* Output mode register (0:open drain 1:push-pull). */
160 #define gpio_out_mode(base) (base + 3)
162 static struct f7188x_gpio_bank f71869_gpio_bank
[] = {
163 F7188X_GPIO_BANK(0, 6, 0xF0),
164 F7188X_GPIO_BANK(10, 8, 0xE0),
165 F7188X_GPIO_BANK(20, 8, 0xD0),
166 F7188X_GPIO_BANK(30, 8, 0xC0),
167 F7188X_GPIO_BANK(40, 8, 0xB0),
168 F7188X_GPIO_BANK(50, 5, 0xA0),
169 F7188X_GPIO_BANK(60, 6, 0x90),
172 static struct f7188x_gpio_bank f71869a_gpio_bank
[] = {
173 F7188X_GPIO_BANK(0, 6, 0xF0),
174 F7188X_GPIO_BANK(10, 8, 0xE0),
175 F7188X_GPIO_BANK(20, 8, 0xD0),
176 F7188X_GPIO_BANK(30, 8, 0xC0),
177 F7188X_GPIO_BANK(40, 8, 0xB0),
178 F7188X_GPIO_BANK(50, 5, 0xA0),
179 F7188X_GPIO_BANK(60, 8, 0x90),
180 F7188X_GPIO_BANK(70, 8, 0x80),
183 static struct f7188x_gpio_bank f71882_gpio_bank
[] = {
184 F7188X_GPIO_BANK(0, 8, 0xF0),
185 F7188X_GPIO_BANK(10, 8, 0xE0),
186 F7188X_GPIO_BANK(20, 8, 0xD0),
187 F7188X_GPIO_BANK(30, 4, 0xC0),
188 F7188X_GPIO_BANK(40, 4, 0xB0),
191 static struct f7188x_gpio_bank f71889_gpio_bank
[] = {
192 F7188X_GPIO_BANK(0, 7, 0xF0),
193 F7188X_GPIO_BANK(10, 7, 0xE0),
194 F7188X_GPIO_BANK(20, 8, 0xD0),
195 F7188X_GPIO_BANK(30, 8, 0xC0),
196 F7188X_GPIO_BANK(40, 8, 0xB0),
197 F7188X_GPIO_BANK(50, 5, 0xA0),
198 F7188X_GPIO_BANK(60, 8, 0x90),
199 F7188X_GPIO_BANK(70, 8, 0x80),
202 static struct f7188x_gpio_bank f81866_gpio_bank
[] = {
203 F7188X_GPIO_BANK(0, 8, 0xF0),
204 F7188X_GPIO_BANK(10, 8, 0xE0),
205 F7188X_GPIO_BANK(20, 8, 0xD0),
206 F7188X_GPIO_BANK(30, 8, 0xC0),
207 F7188X_GPIO_BANK(40, 8, 0xB0),
208 F7188X_GPIO_BANK(50, 8, 0xA0),
209 F7188X_GPIO_BANK(60, 8, 0x90),
210 F7188X_GPIO_BANK(70, 8, 0x80),
211 F7188X_GPIO_BANK(80, 8, 0x88),
214 static int f7188x_gpio_get_direction(struct gpio_chip
*chip
, unsigned offset
)
217 struct f7188x_gpio_bank
*bank
=
218 container_of(chip
, struct f7188x_gpio_bank
, chip
);
219 struct f7188x_sio
*sio
= bank
->data
->sio
;
222 err
= superio_enter(sio
->addr
);
225 superio_select(sio
->addr
, SIO_LD_GPIO
);
227 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
229 superio_exit(sio
->addr
);
231 return !(dir
& 1 << offset
);
234 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
)
237 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
238 struct f7188x_sio
*sio
= bank
->data
->sio
;
241 err
= superio_enter(sio
->addr
);
244 superio_select(sio
->addr
, SIO_LD_GPIO
);
246 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
248 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
250 superio_exit(sio
->addr
);
255 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
258 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
259 struct f7188x_sio
*sio
= bank
->data
->sio
;
262 err
= superio_enter(sio
->addr
);
265 superio_select(sio
->addr
, SIO_LD_GPIO
);
267 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
268 dir
= !!(dir
& BIT(offset
));
270 data
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
272 data
= superio_inb(sio
->addr
, gpio_data_in(bank
->regbase
));
274 superio_exit(sio
->addr
);
276 return !!(data
& BIT(offset
));
279 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
280 unsigned offset
, int value
)
283 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
284 struct f7188x_sio
*sio
= bank
->data
->sio
;
287 err
= superio_enter(sio
->addr
);
290 superio_select(sio
->addr
, SIO_LD_GPIO
);
292 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
294 data_out
|= BIT(offset
);
296 data_out
&= ~BIT(offset
);
297 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
299 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
301 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
303 superio_exit(sio
->addr
);
308 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
311 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
312 struct f7188x_sio
*sio
= bank
->data
->sio
;
315 err
= superio_enter(sio
->addr
);
318 superio_select(sio
->addr
, SIO_LD_GPIO
);
320 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
322 data_out
|= BIT(offset
);
324 data_out
&= ~BIT(offset
);
325 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
327 superio_exit(sio
->addr
);
330 static int f7188x_gpio_set_single_ended(struct gpio_chip
*chip
,
332 enum single_ended_mode mode
)
335 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
336 struct f7188x_sio
*sio
= bank
->data
->sio
;
339 if (mode
!= LINE_MODE_OPEN_DRAIN
&&
340 mode
!= LINE_MODE_PUSH_PULL
)
343 err
= superio_enter(sio
->addr
);
346 superio_select(sio
->addr
, SIO_LD_GPIO
);
348 data
= superio_inb(sio
->addr
, gpio_out_mode(bank
->regbase
));
349 if (mode
== LINE_MODE_OPEN_DRAIN
)
350 data
&= ~BIT(offset
);
353 superio_outb(sio
->addr
, gpio_out_mode(bank
->regbase
), data
);
355 superio_exit(sio
->addr
);
360 * Platform device and driver.
363 static int f7188x_gpio_probe(struct platform_device
*pdev
)
367 struct f7188x_sio
*sio
= dev_get_platdata(&pdev
->dev
);
368 struct f7188x_gpio_data
*data
;
370 data
= devm_kzalloc(&pdev
->dev
, sizeof(*data
), GFP_KERNEL
);
376 data
->nr_bank
= ARRAY_SIZE(f71869_gpio_bank
);
377 data
->bank
= f71869_gpio_bank
;
380 data
->nr_bank
= ARRAY_SIZE(f71869a_gpio_bank
);
381 data
->bank
= f71869a_gpio_bank
;
384 data
->nr_bank
= ARRAY_SIZE(f71882_gpio_bank
);
385 data
->bank
= f71882_gpio_bank
;
388 data
->nr_bank
= ARRAY_SIZE(f71889_gpio_bank
);
389 data
->bank
= f71889_gpio_bank
;
392 data
->nr_bank
= ARRAY_SIZE(f81866_gpio_bank
);
393 data
->bank
= f81866_gpio_bank
;
400 platform_set_drvdata(pdev
, data
);
402 /* For each GPIO bank, register a GPIO chip. */
403 for (i
= 0; i
< data
->nr_bank
; i
++) {
404 struct f7188x_gpio_bank
*bank
= &data
->bank
[i
];
406 bank
->chip
.parent
= &pdev
->dev
;
409 err
= devm_gpiochip_add_data(&pdev
->dev
, &bank
->chip
, bank
);
412 "Failed to register gpiochip %d: %d\n",
421 static int __init
f7188x_find(int addr
, struct f7188x_sio
*sio
)
426 err
= superio_enter(addr
);
431 devid
= superio_inw(addr
, SIO_MANID
);
432 if (devid
!= SIO_FINTEK_ID
) {
433 pr_debug(DRVNAME
": Not a Fintek device at 0x%08x\n", addr
);
437 devid
= superio_inw(addr
, SIO_DEVID
);
446 sio
->type
= f71882fg
;
455 pr_info(DRVNAME
": Unsupported Fintek device 0x%04x\n", devid
);
461 pr_info(DRVNAME
": Found %s at %#x, revision %d\n",
462 f7188x_names
[sio
->type
],
464 (int) superio_inb(addr
, SIO_DEVREV
));
471 static struct platform_device
*f7188x_gpio_pdev
;
474 f7188x_gpio_device_add(const struct f7188x_sio
*sio
)
478 f7188x_gpio_pdev
= platform_device_alloc(DRVNAME
, -1);
479 if (!f7188x_gpio_pdev
)
482 err
= platform_device_add_data(f7188x_gpio_pdev
,
485 pr_err(DRVNAME
"Platform data allocation failed\n");
489 err
= platform_device_add(f7188x_gpio_pdev
);
491 pr_err(DRVNAME
"Device addition failed\n");
498 platform_device_put(f7188x_gpio_pdev
);
504 * Try to match a supported Fintek device by reading the (hard-wired)
505 * configuration I/O ports. If available, then register both the platform
506 * device and driver to support the GPIOs.
509 static struct platform_driver f7188x_gpio_driver
= {
513 .probe
= f7188x_gpio_probe
,
516 static int __init
f7188x_gpio_init(void)
519 struct f7188x_sio sio
;
521 if (f7188x_find(0x2e, &sio
) &&
522 f7188x_find(0x4e, &sio
))
525 err
= platform_driver_register(&f7188x_gpio_driver
);
527 err
= f7188x_gpio_device_add(&sio
);
529 platform_driver_unregister(&f7188x_gpio_driver
);
534 subsys_initcall(f7188x_gpio_init
);
536 static void __exit
f7188x_gpio_exit(void)
538 platform_device_unregister(f7188x_gpio_pdev
);
539 platform_driver_unregister(&f7188x_gpio_driver
);
541 module_exit(f7188x_gpio_exit
);
543 MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889F and F81866");
544 MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
545 MODULE_LICENSE("GPL");