2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
4 * Copyright (C) 2010-2013 LaCie
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
18 #include <linux/gpio/driver.h>
19 #include <linux/bitops.h>
21 #define DRVNAME "gpio-f7188x"
26 #define SIO_LDSEL 0x07 /* Logical device select */
27 #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
28 #define SIO_DEVREV 0x22 /* Device revision */
29 #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
31 #define SIO_LD_GPIO 0x06 /* GPIO logical device */
32 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
33 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
35 #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
36 #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
37 #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
38 #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
39 #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
40 #define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
41 #define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
42 #define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for f81966 */
45 enum chips
{ f71869
, f71869a
, f71882fg
, f71889a
, f71889f
, f81866
, f81804
};
47 static const char * const f7188x_names
[] = {
62 struct f7188x_gpio_bank
{
63 struct gpio_chip chip
;
65 struct f7188x_gpio_data
*data
;
68 struct f7188x_gpio_data
{
69 struct f7188x_sio
*sio
;
71 struct f7188x_gpio_bank
*bank
;
75 * Super-I/O functions.
78 static inline int superio_inb(int base
, int reg
)
84 static int superio_inw(int base
, int reg
)
89 val
= inb(base
+ 1) << 8;
96 static inline void superio_outb(int base
, int reg
, int val
)
102 static inline int superio_enter(int base
)
104 /* Don't step on other drivers' I/O space by accident. */
105 if (!request_muxed_region(base
, 2, DRVNAME
)) {
106 pr_err(DRVNAME
"I/O address 0x%04x already in use\n", base
);
110 /* According to the datasheet the key must be send twice. */
111 outb(SIO_UNLOCK_KEY
, base
);
112 outb(SIO_UNLOCK_KEY
, base
);
117 static inline void superio_select(int base
, int ld
)
119 outb(SIO_LDSEL
, base
);
123 static inline void superio_exit(int base
)
125 outb(SIO_LOCK_KEY
, base
);
126 release_region(base
, 2);
133 static int f7188x_gpio_get_direction(struct gpio_chip
*chip
, unsigned offset
);
134 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
);
135 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
);
136 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
137 unsigned offset
, int value
);
138 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
);
139 static int f7188x_gpio_set_config(struct gpio_chip
*chip
, unsigned offset
,
140 unsigned long config
);
142 #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
146 .owner = THIS_MODULE, \
147 .get_direction = f7188x_gpio_get_direction, \
148 .direction_input = f7188x_gpio_direction_in, \
149 .get = f7188x_gpio_get, \
150 .direction_output = f7188x_gpio_direction_out, \
151 .set = f7188x_gpio_set, \
152 .set_config = f7188x_gpio_set_config, \
157 .regbase = _regbase, \
160 #define gpio_dir(base) (base + 0)
161 #define gpio_data_out(base) (base + 1)
162 #define gpio_data_in(base) (base + 2)
163 /* Output mode register (0:open drain 1:push-pull). */
164 #define gpio_out_mode(base) (base + 3)
166 static struct f7188x_gpio_bank f71869_gpio_bank
[] = {
167 F7188X_GPIO_BANK(0, 6, 0xF0),
168 F7188X_GPIO_BANK(10, 8, 0xE0),
169 F7188X_GPIO_BANK(20, 8, 0xD0),
170 F7188X_GPIO_BANK(30, 8, 0xC0),
171 F7188X_GPIO_BANK(40, 8, 0xB0),
172 F7188X_GPIO_BANK(50, 5, 0xA0),
173 F7188X_GPIO_BANK(60, 6, 0x90),
176 static struct f7188x_gpio_bank f71869a_gpio_bank
[] = {
177 F7188X_GPIO_BANK(0, 6, 0xF0),
178 F7188X_GPIO_BANK(10, 8, 0xE0),
179 F7188X_GPIO_BANK(20, 8, 0xD0),
180 F7188X_GPIO_BANK(30, 8, 0xC0),
181 F7188X_GPIO_BANK(40, 8, 0xB0),
182 F7188X_GPIO_BANK(50, 5, 0xA0),
183 F7188X_GPIO_BANK(60, 8, 0x90),
184 F7188X_GPIO_BANK(70, 8, 0x80),
187 static struct f7188x_gpio_bank f71882_gpio_bank
[] = {
188 F7188X_GPIO_BANK(0, 8, 0xF0),
189 F7188X_GPIO_BANK(10, 8, 0xE0),
190 F7188X_GPIO_BANK(20, 8, 0xD0),
191 F7188X_GPIO_BANK(30, 4, 0xC0),
192 F7188X_GPIO_BANK(40, 4, 0xB0),
195 static struct f7188x_gpio_bank f71889a_gpio_bank
[] = {
196 F7188X_GPIO_BANK(0, 7, 0xF0),
197 F7188X_GPIO_BANK(10, 7, 0xE0),
198 F7188X_GPIO_BANK(20, 8, 0xD0),
199 F7188X_GPIO_BANK(30, 8, 0xC0),
200 F7188X_GPIO_BANK(40, 8, 0xB0),
201 F7188X_GPIO_BANK(50, 5, 0xA0),
202 F7188X_GPIO_BANK(60, 8, 0x90),
203 F7188X_GPIO_BANK(70, 8, 0x80),
206 static struct f7188x_gpio_bank f71889_gpio_bank
[] = {
207 F7188X_GPIO_BANK(0, 7, 0xF0),
208 F7188X_GPIO_BANK(10, 7, 0xE0),
209 F7188X_GPIO_BANK(20, 8, 0xD0),
210 F7188X_GPIO_BANK(30, 8, 0xC0),
211 F7188X_GPIO_BANK(40, 8, 0xB0),
212 F7188X_GPIO_BANK(50, 5, 0xA0),
213 F7188X_GPIO_BANK(60, 8, 0x90),
214 F7188X_GPIO_BANK(70, 8, 0x80),
217 static struct f7188x_gpio_bank f81866_gpio_bank
[] = {
218 F7188X_GPIO_BANK(0, 8, 0xF0),
219 F7188X_GPIO_BANK(10, 8, 0xE0),
220 F7188X_GPIO_BANK(20, 8, 0xD0),
221 F7188X_GPIO_BANK(30, 8, 0xC0),
222 F7188X_GPIO_BANK(40, 8, 0xB0),
223 F7188X_GPIO_BANK(50, 8, 0xA0),
224 F7188X_GPIO_BANK(60, 8, 0x90),
225 F7188X_GPIO_BANK(70, 8, 0x80),
226 F7188X_GPIO_BANK(80, 8, 0x88),
230 static struct f7188x_gpio_bank f81804_gpio_bank
[] = {
231 F7188X_GPIO_BANK(0, 8, 0xF0),
232 F7188X_GPIO_BANK(10, 8, 0xE0),
233 F7188X_GPIO_BANK(20, 8, 0xD0),
234 F7188X_GPIO_BANK(50, 8, 0xA0),
235 F7188X_GPIO_BANK(60, 8, 0x90),
236 F7188X_GPIO_BANK(70, 8, 0x80),
237 F7188X_GPIO_BANK(90, 8, 0x98),
241 static int f7188x_gpio_get_direction(struct gpio_chip
*chip
, unsigned offset
)
244 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
245 struct f7188x_sio
*sio
= bank
->data
->sio
;
248 err
= superio_enter(sio
->addr
);
251 superio_select(sio
->addr
, SIO_LD_GPIO
);
253 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
255 superio_exit(sio
->addr
);
257 return !(dir
& 1 << offset
);
260 static int f7188x_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
)
263 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
264 struct f7188x_sio
*sio
= bank
->data
->sio
;
267 err
= superio_enter(sio
->addr
);
270 superio_select(sio
->addr
, SIO_LD_GPIO
);
272 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
274 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
276 superio_exit(sio
->addr
);
281 static int f7188x_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
284 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
285 struct f7188x_sio
*sio
= bank
->data
->sio
;
288 err
= superio_enter(sio
->addr
);
291 superio_select(sio
->addr
, SIO_LD_GPIO
);
293 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
294 dir
= !!(dir
& BIT(offset
));
296 data
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
298 data
= superio_inb(sio
->addr
, gpio_data_in(bank
->regbase
));
300 superio_exit(sio
->addr
);
302 return !!(data
& BIT(offset
));
305 static int f7188x_gpio_direction_out(struct gpio_chip
*chip
,
306 unsigned offset
, int value
)
309 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
310 struct f7188x_sio
*sio
= bank
->data
->sio
;
313 err
= superio_enter(sio
->addr
);
316 superio_select(sio
->addr
, SIO_LD_GPIO
);
318 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
320 data_out
|= BIT(offset
);
322 data_out
&= ~BIT(offset
);
323 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
325 dir
= superio_inb(sio
->addr
, gpio_dir(bank
->regbase
));
327 superio_outb(sio
->addr
, gpio_dir(bank
->regbase
), dir
);
329 superio_exit(sio
->addr
);
334 static void f7188x_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
337 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
338 struct f7188x_sio
*sio
= bank
->data
->sio
;
341 err
= superio_enter(sio
->addr
);
344 superio_select(sio
->addr
, SIO_LD_GPIO
);
346 data_out
= superio_inb(sio
->addr
, gpio_data_out(bank
->regbase
));
348 data_out
|= BIT(offset
);
350 data_out
&= ~BIT(offset
);
351 superio_outb(sio
->addr
, gpio_data_out(bank
->regbase
), data_out
);
353 superio_exit(sio
->addr
);
356 static int f7188x_gpio_set_config(struct gpio_chip
*chip
, unsigned offset
,
357 unsigned long config
)
360 enum pin_config_param param
= pinconf_to_config_param(config
);
361 struct f7188x_gpio_bank
*bank
= gpiochip_get_data(chip
);
362 struct f7188x_sio
*sio
= bank
->data
->sio
;
365 if (param
!= PIN_CONFIG_DRIVE_OPEN_DRAIN
&&
366 param
!= PIN_CONFIG_DRIVE_PUSH_PULL
)
369 err
= superio_enter(sio
->addr
);
372 superio_select(sio
->addr
, SIO_LD_GPIO
);
374 data
= superio_inb(sio
->addr
, gpio_out_mode(bank
->regbase
));
375 if (param
== PIN_CONFIG_DRIVE_OPEN_DRAIN
)
376 data
&= ~BIT(offset
);
379 superio_outb(sio
->addr
, gpio_out_mode(bank
->regbase
), data
);
381 superio_exit(sio
->addr
);
386 * Platform device and driver.
389 static int f7188x_gpio_probe(struct platform_device
*pdev
)
393 struct f7188x_sio
*sio
= dev_get_platdata(&pdev
->dev
);
394 struct f7188x_gpio_data
*data
;
396 data
= devm_kzalloc(&pdev
->dev
, sizeof(*data
), GFP_KERNEL
);
402 data
->nr_bank
= ARRAY_SIZE(f71869_gpio_bank
);
403 data
->bank
= f71869_gpio_bank
;
406 data
->nr_bank
= ARRAY_SIZE(f71869a_gpio_bank
);
407 data
->bank
= f71869a_gpio_bank
;
410 data
->nr_bank
= ARRAY_SIZE(f71882_gpio_bank
);
411 data
->bank
= f71882_gpio_bank
;
414 data
->nr_bank
= ARRAY_SIZE(f71889a_gpio_bank
);
415 data
->bank
= f71889a_gpio_bank
;
418 data
->nr_bank
= ARRAY_SIZE(f71889_gpio_bank
);
419 data
->bank
= f71889_gpio_bank
;
422 data
->nr_bank
= ARRAY_SIZE(f81866_gpio_bank
);
423 data
->bank
= f81866_gpio_bank
;
426 data
->nr_bank
= ARRAY_SIZE(f81804_gpio_bank
);
427 data
->bank
= f81804_gpio_bank
;
434 platform_set_drvdata(pdev
, data
);
436 /* For each GPIO bank, register a GPIO chip. */
437 for (i
= 0; i
< data
->nr_bank
; i
++) {
438 struct f7188x_gpio_bank
*bank
= &data
->bank
[i
];
440 bank
->chip
.parent
= &pdev
->dev
;
443 err
= devm_gpiochip_add_data(&pdev
->dev
, &bank
->chip
, bank
);
446 "Failed to register gpiochip %d: %d\n",
455 static int __init
f7188x_find(int addr
, struct f7188x_sio
*sio
)
460 err
= superio_enter(addr
);
465 devid
= superio_inw(addr
, SIO_MANID
);
466 if (devid
!= SIO_FINTEK_ID
) {
467 pr_debug(DRVNAME
": Not a Fintek device at 0x%08x\n", addr
);
471 devid
= superio_inw(addr
, SIO_DEVID
);
480 sio
->type
= f71882fg
;
495 pr_info(DRVNAME
": Unsupported Fintek device 0x%04x\n", devid
);
501 pr_info(DRVNAME
": Found %s at %#x, revision %d\n",
502 f7188x_names
[sio
->type
],
504 (int) superio_inb(addr
, SIO_DEVREV
));
511 static struct platform_device
*f7188x_gpio_pdev
;
514 f7188x_gpio_device_add(const struct f7188x_sio
*sio
)
518 f7188x_gpio_pdev
= platform_device_alloc(DRVNAME
, -1);
519 if (!f7188x_gpio_pdev
)
522 err
= platform_device_add_data(f7188x_gpio_pdev
,
525 pr_err(DRVNAME
"Platform data allocation failed\n");
529 err
= platform_device_add(f7188x_gpio_pdev
);
531 pr_err(DRVNAME
"Device addition failed\n");
538 platform_device_put(f7188x_gpio_pdev
);
544 * Try to match a supported Fintek device by reading the (hard-wired)
545 * configuration I/O ports. If available, then register both the platform
546 * device and driver to support the GPIOs.
549 static struct platform_driver f7188x_gpio_driver
= {
553 .probe
= f7188x_gpio_probe
,
556 static int __init
f7188x_gpio_init(void)
559 struct f7188x_sio sio
;
561 if (f7188x_find(0x2e, &sio
) &&
562 f7188x_find(0x4e, &sio
))
565 err
= platform_driver_register(&f7188x_gpio_driver
);
567 err
= f7188x_gpio_device_add(&sio
);
569 platform_driver_unregister(&f7188x_gpio_driver
);
574 subsys_initcall(f7188x_gpio_init
);
576 static void __exit
f7188x_gpio_exit(void)
578 platform_device_unregister(f7188x_gpio_pdev
);
579 platform_driver_unregister(&f7188x_gpio_driver
);
581 module_exit(f7188x_gpio_exit
);
583 MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889A, F71889F and F81866");
584 MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
585 MODULE_LICENSE("GPL");