drivers/gpio/gpio-htc-egpio.c

   1 /*
   2  * Support for the GPIO/IRQ expander chips present on several HTC phones.
   3  * These are implemented in CPLD chips present on the board.
   4  *
   5  * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
   6  * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
   7  *
   8  * This file may be distributed under the terms of the GNU GPL license.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/errno.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/irq.h>
  15 #include <linux/io.h>
  16 #include <linux/spinlock.h>
  17 #include <linux/platform_data/gpio-htc-egpio.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20 #include <linux/init.h>
  21
  22 struct egpio_chip {
  23         int              reg_start;
  24         int              cached_values;
  25         unsigned long    is_out;
  26         struct device    *dev;
  27         struct gpio_chip chip;
  28 };
  29
  30 struct egpio_info {
  31         spinlock_t        lock;
  32
  33         /* iomem info */
  34         void __iomem      *base_addr;
  35         int               bus_shift;    /* byte shift */
  36         int               reg_shift;    /* bit shift */
  37         int               reg_mask;
  38
  39         /* irq info */
  40         int               ack_register;
  41         int               ack_write;
  42         u16               irqs_enabled;
  43         uint              irq_start;
  44         int               nirqs;
  45         uint              chained_irq;
  46
  47         /* egpio info */
  48         struct egpio_chip *chip;
  49         int               nchips;
  50 };
  51
  52 static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
  53 {
  54         writew(value, ei->base_addr + (reg << ei->bus_shift));
  55 }
  56
  57 static inline u16 egpio_readw(struct egpio_info *ei, int reg)
  58 {
  59         return readw(ei->base_addr + (reg << ei->bus_shift));
  60 }
  61
  62 /*
  63  * IRQs
  64  */
  65
  66 static inline void ack_irqs(struct egpio_info *ei)
  67 {
  68         egpio_writew(ei->ack_write, ei, ei->ack_register);
  69         pr_debug("EGPIO ack - write %x to base+%x\n",
  70                         ei->ack_write, ei->ack_register << ei->bus_shift);
  71 }
  72
  73 static void egpio_ack(struct irq_data *data)
  74 {
  75 }
  76
  77 /* There does not appear to be a way to proactively mask interrupts
  78  * on the egpio chip itself.  So, we simply ignore interrupts that
  79  * aren't desired. */
  80 static void egpio_mask(struct irq_data *data)
  81 {
  82         struct egpio_info *ei = irq_data_get_irq_chip_data(data);
  83         ei->irqs_enabled &= ~(1 << (data->irq - ei->irq_start));
  84         pr_debug("EGPIO mask %d %04x\n", data->irq, ei->irqs_enabled);
  85 }
  86
  87 static void egpio_unmask(struct irq_data *data)
  88 {
  89         struct egpio_info *ei = irq_data_get_irq_chip_data(data);
  90         ei->irqs_enabled |= 1 << (data->irq - ei->irq_start);
  91         pr_debug("EGPIO unmask %d %04x\n", data->irq, ei->irqs_enabled);
  92 }
  93
  94 static struct irq_chip egpio_muxed_chip = {
  95         .name           = "htc-egpio",
  96         .irq_ack        = egpio_ack,
  97         .irq_mask       = egpio_mask,
  98         .irq_unmask     = egpio_unmask,
  99 };
 100
 101 static void egpio_handler(struct irq_desc *desc)
 102 {
 103         struct egpio_info *ei = irq_desc_get_handler_data(desc);
 104         int irqpin;
 105
 106         /* Read current pins. */
 107         unsigned long readval = egpio_readw(ei, ei->ack_register);
 108         pr_debug("IRQ reg: %x\n", (unsigned int)readval);
 109         /* Ack/unmask interrupts. */
 110         ack_irqs(ei);
 111         /* Process all set pins. */
 112         readval &= ei->irqs_enabled;
 113         for_each_set_bit(irqpin, &readval, ei->nirqs) {
 114                 /* Run irq handler */
 115                 pr_debug("got IRQ %d\n", irqpin);
 116                 generic_handle_irq(ei->irq_start + irqpin);
 117         }
 118 }
 119
 120 int htc_egpio_get_wakeup_irq(struct device *dev)
 121 {
 122         struct egpio_info *ei = dev_get_drvdata(dev);
 123
 124         /* Read current pins. */
 125         u16 readval = egpio_readw(ei, ei->ack_register);
 126         /* Ack/unmask interrupts. */
 127         ack_irqs(ei);
 128         /* Return first set pin. */
 129         readval &= ei->irqs_enabled;
 130         return ei->irq_start + ffs(readval) - 1;
 131 }
 132 EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
 133
 134 static inline int egpio_pos(struct egpio_info *ei, int bit)
 135 {
 136         return bit >> ei->reg_shift;
 137 }
 138
 139 static inline int egpio_bit(struct egpio_info *ei, int bit)
 140 {
 141         return 1 << (bit & ((1 << ei->reg_shift)-1));
 142 }
 143
 144 /*
 145  * Input pins
 146  */
 147
 148 static int egpio_get(struct gpio_chip *chip, unsigned offset)
 149 {
 150         struct egpio_chip *egpio;
 151         struct egpio_info *ei;
 152         unsigned           bit;
 153         int                reg;
 154         int                value;
 155
 156         pr_debug("egpio_get_value(%d)\n", chip->base + offset);
 157
 158         egpio = gpiochip_get_data(chip);
 159         ei    = dev_get_drvdata(egpio->dev);
 160         bit   = egpio_bit(ei, offset);
 161         reg   = egpio->reg_start + egpio_pos(ei, offset);
 162
 163         value = egpio_readw(ei, reg);
 164         pr_debug("readw(%p + %x) = %x\n",
 165                         ei->base_addr, reg << ei->bus_shift, value);
 166         return !!(value & bit);
 167 }
 168
 169 static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
 170 {
 171         struct egpio_chip *egpio;
 172
 173         egpio = gpiochip_get_data(chip);
 174         return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
 175 }
 176
 177
 178 /*
 179  * Output pins
 180  */
 181
 182 static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
 183 {
 184         unsigned long     flag;
 185         struct egpio_chip *egpio;
 186         struct egpio_info *ei;
 187         unsigned          bit;
 188         int               pos;
 189         int               reg;
 190         int               shift;
 191
 192         pr_debug("egpio_set(%s, %d(%d), %d)\n",
 193                         chip->label, offset, offset+chip->base, value);
 194
 195         egpio = gpiochip_get_data(chip);
 196         ei    = dev_get_drvdata(egpio->dev);
 197         bit   = egpio_bit(ei, offset);
 198         pos   = egpio_pos(ei, offset);
 199         reg   = egpio->reg_start + pos;
 200         shift = pos << ei->reg_shift;
 201
 202         pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
 203                         reg, (egpio->cached_values >> shift) & ei->reg_mask);
 204
 205         spin_lock_irqsave(&ei->lock, flag);
 206         if (value)
 207                 egpio->cached_values |= (1 << offset);
 208         else
 209                 egpio->cached_values &= ~(1 << offset);
 210         egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
 211         spin_unlock_irqrestore(&ei->lock, flag);
 212 }
 213
 214 static int egpio_direction_output(struct gpio_chip *chip,
 215                                         unsigned offset, int value)
 216 {
 217         struct egpio_chip *egpio;
 218
 219         egpio = gpiochip_get_data(chip);
 220         if (test_bit(offset, &egpio->is_out)) {
 221                 egpio_set(chip, offset, value);
 222                 return 0;
 223         } else {
 224                 return -EINVAL;
 225         }
 226 }
 227
 228 static int egpio_get_direction(struct gpio_chip *chip, unsigned offset)
 229 {
 230         struct egpio_chip *egpio;
 231
 232         egpio = gpiochip_get_data(chip);
 233
 234         return !test_bit(offset, &egpio->is_out);
 235 }
 236
 237 static void egpio_write_cache(struct egpio_info *ei)
 238 {
 239         int               i;
 240         struct egpio_chip *egpio;
 241         int               shift;
 242
 243         for (i = 0; i < ei->nchips; i++) {
 244                 egpio = &(ei->chip[i]);
 245                 if (!egpio->is_out)
 246                         continue;
 247
 248                 for (shift = 0; shift < egpio->chip.ngpio;
 249                                 shift += (1<<ei->reg_shift)) {
 250
 251                         int reg = egpio->reg_start + egpio_pos(ei, shift);
 252
 253                         if (!((egpio->is_out >> shift) & ei->reg_mask))
 254                                 continue;
 255
 256                         pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
 257                                 (egpio->cached_values >> shift) & ei->reg_mask,
 258                                 egpio_readw(ei, reg));
 259
 260                         egpio_writew((egpio->cached_values >> shift)
 261                                         & ei->reg_mask, ei, reg);
 262                 }
 263         }
 264 }
 265
 266
 267 /*
 268  * Setup
 269  */
 270
 271 static int __init egpio_probe(struct platform_device *pdev)
 272 {
 273         struct htc_egpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
 274         struct resource   *res;
 275         struct egpio_info *ei;
 276         struct gpio_chip  *chip;
 277         unsigned int      irq, irq_end;
 278         int               i;
 279         int               ret;
 280
 281         /* Initialize ei data structure. */
 282         ei = devm_kzalloc(&pdev->dev, sizeof(*ei), GFP_KERNEL);
 283         if (!ei)
 284                 return -ENOMEM;
 285
 286         spin_lock_init(&ei->lock);
 287
 288         /* Find chained irq */
 289         ret = -EINVAL;
 290         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 291         if (res)
 292                 ei->chained_irq = res->start;
 293
 294         /* Map egpio chip into virtual address space. */
 295         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 296         if (!res)
 297                 goto fail;
 298         ei->base_addr = devm_ioremap_nocache(&pdev->dev, res->start,
 299                                              resource_size(res));
 300         if (!ei->base_addr)
 301                 goto fail;
 302         pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
 303
 304         if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
 305                 goto fail;
 306         ei->bus_shift = fls(pdata->bus_width - 1) - 3;
 307         pr_debug("bus_shift = %d\n", ei->bus_shift);
 308
 309         if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
 310                 goto fail;
 311         ei->reg_shift = fls(pdata->reg_width - 1);
 312         pr_debug("reg_shift = %d\n", ei->reg_shift);
 313
 314         ei->reg_mask = (1 << pdata->reg_width) - 1;
 315
 316         platform_set_drvdata(pdev, ei);
 317
 318         ei->nchips = pdata->num_chips;
 319         ei->chip = devm_kzalloc(&pdev->dev,
 320                                 sizeof(struct egpio_chip) * ei->nchips,
 321                                 GFP_KERNEL);
 322         if (!ei->chip) {
 323                 ret = -ENOMEM;
 324                 goto fail;
 325         }
 326         for (i = 0; i < ei->nchips; i++) {
 327                 ei->chip[i].reg_start = pdata->chip[i].reg_start;
 328                 ei->chip[i].cached_values = pdata->chip[i].initial_values;
 329                 ei->chip[i].is_out = pdata->chip[i].direction;
 330                 ei->chip[i].dev = &(pdev->dev);
 331                 chip = &(ei->chip[i].chip);
 332                 chip->label           = "htc-egpio";
 333                 chip->parent          = &pdev->dev;
 334                 chip->owner           = THIS_MODULE;
 335                 chip->get             = egpio_get;
 336                 chip->set             = egpio_set;
 337                 chip->direction_input = egpio_direction_input;
 338                 chip->direction_output = egpio_direction_output;
 339                 chip->get_direction   = egpio_get_direction;
 340                 chip->base            = pdata->chip[i].gpio_base;
 341                 chip->ngpio           = pdata->chip[i].num_gpios;
 342
 343                 gpiochip_add_data(chip, &ei->chip[i]);
 344         }
 345
 346         /* Set initial pin values */
 347         egpio_write_cache(ei);
 348
 349         ei->irq_start = pdata->irq_base;
 350         ei->nirqs = pdata->num_irqs;
 351         ei->ack_register = pdata->ack_register;
 352
 353         if (ei->chained_irq) {
 354                 /* Setup irq handlers */
 355                 ei->ack_write = 0xFFFF;
 356                 if (pdata->invert_acks)
 357                         ei->ack_write = 0;
 358                 irq_end = ei->irq_start + ei->nirqs;
 359                 for (irq = ei->irq_start; irq < irq_end; irq++) {
 360                         irq_set_chip_and_handler(irq, &egpio_muxed_chip,
 361                                                  handle_simple_irq);
 362                         irq_set_chip_data(irq, ei);
 363                         irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
 364                 }
 365                 irq_set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
 366                 irq_set_chained_handler_and_data(ei->chained_irq,
 367                                                  egpio_handler, ei);
 368                 ack_irqs(ei);
 369
 370                 device_init_wakeup(&pdev->dev, 1);
 371         }
 372
 373         return 0;
 374
 375 fail:
 376         printk(KERN_ERR "EGPIO failed to setup\n");
 377         return ret;
 378 }
 379
 380 #ifdef CONFIG_PM
 381 static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
 382 {
 383         struct egpio_info *ei = platform_get_drvdata(pdev);
 384
 385         if (ei->chained_irq && device_may_wakeup(&pdev->dev))
 386                 enable_irq_wake(ei->chained_irq);
 387         return 0;
 388 }
 389
 390 static int egpio_resume(struct platform_device *pdev)
 391 {
 392         struct egpio_info *ei = platform_get_drvdata(pdev);
 393
 394         if (ei->chained_irq && device_may_wakeup(&pdev->dev))
 395                 disable_irq_wake(ei->chained_irq);
 396
 397         /* Update registers from the cache, in case
 398            the CPLD was powered off during suspend */
 399         egpio_write_cache(ei);
 400         return 0;
 401 }
 402 #else
 403 #define egpio_suspend NULL
 404 #define egpio_resume NULL
 405 #endif
 406
 407
 408 static struct platform_driver egpio_driver = {
 409         .driver = {
 410                 .name = "htc-egpio",
 411                 .suppress_bind_attrs = true,
 412         },
 413         .suspend      = egpio_suspend,
 414         .resume       = egpio_resume,
 415 };
 416
 417 static int __init egpio_init(void)
 418 {
 419         return platform_driver_probe(&egpio_driver, egpio_probe);
 420 }
 421 /* start early for dependencies */
 422 subsys_initcall(egpio_init);