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1 /*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/interrupt.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/slab.h>
22 #include <asm/unaligned.h>
23 #include <linux/of_platform.h>
24 #include <linux/acpi.h>
25 #include <linux/regulator/consumer.h>
26
27 #define PCA953X_INPUT 0
28 #define PCA953X_OUTPUT 1
29 #define PCA953X_INVERT 2
30 #define PCA953X_DIRECTION 3
31
32 #define REG_ADDR_AI 0x80
33
34 #define PCA957X_IN 0
35 #define PCA957X_INVRT 1
36 #define PCA957X_BKEN 2
37 #define PCA957X_PUPD 3
38 #define PCA957X_CFG 4
39 #define PCA957X_OUT 5
40 #define PCA957X_MSK 6
41 #define PCA957X_INTS 7
42
43 #define PCAL953X_IN_LATCH 34
44 #define PCAL953X_INT_MASK 37
45 #define PCAL953X_INT_STAT 38
46
47 #define PCA_GPIO_MASK 0x00FF
48 #define PCA_INT 0x0100
49 #define PCA_PCAL 0x0200
50 #define PCA953X_TYPE 0x1000
51 #define PCA957X_TYPE 0x2000
52 #define PCA_TYPE_MASK 0xF000
53
54 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
55
56 static const struct i2c_device_id pca953x_id[] = {
57 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
58 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
59 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
60 { "pca9536", 4 | PCA953X_TYPE, },
61 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
62 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
63 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
64 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
65 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
66 { "pca9556", 8 | PCA953X_TYPE, },
67 { "pca9557", 8 | PCA953X_TYPE, },
68 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
69 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
70 { "pca9698", 40 | PCA953X_TYPE, },
71
72 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
73
74 { "max7310", 8 | PCA953X_TYPE, },
75 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
76 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
77 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
78 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
79 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
80 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
81 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
82 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
83 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
84 { "xra1202", 8 | PCA953X_TYPE },
85 { }
86 };
87 MODULE_DEVICE_TABLE(i2c, pca953x_id);
88
89 static const struct acpi_device_id pca953x_acpi_ids[] = {
90 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
91 { }
92 };
93 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
94
95 #define MAX_BANK 5
96 #define BANK_SZ 8
97
98 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
99
100 struct pca953x_reg_config {
101 int direction;
102 int output;
103 int input;
104 };
105
106 static const struct pca953x_reg_config pca953x_regs = {
107 .direction = PCA953X_DIRECTION,
108 .output = PCA953X_OUTPUT,
109 .input = PCA953X_INPUT,
110 };
111
112 static const struct pca953x_reg_config pca957x_regs = {
113 .direction = PCA957X_CFG,
114 .output = PCA957X_OUT,
115 .input = PCA957X_IN,
116 };
117
118 struct pca953x_chip {
119 unsigned gpio_start;
120 u8 reg_output[MAX_BANK];
121 u8 reg_direction[MAX_BANK];
122 struct mutex i2c_lock;
123
124 #ifdef CONFIG_GPIO_PCA953X_IRQ
125 struct mutex irq_lock;
126 u8 irq_mask[MAX_BANK];
127 u8 irq_stat[MAX_BANK];
128 u8 irq_trig_raise[MAX_BANK];
129 u8 irq_trig_fall[MAX_BANK];
130 #endif
131
132 struct i2c_client *client;
133 struct gpio_chip gpio_chip;
134 const char *const *names;
135 unsigned long driver_data;
136 struct regulator *regulator;
137
138 const struct pca953x_reg_config *regs;
139
140 int (*write_regs)(struct pca953x_chip *, int, u8 *);
141 int (*read_regs)(struct pca953x_chip *, int, u8 *);
142 };
143
144 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
145 int off)
146 {
147 int ret;
148 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
149 int offset = off / BANK_SZ;
150
151 ret = i2c_smbus_read_byte_data(chip->client,
152 (reg << bank_shift) + offset);
153 *val = ret;
154
155 if (ret < 0) {
156 dev_err(&chip->client->dev, "failed reading register\n");
157 return ret;
158 }
159
160 return 0;
161 }
162
163 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
164 int off)
165 {
166 int ret;
167 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
168 int offset = off / BANK_SZ;
169
170 ret = i2c_smbus_write_byte_data(chip->client,
171 (reg << bank_shift) + offset, val);
172
173 if (ret < 0) {
174 dev_err(&chip->client->dev, "failed writing register\n");
175 return ret;
176 }
177
178 return 0;
179 }
180
181 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
182 {
183 return i2c_smbus_write_byte_data(chip->client, reg, *val);
184 }
185
186 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
187 {
188 __le16 word = cpu_to_le16(get_unaligned((u16 *)val));
189
190 return i2c_smbus_write_word_data(chip->client,
191 reg << 1, (__force u16)word);
192 }
193
194 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
195 {
196 int ret;
197
198 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
199 if (ret < 0)
200 return ret;
201
202 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
203 }
204
205 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
206 {
207 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
208
209 return i2c_smbus_write_i2c_block_data(chip->client,
210 (reg << bank_shift) | REG_ADDR_AI,
211 NBANK(chip), val);
212 }
213
214 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
215 {
216 int ret = 0;
217
218 ret = chip->write_regs(chip, reg, val);
219 if (ret < 0) {
220 dev_err(&chip->client->dev, "failed writing register\n");
221 return ret;
222 }
223
224 return 0;
225 }
226
227 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
228 {
229 int ret;
230
231 ret = i2c_smbus_read_byte_data(chip->client, reg);
232 *val = ret;
233
234 return ret;
235 }
236
237 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
238 {
239 int ret;
240
241 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
242 val[0] = (u16)ret & 0xFF;
243 val[1] = (u16)ret >> 8;
244
245 return ret;
246 }
247
248 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
249 {
250 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
251
252 return i2c_smbus_read_i2c_block_data(chip->client,
253 (reg << bank_shift) | REG_ADDR_AI,
254 NBANK(chip), val);
255 }
256
257 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
258 {
259 int ret;
260
261 ret = chip->read_regs(chip, reg, val);
262 if (ret < 0) {
263 dev_err(&chip->client->dev, "failed reading register\n");
264 return ret;
265 }
266
267 return 0;
268 }
269
270 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
271 {
272 struct pca953x_chip *chip = gpiochip_get_data(gc);
273 u8 reg_val;
274 int ret;
275
276 mutex_lock(&chip->i2c_lock);
277 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
278
279 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
280 if (ret)
281 goto exit;
282
283 chip->reg_direction[off / BANK_SZ] = reg_val;
284 exit:
285 mutex_unlock(&chip->i2c_lock);
286 return ret;
287 }
288
289 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
290 unsigned off, int val)
291 {
292 struct pca953x_chip *chip = gpiochip_get_data(gc);
293 u8 reg_val;
294 int ret;
295
296 mutex_lock(&chip->i2c_lock);
297 /* set output level */
298 if (val)
299 reg_val = chip->reg_output[off / BANK_SZ]
300 | (1u << (off % BANK_SZ));
301 else
302 reg_val = chip->reg_output[off / BANK_SZ]
303 & ~(1u << (off % BANK_SZ));
304
305 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
306 if (ret)
307 goto exit;
308
309 chip->reg_output[off / BANK_SZ] = reg_val;
310
311 /* then direction */
312 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
313 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
314 if (ret)
315 goto exit;
316
317 chip->reg_direction[off / BANK_SZ] = reg_val;
318 exit:
319 mutex_unlock(&chip->i2c_lock);
320 return ret;
321 }
322
323 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
324 {
325 struct pca953x_chip *chip = gpiochip_get_data(gc);
326 u32 reg_val;
327 int ret;
328
329 mutex_lock(&chip->i2c_lock);
330 ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
331 mutex_unlock(&chip->i2c_lock);
332 if (ret < 0) {
333 /* NOTE: diagnostic already emitted; that's all we should
334 * do unless gpio_*_value_cansleep() calls become different
335 * from their nonsleeping siblings (and report faults).
336 */
337 return 0;
338 }
339
340 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
341 }
342
343 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
344 {
345 struct pca953x_chip *chip = gpiochip_get_data(gc);
346 u8 reg_val;
347 int ret;
348
349 mutex_lock(&chip->i2c_lock);
350 if (val)
351 reg_val = chip->reg_output[off / BANK_SZ]
352 | (1u << (off % BANK_SZ));
353 else
354 reg_val = chip->reg_output[off / BANK_SZ]
355 & ~(1u << (off % BANK_SZ));
356
357 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
358 if (ret)
359 goto exit;
360
361 chip->reg_output[off / BANK_SZ] = reg_val;
362 exit:
363 mutex_unlock(&chip->i2c_lock);
364 }
365
366 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
367 unsigned long *mask, unsigned long *bits)
368 {
369 struct pca953x_chip *chip = gpiochip_get_data(gc);
370 unsigned int bank_mask, bank_val;
371 int bank_shift, bank;
372 u8 reg_val[MAX_BANK];
373 int ret;
374
375 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
376
377 mutex_lock(&chip->i2c_lock);
378 memcpy(reg_val, chip->reg_output, NBANK(chip));
379 for (bank = 0; bank < NBANK(chip); bank++) {
380 bank_mask = mask[bank / sizeof(*mask)] >>
381 ((bank % sizeof(*mask)) * 8);
382 if (bank_mask) {
383 bank_val = bits[bank / sizeof(*bits)] >>
384 ((bank % sizeof(*bits)) * 8);
385 bank_val &= bank_mask;
386 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
387 }
388 }
389
390 ret = i2c_smbus_write_i2c_block_data(chip->client,
391 chip->regs->output << bank_shift,
392 NBANK(chip), reg_val);
393 if (ret)
394 goto exit;
395
396 memcpy(chip->reg_output, reg_val, NBANK(chip));
397 exit:
398 mutex_unlock(&chip->i2c_lock);
399 }
400
401 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
402 {
403 struct gpio_chip *gc;
404
405 gc = &chip->gpio_chip;
406
407 gc->direction_input = pca953x_gpio_direction_input;
408 gc->direction_output = pca953x_gpio_direction_output;
409 gc->get = pca953x_gpio_get_value;
410 gc->set = pca953x_gpio_set_value;
411 gc->set_multiple = pca953x_gpio_set_multiple;
412 gc->can_sleep = true;
413
414 gc->base = chip->gpio_start;
415 gc->ngpio = gpios;
416 gc->label = chip->client->name;
417 gc->parent = &chip->client->dev;
418 gc->owner = THIS_MODULE;
419 gc->names = chip->names;
420 }
421
422 #ifdef CONFIG_GPIO_PCA953X_IRQ
423 static void pca953x_irq_mask(struct irq_data *d)
424 {
425 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
426 struct pca953x_chip *chip = gpiochip_get_data(gc);
427
428 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
429 }
430
431 static void pca953x_irq_unmask(struct irq_data *d)
432 {
433 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
434 struct pca953x_chip *chip = gpiochip_get_data(gc);
435
436 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
437 }
438
439 static void pca953x_irq_bus_lock(struct irq_data *d)
440 {
441 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
442 struct pca953x_chip *chip = gpiochip_get_data(gc);
443
444 mutex_lock(&chip->irq_lock);
445 }
446
447 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
448 {
449 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
450 struct pca953x_chip *chip = gpiochip_get_data(gc);
451 u8 new_irqs;
452 int level, i;
453 u8 invert_irq_mask[MAX_BANK];
454
455 if (chip->driver_data & PCA_PCAL) {
456 /* Enable latch on interrupt-enabled inputs */
457 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
458
459 for (i = 0; i < NBANK(chip); i++)
460 invert_irq_mask[i] = ~chip->irq_mask[i];
461
462 /* Unmask enabled interrupts */
463 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
464 }
465
466 /* Look for any newly setup interrupt */
467 for (i = 0; i < NBANK(chip); i++) {
468 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
469 new_irqs &= ~chip->reg_direction[i];
470
471 while (new_irqs) {
472 level = __ffs(new_irqs);
473 pca953x_gpio_direction_input(&chip->gpio_chip,
474 level + (BANK_SZ * i));
475 new_irqs &= ~(1 << level);
476 }
477 }
478
479 mutex_unlock(&chip->irq_lock);
480 }
481
482 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
483 {
484 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
485 struct pca953x_chip *chip = gpiochip_get_data(gc);
486 int bank_nb = d->hwirq / BANK_SZ;
487 u8 mask = 1 << (d->hwirq % BANK_SZ);
488
489 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
490 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
491 d->irq, type);
492 return -EINVAL;
493 }
494
495 if (type & IRQ_TYPE_EDGE_FALLING)
496 chip->irq_trig_fall[bank_nb] |= mask;
497 else
498 chip->irq_trig_fall[bank_nb] &= ~mask;
499
500 if (type & IRQ_TYPE_EDGE_RISING)
501 chip->irq_trig_raise[bank_nb] |= mask;
502 else
503 chip->irq_trig_raise[bank_nb] &= ~mask;
504
505 return 0;
506 }
507
508 static struct irq_chip pca953x_irq_chip = {
509 .name = "pca953x",
510 .irq_mask = pca953x_irq_mask,
511 .irq_unmask = pca953x_irq_unmask,
512 .irq_bus_lock = pca953x_irq_bus_lock,
513 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
514 .irq_set_type = pca953x_irq_set_type,
515 };
516
517 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
518 {
519 u8 cur_stat[MAX_BANK];
520 u8 old_stat[MAX_BANK];
521 bool pending_seen = false;
522 bool trigger_seen = false;
523 u8 trigger[MAX_BANK];
524 int ret, i;
525
526 if (chip->driver_data & PCA_PCAL) {
527 /* Read the current interrupt status from the device */
528 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
529 if (ret)
530 return false;
531
532 /* Check latched inputs and clear interrupt status */
533 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
534 if (ret)
535 return false;
536
537 for (i = 0; i < NBANK(chip); i++) {
538 /* Apply filter for rising/falling edge selection */
539 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
540 (cur_stat[i] & chip->irq_trig_raise[i]);
541 pending[i] &= trigger[i];
542 if (pending[i])
543 pending_seen = true;
544 }
545
546 return pending_seen;
547 }
548
549 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
550 if (ret)
551 return false;
552
553 /* Remove output pins from the equation */
554 for (i = 0; i < NBANK(chip); i++)
555 cur_stat[i] &= chip->reg_direction[i];
556
557 memcpy(old_stat, chip->irq_stat, NBANK(chip));
558
559 for (i = 0; i < NBANK(chip); i++) {
560 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
561 if (trigger[i])
562 trigger_seen = true;
563 }
564
565 if (!trigger_seen)
566 return false;
567
568 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
569
570 for (i = 0; i < NBANK(chip); i++) {
571 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
572 (cur_stat[i] & chip->irq_trig_raise[i]);
573 pending[i] &= trigger[i];
574 if (pending[i])
575 pending_seen = true;
576 }
577
578 return pending_seen;
579 }
580
581 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
582 {
583 struct pca953x_chip *chip = devid;
584 u8 pending[MAX_BANK];
585 u8 level;
586 unsigned nhandled = 0;
587 int i;
588
589 if (!pca953x_irq_pending(chip, pending))
590 return IRQ_NONE;
591
592 for (i = 0; i < NBANK(chip); i++) {
593 while (pending[i]) {
594 level = __ffs(pending[i]);
595 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
596 level + (BANK_SZ * i)));
597 pending[i] &= ~(1 << level);
598 nhandled++;
599 }
600 }
601
602 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
603 }
604
605 static int pca953x_irq_setup(struct pca953x_chip *chip,
606 int irq_base)
607 {
608 struct i2c_client *client = chip->client;
609 int ret, i;
610
611 if (client->irq && irq_base != -1
612 && (chip->driver_data & PCA_INT)) {
613 ret = pca953x_read_regs(chip,
614 chip->regs->input, chip->irq_stat);
615 if (ret)
616 return ret;
617
618 /*
619 * There is no way to know which GPIO line generated the
620 * interrupt. We have to rely on the previous read for
621 * this purpose.
622 */
623 for (i = 0; i < NBANK(chip); i++)
624 chip->irq_stat[i] &= chip->reg_direction[i];
625 mutex_init(&chip->irq_lock);
626
627 ret = devm_request_threaded_irq(&client->dev,
628 client->irq,
629 NULL,
630 pca953x_irq_handler,
631 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
632 IRQF_SHARED,
633 dev_name(&client->dev), chip);
634 if (ret) {
635 dev_err(&client->dev, "failed to request irq %d\n",
636 client->irq);
637 return ret;
638 }
639
640 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
641 &pca953x_irq_chip,
642 irq_base,
643 handle_simple_irq,
644 IRQ_TYPE_NONE);
645 if (ret) {
646 dev_err(&client->dev,
647 "could not connect irqchip to gpiochip\n");
648 return ret;
649 }
650
651 gpiochip_set_nested_irqchip(&chip->gpio_chip,
652 &pca953x_irq_chip,
653 client->irq);
654 }
655
656 return 0;
657 }
658
659 #else /* CONFIG_GPIO_PCA953X_IRQ */
660 static int pca953x_irq_setup(struct pca953x_chip *chip,
661 int irq_base)
662 {
663 struct i2c_client *client = chip->client;
664
665 if (irq_base != -1 && (chip->driver_data & PCA_INT))
666 dev_warn(&client->dev, "interrupt support not compiled in\n");
667
668 return 0;
669 }
670 #endif
671
672 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
673 {
674 int ret;
675 u8 val[MAX_BANK];
676
677 chip->regs = &pca953x_regs;
678
679 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
680 if (ret)
681 goto out;
682
683 ret = pca953x_read_regs(chip, chip->regs->direction,
684 chip->reg_direction);
685 if (ret)
686 goto out;
687
688 /* set platform specific polarity inversion */
689 if (invert)
690 memset(val, 0xFF, NBANK(chip));
691 else
692 memset(val, 0, NBANK(chip));
693
694 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
695 out:
696 return ret;
697 }
698
699 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
700 {
701 int ret;
702 u8 val[MAX_BANK];
703
704 chip->regs = &pca957x_regs;
705
706 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
707 if (ret)
708 goto out;
709 ret = pca953x_read_regs(chip, chip->regs->direction,
710 chip->reg_direction);
711 if (ret)
712 goto out;
713
714 /* set platform specific polarity inversion */
715 if (invert)
716 memset(val, 0xFF, NBANK(chip));
717 else
718 memset(val, 0, NBANK(chip));
719 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
720 if (ret)
721 goto out;
722
723 /* To enable register 6, 7 to control pull up and pull down */
724 memset(val, 0x02, NBANK(chip));
725 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
726 if (ret)
727 goto out;
728
729 return 0;
730 out:
731 return ret;
732 }
733
734 static const struct of_device_id pca953x_dt_ids[];
735
736 static int pca953x_probe(struct i2c_client *client,
737 const struct i2c_device_id *i2c_id)
738 {
739 struct pca953x_platform_data *pdata;
740 struct pca953x_chip *chip;
741 int irq_base = 0;
742 int ret;
743 u32 invert = 0;
744 struct regulator *reg;
745
746 chip = devm_kzalloc(&client->dev,
747 sizeof(struct pca953x_chip), GFP_KERNEL);
748 if (chip == NULL)
749 return -ENOMEM;
750
751 pdata = dev_get_platdata(&client->dev);
752 if (pdata) {
753 irq_base = pdata->irq_base;
754 chip->gpio_start = pdata->gpio_base;
755 invert = pdata->invert;
756 chip->names = pdata->names;
757 } else {
758 struct gpio_desc *reset_gpio;
759
760 chip->gpio_start = -1;
761 irq_base = 0;
762
763 /* See if we need to de-assert a reset pin */
764 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
765 GPIOD_OUT_LOW);
766 if (IS_ERR(reset_gpio))
767 return PTR_ERR(reset_gpio);
768 }
769
770 chip->client = client;
771
772 reg = devm_regulator_get(&client->dev, "vcc");
773 if (IS_ERR(reg)) {
774 ret = PTR_ERR(reg);
775 if (ret != -EPROBE_DEFER)
776 dev_err(&client->dev, "reg get err: %d\n", ret);
777 return ret;
778 }
779 ret = regulator_enable(reg);
780 if (ret) {
781 dev_err(&client->dev, "reg en err: %d\n", ret);
782 return ret;
783 }
784 chip->regulator = reg;
785
786 if (i2c_id) {
787 chip->driver_data = i2c_id->driver_data;
788 } else {
789 const struct acpi_device_id *acpi_id;
790 const struct of_device_id *match;
791
792 match = of_match_device(pca953x_dt_ids, &client->dev);
793 if (match) {
794 chip->driver_data = (int)(uintptr_t)match->data;
795 } else {
796 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev);
797 if (!acpi_id) {
798 ret = -ENODEV;
799 goto err_exit;
800 }
801
802 chip->driver_data = acpi_id->driver_data;
803 }
804 }
805
806 mutex_init(&chip->i2c_lock);
807 /*
808 * In case we have an i2c-mux controlled by a GPIO provided by an
809 * expander using the same driver higher on the device tree, read the
810 * i2c adapter nesting depth and use the retrieved value as lockdep
811 * subclass for chip->i2c_lock.
812 *
813 * REVISIT: This solution is not complete. It protects us from lockdep
814 * false positives when the expander controlling the i2c-mux is on
815 * a different level on the device tree, but not when it's on the same
816 * level on a different branch (in which case the subclass number
817 * would be the same).
818 *
819 * TODO: Once a correct solution is developed, a similar fix should be
820 * applied to all other i2c-controlled GPIO expanders (and potentially
821 * regmap-i2c).
822 */
823 lockdep_set_subclass(&chip->i2c_lock,
824 i2c_adapter_depth(client->adapter));
825
826 /* initialize cached registers from their original values.
827 * we can't share this chip with another i2c master.
828 */
829 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
830
831 if (chip->gpio_chip.ngpio <= 8) {
832 chip->write_regs = pca953x_write_regs_8;
833 chip->read_regs = pca953x_read_regs_8;
834 } else if (chip->gpio_chip.ngpio >= 24) {
835 chip->write_regs = pca953x_write_regs_24;
836 chip->read_regs = pca953x_read_regs_24;
837 } else {
838 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
839 chip->write_regs = pca953x_write_regs_16;
840 else
841 chip->write_regs = pca957x_write_regs_16;
842 chip->read_regs = pca953x_read_regs_16;
843 }
844
845 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
846 ret = device_pca953x_init(chip, invert);
847 else
848 ret = device_pca957x_init(chip, invert);
849 if (ret)
850 goto err_exit;
851
852 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
853 if (ret)
854 goto err_exit;
855
856 ret = pca953x_irq_setup(chip, irq_base);
857 if (ret)
858 goto err_exit;
859
860 if (pdata && pdata->setup) {
861 ret = pdata->setup(client, chip->gpio_chip.base,
862 chip->gpio_chip.ngpio, pdata->context);
863 if (ret < 0)
864 dev_warn(&client->dev, "setup failed, %d\n", ret);
865 }
866
867 i2c_set_clientdata(client, chip);
868 return 0;
869
870 err_exit:
871 regulator_disable(chip->regulator);
872 return ret;
873 }
874
875 static int pca953x_remove(struct i2c_client *client)
876 {
877 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
878 struct pca953x_chip *chip = i2c_get_clientdata(client);
879 int ret;
880
881 if (pdata && pdata->teardown) {
882 ret = pdata->teardown(client, chip->gpio_chip.base,
883 chip->gpio_chip.ngpio, pdata->context);
884 if (ret < 0)
885 dev_err(&client->dev, "%s failed, %d\n",
886 "teardown", ret);
887 } else {
888 ret = 0;
889 }
890
891 regulator_disable(chip->regulator);
892
893 return ret;
894 }
895
896 /* convenience to stop overlong match-table lines */
897 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
898 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
899
900 static const struct of_device_id pca953x_dt_ids[] = {
901 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
902 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
903 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
904 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
905 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
906 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
907 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
908 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
909 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
910 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
911 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
912 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
913 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
914 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
915
916 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
917 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
918 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
919 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
920 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
921
922 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
923 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
924 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
925 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
926 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
927
928 { .compatible = "onsemi,pca9654", .data = OF_953X( 8, PCA_INT), },
929
930 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
931 { }
932 };
933
934 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
935
936 static struct i2c_driver pca953x_driver = {
937 .driver = {
938 .name = "pca953x",
939 .of_match_table = pca953x_dt_ids,
940 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
941 },
942 .probe = pca953x_probe,
943 .remove = pca953x_remove,
944 .id_table = pca953x_id,
945 };
946
947 static int __init pca953x_init(void)
948 {
949 return i2c_add_driver(&pca953x_driver);
950 }
951 /* register after i2c postcore initcall and before
952 * subsys initcalls that may rely on these GPIOs
953 */
954 subsys_initcall(pca953x_init);
955
956 static void __exit pca953x_exit(void)
957 {
958 i2c_del_driver(&pca953x_driver);
959 }
960 module_exit(pca953x_exit);
961
962 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
963 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
964 MODULE_LICENSE("GPL");