2 * GPIO interface for Intel Poulsbo SCH
4 * Copyright (c) 2010 CompuLab Ltd
5 * Author: Denis Turischev <denis@compulab.co.il>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License 2 as published
9 * by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
25 #include <linux/errno.h>
26 #include <linux/acpi.h>
27 #include <linux/platform_device.h>
28 #include <linux/pci_ids.h>
30 #include <linux/gpio.h>
37 struct gpio_chip chip
;
39 unsigned short iobase
;
40 unsigned short core_base
;
41 unsigned short resume_base
;
44 #define to_sch_gpio(c) container_of(c, struct sch_gpio, chip)
46 static unsigned sch_gpio_offset(struct sch_gpio
*sch
, unsigned gpio
,
51 if (gpio
>= sch
->resume_base
) {
52 gpio
-= sch
->resume_base
;
56 return base
+ reg
+ gpio
/ 8;
59 static unsigned sch_gpio_bit(struct sch_gpio
*sch
, unsigned gpio
)
61 if (gpio
>= sch
->resume_base
)
62 gpio
-= sch
->resume_base
;
66 static void sch_gpio_enable(struct sch_gpio
*sch
, unsigned gpio
)
68 unsigned short offset
, bit
;
71 spin_lock(&sch
->lock
);
73 offset
= sch_gpio_offset(sch
, gpio
, GEN
);
74 bit
= sch_gpio_bit(sch
, gpio
);
76 enable
= inb(sch
->iobase
+ offset
);
77 if (!(enable
& (1 << bit
)))
78 outb(enable
| (1 << bit
), sch
->iobase
+ offset
);
80 spin_unlock(&sch
->lock
);
83 static int sch_gpio_direction_in(struct gpio_chip
*gc
, unsigned gpio_num
)
85 struct sch_gpio
*sch
= to_sch_gpio(gc
);
87 unsigned short offset
, bit
;
89 spin_lock(&sch
->lock
);
91 offset
= sch_gpio_offset(sch
, gpio_num
, GIO
);
92 bit
= sch_gpio_bit(sch
, gpio_num
);
94 curr_dirs
= inb(sch
->iobase
+ offset
);
96 if (!(curr_dirs
& (1 << bit
)))
97 outb(curr_dirs
| (1 << bit
), sch
->iobase
+ offset
);
99 spin_unlock(&sch
->lock
);
103 static int sch_gpio_get(struct gpio_chip
*gc
, unsigned gpio_num
)
105 struct sch_gpio
*sch
= to_sch_gpio(gc
);
107 unsigned short offset
, bit
;
109 offset
= sch_gpio_offset(sch
, gpio_num
, GLV
);
110 bit
= sch_gpio_bit(sch
, gpio_num
);
112 res
= !!(inb(sch
->iobase
+ offset
) & (1 << bit
));
117 static void sch_gpio_set(struct gpio_chip
*gc
, unsigned gpio_num
, int val
)
119 struct sch_gpio
*sch
= to_sch_gpio(gc
);
121 unsigned short offset
, bit
;
123 spin_lock(&sch
->lock
);
125 offset
= sch_gpio_offset(sch
, gpio_num
, GLV
);
126 bit
= sch_gpio_bit(sch
, gpio_num
);
128 curr_vals
= inb(sch
->iobase
+ offset
);
131 outb(curr_vals
| (1 << bit
), sch
->iobase
+ offset
);
133 outb((curr_vals
& ~(1 << bit
)), sch
->iobase
+ offset
);
135 spin_unlock(&sch
->lock
);
138 static int sch_gpio_direction_out(struct gpio_chip
*gc
, unsigned gpio_num
,
141 struct sch_gpio
*sch
= to_sch_gpio(gc
);
143 unsigned short offset
, bit
;
145 spin_lock(&sch
->lock
);
147 offset
= sch_gpio_offset(sch
, gpio_num
, GIO
);
148 bit
= sch_gpio_bit(sch
, gpio_num
);
150 curr_dirs
= inb(sch
->iobase
+ offset
);
151 if (curr_dirs
& (1 << bit
))
152 outb(curr_dirs
& ~(1 << bit
), sch
->iobase
+ offset
);
154 spin_unlock(&sch
->lock
);
157 * according to the datasheet, writing to the level register has no
158 * effect when GPIO is programmed as input.
159 * Actually the the level register is read-only when configured as input.
160 * Thus presetting the output level before switching to output is _NOT_ possible.
161 * Hence we set the level after configuring the GPIO as output.
162 * But we cannot prevent a short low pulse if direction is set to high
163 * and an external pull-up is connected.
165 sch_gpio_set(gc
, gpio_num
, val
);
169 static struct gpio_chip sch_gpio_chip
= {
171 .owner
= THIS_MODULE
,
172 .direction_input
= sch_gpio_direction_in
,
174 .direction_output
= sch_gpio_direction_out
,
178 static int sch_gpio_probe(struct platform_device
*pdev
)
180 struct sch_gpio
*sch
;
181 struct resource
*res
;
183 sch
= devm_kzalloc(&pdev
->dev
, sizeof(*sch
), GFP_KERNEL
);
187 res
= platform_get_resource(pdev
, IORESOURCE_IO
, 0);
191 if (!devm_request_region(&pdev
->dev
, res
->start
, resource_size(res
),
195 spin_lock_init(&sch
->lock
);
196 sch
->iobase
= res
->start
;
197 sch
->chip
= sch_gpio_chip
;
198 sch
->chip
.label
= dev_name(&pdev
->dev
);
199 sch
->chip
.dev
= &pdev
->dev
;
202 case PCI_DEVICE_ID_INTEL_SCH_LPC
:
204 sch
->resume_base
= 10;
205 sch
->chip
.ngpio
= 14;
208 * GPIO[6:0] enabled by default
209 * GPIO7 is configured by the CMC as SLPIOVR
210 * Enable GPIO[9:8] core powered gpios explicitly
212 sch_gpio_enable(sch
, 8);
213 sch_gpio_enable(sch
, 9);
215 * SUS_GPIO[2:0] enabled by default
216 * Enable SUS_GPIO3 resume powered gpio explicitly
218 sch_gpio_enable(sch
, 13);
221 case PCI_DEVICE_ID_INTEL_ITC_LPC
:
223 sch
->resume_base
= 5;
224 sch
->chip
.ngpio
= 14;
227 case PCI_DEVICE_ID_INTEL_CENTERTON_ILB
:
229 sch
->resume_base
= 21;
230 sch
->chip
.ngpio
= 30;
237 platform_set_drvdata(pdev
, sch
);
239 return gpiochip_add(&sch
->chip
);
242 static int sch_gpio_remove(struct platform_device
*pdev
)
244 struct sch_gpio
*sch
= platform_get_drvdata(pdev
);
246 gpiochip_remove(&sch
->chip
);
250 static struct platform_driver sch_gpio_driver
= {
254 .probe
= sch_gpio_probe
,
255 .remove
= sch_gpio_remove
,
258 module_platform_driver(sch_gpio_driver
);
260 MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
261 MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
262 MODULE_LICENSE("GPL");
263 MODULE_ALIAS("platform:sch_gpio");