drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Christian König
  23  */
  24
  25 #include <drm/drmP.h>
  26 #include "amdgpu.h"
  27
  28 struct amdgpu_gtt_mgr {
  29         struct drm_mm mm;
  30         spinlock_t lock;
  31         atomic64_t available;
  32 };
  33
  34 /**
  35  * amdgpu_gtt_mgr_init - init GTT manager and DRM MM
  36  *
  37  * @man: TTM memory type manager
  38  * @p_size: maximum size of GTT
  39  *
  40  * Allocate and initialize the GTT manager.
  41  */
  42 static int amdgpu_gtt_mgr_init(struct ttm_mem_type_manager *man,
  43                                unsigned long p_size)
  44 {
  45         struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
  46         struct amdgpu_gtt_mgr *mgr;
  47         uint64_t start, size;
  48
  49         mgr = kzalloc(sizeof(*mgr), GFP_KERNEL);
  50         if (!mgr)
  51                 return -ENOMEM;
  52
  53         start = AMDGPU_GTT_MAX_TRANSFER_SIZE * AMDGPU_GTT_NUM_TRANSFER_WINDOWS;
  54         size = (adev->mc.gart_size >> PAGE_SHIFT) - start;
  55         drm_mm_init(&mgr->mm, start, size);
  56         spin_lock_init(&mgr->lock);
  57         atomic64_set(&mgr->available, p_size);
  58         man->priv = mgr;
  59         return 0;
  60 }
  61
  62 /**
  63  * amdgpu_gtt_mgr_fini - free and destroy GTT manager
  64  *
  65  * @man: TTM memory type manager
  66  *
  67  * Destroy and free the GTT manager, returns -EBUSY if ranges are still
  68  * allocated inside it.
  69  */
  70 static int amdgpu_gtt_mgr_fini(struct ttm_mem_type_manager *man)
  71 {
  72         struct amdgpu_gtt_mgr *mgr = man->priv;
  73
  74         spin_lock(&mgr->lock);
  75         if (!drm_mm_clean(&mgr->mm)) {
  76                 spin_unlock(&mgr->lock);
  77                 return -EBUSY;
  78         }
  79
  80         drm_mm_takedown(&mgr->mm);
  81         spin_unlock(&mgr->lock);
  82         kfree(mgr);
  83         man->priv = NULL;
  84         return 0;
  85 }
  86
  87 /**
  88  * amdgpu_gtt_mgr_is_allocated - Check if mem has address space
  89  *
  90  * @mem: the mem object to check
  91  *
  92  * Check if a mem object has already address space allocated.
  93  */
  94 bool amdgpu_gtt_mgr_is_allocated(struct ttm_mem_reg *mem)
  95 {
  96         struct drm_mm_node *node = mem->mm_node;
  97
  98         return (node->start != AMDGPU_BO_INVALID_OFFSET);
  99 }
 100
 101 /**
 102  * amdgpu_gtt_mgr_alloc - allocate new ranges
 103  *
 104  * @man: TTM memory type manager
 105  * @tbo: TTM BO we need this range for
 106  * @place: placement flags and restrictions
 107  * @mem: the resulting mem object
 108  *
 109  * Allocate the address space for a node.
 110  */
 111 int amdgpu_gtt_mgr_alloc(struct ttm_mem_type_manager *man,
 112                          struct ttm_buffer_object *tbo,
 113                          const struct ttm_place *place,
 114                          struct ttm_mem_reg *mem)
 115 {
 116         struct amdgpu_device *adev = amdgpu_ttm_adev(man->bdev);
 117         struct amdgpu_gtt_mgr *mgr = man->priv;
 118         struct drm_mm_node *node = mem->mm_node;
 119         enum drm_mm_insert_mode mode;
 120         unsigned long fpfn, lpfn;
 121         int r;
 122
 123         if (amdgpu_gtt_mgr_is_allocated(mem))
 124                 return 0;
 125
 126         if (place)
 127                 fpfn = place->fpfn;
 128         else
 129                 fpfn = 0;
 130
 131         if (place && place->lpfn)
 132                 lpfn = place->lpfn;
 133         else
 134                 lpfn = adev->gart.num_cpu_pages;
 135
 136         mode = DRM_MM_INSERT_BEST;
 137         if (place && place->flags & TTM_PL_FLAG_TOPDOWN)
 138                 mode = DRM_MM_INSERT_HIGH;
 139
 140         spin_lock(&mgr->lock);
 141         r = drm_mm_insert_node_in_range(&mgr->mm, node,
 142                                         mem->num_pages, mem->page_alignment, 0,
 143                                         fpfn, lpfn, mode);
 144         spin_unlock(&mgr->lock);
 145
 146         if (!r) {
 147                 mem->start = node->start;
 148                 if (&tbo->mem == mem)
 149                         tbo->offset = (tbo->mem.start << PAGE_SHIFT) +
 150                             tbo->bdev->man[tbo->mem.mem_type].gpu_offset;
 151         }
 152
 153         return r;
 154 }
 155
 156 /**
 157  * amdgpu_gtt_mgr_new - allocate a new node
 158  *
 159  * @man: TTM memory type manager
 160  * @tbo: TTM BO we need this range for
 161  * @place: placement flags and restrictions
 162  * @mem: the resulting mem object
 163  *
 164  * Dummy, allocate the node but no space for it yet.
 165  */
 166 static int amdgpu_gtt_mgr_new(struct ttm_mem_type_manager *man,
 167                               struct ttm_buffer_object *tbo,
 168                               const struct ttm_place *place,
 169                               struct ttm_mem_reg *mem)
 170 {
 171         struct amdgpu_gtt_mgr *mgr = man->priv;
 172         struct drm_mm_node *node;
 173         int r;
 174
 175         spin_lock(&mgr->lock);
 176         if (atomic64_read(&mgr->available) < mem->num_pages) {
 177                 spin_unlock(&mgr->lock);
 178                 return 0;
 179         }
 180         atomic64_sub(mem->num_pages, &mgr->available);
 181         spin_unlock(&mgr->lock);
 182
 183         node = kzalloc(sizeof(*node), GFP_KERNEL);
 184         if (!node) {
 185                 r = -ENOMEM;
 186                 goto err_out;
 187         }
 188
 189         node->start = AMDGPU_BO_INVALID_OFFSET;
 190         node->size = mem->num_pages;
 191         mem->mm_node = node;
 192
 193         if (place->fpfn || place->lpfn || place->flags & TTM_PL_FLAG_TOPDOWN) {
 194                 r = amdgpu_gtt_mgr_alloc(man, tbo, place, mem);
 195                 if (unlikely(r)) {
 196                         kfree(node);
 197                         mem->mm_node = NULL;
 198                         r = 0;
 199                         goto err_out;
 200                 }
 201         } else {
 202                 mem->start = node->start;
 203         }
 204
 205         return 0;
 206 err_out:
 207         atomic64_add(mem->num_pages, &mgr->available);
 208
 209         return r;
 210 }
 211
 212 /**
 213  * amdgpu_gtt_mgr_del - free ranges
 214  *
 215  * @man: TTM memory type manager
 216  * @tbo: TTM BO we need this range for
 217  * @place: placement flags and restrictions
 218  * @mem: TTM memory object
 219  *
 220  * Free the allocated GTT again.
 221  */
 222 static void amdgpu_gtt_mgr_del(struct ttm_mem_type_manager *man,
 223                                struct ttm_mem_reg *mem)
 224 {
 225         struct amdgpu_gtt_mgr *mgr = man->priv;
 226         struct drm_mm_node *node = mem->mm_node;
 227
 228         if (!node)
 229                 return;
 230
 231         spin_lock(&mgr->lock);
 232         if (node->start != AMDGPU_BO_INVALID_OFFSET)
 233                 drm_mm_remove_node(node);
 234         spin_unlock(&mgr->lock);
 235         atomic64_add(mem->num_pages, &mgr->available);
 236
 237         kfree(node);
 238         mem->mm_node = NULL;
 239 }
 240
 241 /**
 242  * amdgpu_gtt_mgr_usage - return usage of GTT domain
 243  *
 244  * @man: TTM memory type manager
 245  *
 246  * Return how many bytes are used in the GTT domain
 247  */
 248 uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man)
 249 {
 250         struct amdgpu_gtt_mgr *mgr = man->priv;
 251
 252         return (u64)(man->size - atomic64_read(&mgr->available)) * PAGE_SIZE;
 253 }
 254
 255 /**
 256  * amdgpu_gtt_mgr_debug - dump VRAM table
 257  *
 258  * @man: TTM memory type manager
 259  * @printer: DRM printer to use
 260  *
 261  * Dump the table content using printk.
 262  */
 263 static void amdgpu_gtt_mgr_debug(struct ttm_mem_type_manager *man,
 264                                  struct drm_printer *printer)
 265 {
 266         struct amdgpu_gtt_mgr *mgr = man->priv;
 267
 268         spin_lock(&mgr->lock);
 269         drm_mm_print(&mgr->mm, printer);
 270         spin_unlock(&mgr->lock);
 271
 272         drm_printf(printer, "man size:%llu pages, gtt available:%llu pages, usage:%lluMB\n",
 273                    man->size, (u64)atomic64_read(&mgr->available),
 274                    amdgpu_gtt_mgr_usage(man) >> 20);
 275 }
 276
 277 const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func = {
 278         .init = amdgpu_gtt_mgr_init,
 279         .takedown = amdgpu_gtt_mgr_fini,
 280         .get_node = amdgpu_gtt_mgr_new,
 281         .put_node = amdgpu_gtt_mgr_del,
 282         .debug = amdgpu_gtt_mgr_debug
 283 };