2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 #include "amd_shared.h"
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include "amdgpu_pm.h"
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_powerplay.h"
37 static int amdgpu_powerplay_init(struct amdgpu_device
*adev
)
40 struct amd_powerplay
*amd_pp
;
42 amd_pp
= &(adev
->powerplay
);
44 if (adev
->pp_enabled
) {
45 struct amd_pp_init
*pp_init
;
47 pp_init
= kzalloc(sizeof(struct amd_pp_init
), GFP_KERNEL
);
52 pp_init
->chip_family
= adev
->family
;
53 pp_init
->chip_id
= adev
->asic_type
;
54 pp_init
->device
= amdgpu_cgs_create_device(adev
);
55 ret
= amd_powerplay_init(pp_init
, amd_pp
);
58 amd_pp
->pp_handle
= (void *)adev
;
60 switch (adev
->asic_type
) {
61 #ifdef CONFIG_DRM_AMDGPU_SI
67 amd_pp
->ip_funcs
= &si_dpm_ip_funcs
;
70 #ifdef CONFIG_DRM_AMDGPU_CIK
73 amd_pp
->ip_funcs
= &ci_dpm_ip_funcs
;
78 amd_pp
->ip_funcs
= &kv_dpm_ip_funcs
;
83 amd_pp
->ip_funcs
= &cz_dpm_ip_funcs
;
93 static int amdgpu_pp_early_init(void *handle
)
95 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
98 switch (adev
->asic_type
) {
105 adev
->pp_enabled
= true;
109 adev
->pp_enabled
= (amdgpu_powerplay
== 0) ? false : true;
111 /* These chips don't have powerplay implemenations */
118 adev
->pp_enabled
= false;
122 ret
= amdgpu_powerplay_init(adev
);
126 if (adev
->powerplay
.ip_funcs
->early_init
)
127 ret
= adev
->powerplay
.ip_funcs
->early_init(
128 adev
->powerplay
.pp_handle
);
133 static int amdgpu_pp_late_init(void *handle
)
136 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
138 if (adev
->powerplay
.ip_funcs
->late_init
)
139 ret
= adev
->powerplay
.ip_funcs
->late_init(
140 adev
->powerplay
.pp_handle
);
142 if (adev
->pp_enabled
&& adev
->pm
.dpm_enabled
) {
143 amdgpu_pm_sysfs_init(adev
);
144 amdgpu_dpm_dispatch_task(adev
, AMD_PP_EVENT_COMPLETE_INIT
, NULL
, NULL
);
150 static int amdgpu_pp_sw_init(void *handle
)
153 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
155 if (adev
->powerplay
.ip_funcs
->sw_init
)
156 ret
= adev
->powerplay
.ip_funcs
->sw_init(
157 adev
->powerplay
.pp_handle
);
162 static int amdgpu_pp_sw_fini(void *handle
)
165 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
167 if (adev
->powerplay
.ip_funcs
->sw_fini
)
168 ret
= adev
->powerplay
.ip_funcs
->sw_fini(
169 adev
->powerplay
.pp_handle
);
176 static int amdgpu_pp_hw_init(void *handle
)
179 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
181 if (adev
->pp_enabled
&& adev
->firmware
.smu_load
)
182 amdgpu_ucode_init_bo(adev
);
184 if (adev
->powerplay
.ip_funcs
->hw_init
)
185 ret
= adev
->powerplay
.ip_funcs
->hw_init(
186 adev
->powerplay
.pp_handle
);
188 if ((amdgpu_dpm
!= 0) && !amdgpu_sriov_vf(adev
))
189 adev
->pm
.dpm_enabled
= true;
194 static int amdgpu_pp_hw_fini(void *handle
)
197 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
199 if (adev
->powerplay
.ip_funcs
->hw_fini
)
200 ret
= adev
->powerplay
.ip_funcs
->hw_fini(
201 adev
->powerplay
.pp_handle
);
203 if (adev
->pp_enabled
&& adev
->firmware
.smu_load
)
204 amdgpu_ucode_fini_bo(adev
);
209 static void amdgpu_pp_late_fini(void *handle
)
211 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
213 if (adev
->pp_enabled
) {
214 amdgpu_pm_sysfs_fini(adev
);
215 amd_powerplay_fini(adev
->powerplay
.pp_handle
);
218 if (adev
->powerplay
.ip_funcs
->late_fini
)
219 adev
->powerplay
.ip_funcs
->late_fini(
220 adev
->powerplay
.pp_handle
);
223 static int amdgpu_pp_suspend(void *handle
)
226 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
228 if (adev
->powerplay
.ip_funcs
->suspend
)
229 ret
= adev
->powerplay
.ip_funcs
->suspend(
230 adev
->powerplay
.pp_handle
);
234 static int amdgpu_pp_resume(void *handle
)
237 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
239 if (adev
->powerplay
.ip_funcs
->resume
)
240 ret
= adev
->powerplay
.ip_funcs
->resume(
241 adev
->powerplay
.pp_handle
);
245 static int amdgpu_pp_set_clockgating_state(void *handle
,
246 enum amd_clockgating_state state
)
249 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
251 if (adev
->powerplay
.ip_funcs
->set_clockgating_state
)
252 ret
= adev
->powerplay
.ip_funcs
->set_clockgating_state(
253 adev
->powerplay
.pp_handle
, state
);
257 static int amdgpu_pp_set_powergating_state(void *handle
,
258 enum amd_powergating_state state
)
261 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
263 if (adev
->powerplay
.ip_funcs
->set_powergating_state
)
264 ret
= adev
->powerplay
.ip_funcs
->set_powergating_state(
265 adev
->powerplay
.pp_handle
, state
);
270 static bool amdgpu_pp_is_idle(void *handle
)
273 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
275 if (adev
->powerplay
.ip_funcs
->is_idle
)
276 ret
= adev
->powerplay
.ip_funcs
->is_idle(
277 adev
->powerplay
.pp_handle
);
281 static int amdgpu_pp_wait_for_idle(void *handle
)
284 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
286 if (adev
->powerplay
.ip_funcs
->wait_for_idle
)
287 ret
= adev
->powerplay
.ip_funcs
->wait_for_idle(
288 adev
->powerplay
.pp_handle
);
292 static int amdgpu_pp_soft_reset(void *handle
)
295 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
297 if (adev
->powerplay
.ip_funcs
->soft_reset
)
298 ret
= adev
->powerplay
.ip_funcs
->soft_reset(
299 adev
->powerplay
.pp_handle
);
303 static const struct amd_ip_funcs amdgpu_pp_ip_funcs
= {
304 .name
= "amdgpu_powerplay",
305 .early_init
= amdgpu_pp_early_init
,
306 .late_init
= amdgpu_pp_late_init
,
307 .sw_init
= amdgpu_pp_sw_init
,
308 .sw_fini
= amdgpu_pp_sw_fini
,
309 .hw_init
= amdgpu_pp_hw_init
,
310 .hw_fini
= amdgpu_pp_hw_fini
,
311 .late_fini
= amdgpu_pp_late_fini
,
312 .suspend
= amdgpu_pp_suspend
,
313 .resume
= amdgpu_pp_resume
,
314 .is_idle
= amdgpu_pp_is_idle
,
315 .wait_for_idle
= amdgpu_pp_wait_for_idle
,
316 .soft_reset
= amdgpu_pp_soft_reset
,
317 .set_clockgating_state
= amdgpu_pp_set_clockgating_state
,
318 .set_powergating_state
= amdgpu_pp_set_powergating_state
,
321 const struct amdgpu_ip_block_version amdgpu_pp_ip_block
=
323 .type
= AMD_IP_BLOCK_TYPE_SMC
,
327 .funcs
= &amdgpu_pp_ip_funcs
,