2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 #include "amd_shared.h"
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include "amdgpu_pm.h"
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_powerplay.h"
37 static int amdgpu_create_pp_handle(struct amdgpu_device
*adev
)
39 struct amd_pp_init pp_init
;
40 struct amd_powerplay
*amd_pp
;
43 amd_pp
= &(adev
->powerplay
);
44 pp_init
.chip_family
= adev
->family
;
45 pp_init
.chip_id
= adev
->asic_type
;
46 pp_init
.pm_en
= (amdgpu_dpm
!= 0 && !amdgpu_sriov_vf(adev
)) ? true : false;
47 pp_init
.feature_mask
= amdgpu_pp_feature_mask
;
48 pp_init
.device
= amdgpu_cgs_create_device(adev
);
49 ret
= amd_powerplay_create(&pp_init
, &(amd_pp
->pp_handle
));
55 static int amdgpu_pp_early_init(void *handle
)
57 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
58 struct amd_powerplay
*amd_pp
;
61 amd_pp
= &(adev
->powerplay
);
62 adev
->pp_enabled
= false;
63 amd_pp
->pp_handle
= (void *)adev
;
65 switch (adev
->asic_type
) {
76 adev
->pp_enabled
= true;
77 if (amdgpu_create_pp_handle(adev
))
79 amd_pp
->ip_funcs
= &pp_ip_funcs
;
80 amd_pp
->pp_funcs
= &pp_dpm_funcs
;
82 /* These chips don't have powerplay implemenations */
83 #ifdef CONFIG_DRM_AMDGPU_SI
89 amd_pp
->ip_funcs
= &si_dpm_ip_funcs
;
92 #ifdef CONFIG_DRM_AMDGPU_CIK
95 amd_pp
->ip_funcs
= &ci_dpm_ip_funcs
;
100 amd_pp
->ip_funcs
= &kv_dpm_ip_funcs
;
108 if (adev
->powerplay
.ip_funcs
->early_init
)
109 ret
= adev
->powerplay
.ip_funcs
->early_init(
110 adev
->powerplay
.pp_handle
);
112 if (ret
== PP_DPM_DISABLED
) {
113 adev
->pm
.dpm_enabled
= false;
120 static int amdgpu_pp_late_init(void *handle
)
123 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
125 if (adev
->powerplay
.ip_funcs
->late_init
)
126 ret
= adev
->powerplay
.ip_funcs
->late_init(
127 adev
->powerplay
.pp_handle
);
129 if (adev
->pp_enabled
&& adev
->pm
.dpm_enabled
) {
130 amdgpu_pm_sysfs_init(adev
);
131 amdgpu_dpm_dispatch_task(adev
, AMD_PP_EVENT_COMPLETE_INIT
, NULL
, NULL
);
137 static int amdgpu_pp_sw_init(void *handle
)
140 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
142 if (adev
->powerplay
.ip_funcs
->sw_init
)
143 ret
= adev
->powerplay
.ip_funcs
->sw_init(
144 adev
->powerplay
.pp_handle
);
149 static int amdgpu_pp_sw_fini(void *handle
)
152 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
154 if (adev
->powerplay
.ip_funcs
->sw_fini
)
155 ret
= adev
->powerplay
.ip_funcs
->sw_fini(
156 adev
->powerplay
.pp_handle
);
163 static int amdgpu_pp_hw_init(void *handle
)
166 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
168 if (adev
->pp_enabled
&& adev
->firmware
.load_type
== AMDGPU_FW_LOAD_SMU
)
169 amdgpu_ucode_init_bo(adev
);
171 if (adev
->powerplay
.ip_funcs
->hw_init
)
172 ret
= adev
->powerplay
.ip_funcs
->hw_init(
173 adev
->powerplay
.pp_handle
);
175 if (ret
== PP_DPM_DISABLED
) {
176 adev
->pm
.dpm_enabled
= false;
180 if ((amdgpu_dpm
!= 0) && !amdgpu_sriov_vf(adev
))
181 adev
->pm
.dpm_enabled
= true;
186 static int amdgpu_pp_hw_fini(void *handle
)
189 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
191 if (adev
->pp_enabled
&& adev
->pm
.dpm_enabled
)
192 amdgpu_pm_sysfs_fini(adev
);
194 if (adev
->powerplay
.ip_funcs
->hw_fini
)
195 ret
= adev
->powerplay
.ip_funcs
->hw_fini(
196 adev
->powerplay
.pp_handle
);
198 if (adev
->pp_enabled
&& adev
->firmware
.load_type
== AMDGPU_FW_LOAD_SMU
)
199 amdgpu_ucode_fini_bo(adev
);
204 static void amdgpu_pp_late_fini(void *handle
)
206 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
208 if (adev
->powerplay
.ip_funcs
->late_fini
)
209 adev
->powerplay
.ip_funcs
->late_fini(
210 adev
->powerplay
.pp_handle
);
213 if (adev
->pp_enabled
)
214 amd_powerplay_destroy(adev
->powerplay
.pp_handle
);
217 static int amdgpu_pp_suspend(void *handle
)
220 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
222 if (adev
->powerplay
.ip_funcs
->suspend
)
223 ret
= adev
->powerplay
.ip_funcs
->suspend(
224 adev
->powerplay
.pp_handle
);
228 static int amdgpu_pp_resume(void *handle
)
231 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
233 if (adev
->powerplay
.ip_funcs
->resume
)
234 ret
= adev
->powerplay
.ip_funcs
->resume(
235 adev
->powerplay
.pp_handle
);
239 static int amdgpu_pp_set_clockgating_state(void *handle
,
240 enum amd_clockgating_state state
)
243 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
245 if (adev
->powerplay
.ip_funcs
->set_clockgating_state
)
246 ret
= adev
->powerplay
.ip_funcs
->set_clockgating_state(
247 adev
->powerplay
.pp_handle
, state
);
251 static int amdgpu_pp_set_powergating_state(void *handle
,
252 enum amd_powergating_state state
)
255 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
257 if (adev
->powerplay
.ip_funcs
->set_powergating_state
)
258 ret
= adev
->powerplay
.ip_funcs
->set_powergating_state(
259 adev
->powerplay
.pp_handle
, state
);
264 static bool amdgpu_pp_is_idle(void *handle
)
267 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
269 if (adev
->powerplay
.ip_funcs
->is_idle
)
270 ret
= adev
->powerplay
.ip_funcs
->is_idle(
271 adev
->powerplay
.pp_handle
);
275 static int amdgpu_pp_wait_for_idle(void *handle
)
278 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
280 if (adev
->powerplay
.ip_funcs
->wait_for_idle
)
281 ret
= adev
->powerplay
.ip_funcs
->wait_for_idle(
282 adev
->powerplay
.pp_handle
);
286 static int amdgpu_pp_soft_reset(void *handle
)
289 struct amdgpu_device
*adev
= (struct amdgpu_device
*)handle
;
291 if (adev
->powerplay
.ip_funcs
->soft_reset
)
292 ret
= adev
->powerplay
.ip_funcs
->soft_reset(
293 adev
->powerplay
.pp_handle
);
297 static const struct amd_ip_funcs amdgpu_pp_ip_funcs
= {
298 .name
= "amdgpu_powerplay",
299 .early_init
= amdgpu_pp_early_init
,
300 .late_init
= amdgpu_pp_late_init
,
301 .sw_init
= amdgpu_pp_sw_init
,
302 .sw_fini
= amdgpu_pp_sw_fini
,
303 .hw_init
= amdgpu_pp_hw_init
,
304 .hw_fini
= amdgpu_pp_hw_fini
,
305 .late_fini
= amdgpu_pp_late_fini
,
306 .suspend
= amdgpu_pp_suspend
,
307 .resume
= amdgpu_pp_resume
,
308 .is_idle
= amdgpu_pp_is_idle
,
309 .wait_for_idle
= amdgpu_pp_wait_for_idle
,
310 .soft_reset
= amdgpu_pp_soft_reset
,
311 .set_clockgating_state
= amdgpu_pp_set_clockgating_state
,
312 .set_powergating_state
= amdgpu_pp_set_powergating_state
,
315 const struct amdgpu_ip_block_version amdgpu_pp_ip_block
=
317 .type
= AMD_IP_BLOCK_TYPE_SMC
,
321 .funcs
= &amdgpu_pp_ip_funcs
,