drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.c

   1 /*
   2  * Copyright 2017 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include "amdgpu.h"
  25 #include "amdgpu_vf_error.h"
  26 #include "mxgpu_ai.h"
  27
  28 #define AMDGPU_VF_ERROR_ENTRY_SIZE    16
  29
  30 /* struct error_entry - amdgpu VF error information. */
  31 struct amdgpu_vf_error_buffer {
  32         int read_count;
  33         int write_count;
  34         uint16_t code[AMDGPU_VF_ERROR_ENTRY_SIZE];
  35         uint16_t flags[AMDGPU_VF_ERROR_ENTRY_SIZE];
  36         uint64_t data[AMDGPU_VF_ERROR_ENTRY_SIZE];
  37 };
  38
  39 struct amdgpu_vf_error_buffer admgpu_vf_errors;
  40
  41
  42 void amdgpu_vf_error_put(uint16_t sub_error_code, uint16_t error_flags, uint64_t error_data)
  43 {
  44         int index;
  45         uint16_t error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
  46
  47         index = admgpu_vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
  48         admgpu_vf_errors.code [index] = error_code;
  49         admgpu_vf_errors.flags [index] = error_flags;
  50         admgpu_vf_errors.data [index] = error_data;
  51         admgpu_vf_errors.write_count ++;
  52 }
  53
  54
  55 void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
  56 {
  57         /* u32 pf2vf_flags = 0; */
  58         u32 data1, data2, data3;
  59         int index;
  60
  61         if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
  62                 return;
  63         }
  64 /*
  65         TODO: Enable these code when pv2vf_info is merged
  66         AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags);
  67         if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) {
  68                 return;
  69         }
  70 */
  71         /* The errors are overlay of array, correct read_count as full. */
  72         if (admgpu_vf_errors.write_count - admgpu_vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
  73                 admgpu_vf_errors.read_count = admgpu_vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
  74         }
  75
  76         while (admgpu_vf_errors.read_count < admgpu_vf_errors.write_count) {
  77                 index =admgpu_vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
  78                 data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX (admgpu_vf_errors.code[index], admgpu_vf_errors.flags[index]);
  79                 data2 = admgpu_vf_errors.data[index] & 0xFFFFFFFF;
  80                 data3 = (admgpu_vf_errors.data[index] >> 32) & 0xFFFFFFFF;
  81
  82                 adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
  83                 admgpu_vf_errors.read_count ++;
  84         }
  85 }