]>
git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
2 * Copyright 2018 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include "soc15_common.h"
27 #include "soc15_hw_ip.h"
28 #include "vega20_ip_offset.h"
30 int vega20_reg_base_init(struct amdgpu_device
*adev
)
32 /* HW has more IP blocks, only initialized the blocke beend by our driver */
34 for (i
= 0 ; i
< MAX_INSTANCE
; ++i
) {
35 adev
->reg_offset
[GC_HWIP
][i
] = (uint32_t *)(&(GC_BASE
.instance
[i
]));
36 adev
->reg_offset
[HDP_HWIP
][i
] = (uint32_t *)(&(HDP_BASE
.instance
[i
]));
37 adev
->reg_offset
[MMHUB_HWIP
][i
] = (uint32_t *)(&(MMHUB_BASE
.instance
[i
]));
38 adev
->reg_offset
[ATHUB_HWIP
][i
] = (uint32_t *)(&(ATHUB_BASE
.instance
[i
]));
39 adev
->reg_offset
[NBIO_HWIP
][i
] = (uint32_t *)(&(NBIO_BASE
.instance
[i
]));
40 adev
->reg_offset
[MP0_HWIP
][i
] = (uint32_t *)(&(MP0_BASE
.instance
[i
]));
41 adev
->reg_offset
[MP1_HWIP
][i
] = (uint32_t *)(&(MP1_BASE
.instance
[i
]));
42 adev
->reg_offset
[UVD_HWIP
][i
] = (uint32_t *)(&(UVD_BASE
.instance
[i
]));
43 adev
->reg_offset
[VCE_HWIP
][i
] = (uint32_t *)(&(VCE_BASE
.instance
[i
]));
44 adev
->reg_offset
[DF_HWIP
][i
] = (uint32_t *)(&(DF_BASE
.instance
[i
]));
45 adev
->reg_offset
[DCE_HWIP
][i
] = (uint32_t *)(&(DCE_BASE
.instance
[i
]));
46 adev
->reg_offset
[OSSSYS_HWIP
][i
] = (uint32_t *)(&(OSSSYS_BASE
.instance
[i
]));
47 adev
->reg_offset
[SDMA0_HWIP
][i
] = (uint32_t *)(&(SDMA0_BASE
.instance
[i
]));
48 adev
->reg_offset
[SDMA1_HWIP
][i
] = (uint32_t *)(&(SDMA1_BASE
.instance
[i
]));
49 adev
->reg_offset
[SMUIO_HWIP
][i
] = (uint32_t *)(&(SMUIO_BASE
.instance
[i
]));
50 adev
->reg_offset
[NBIF_HWIP
][i
] = (uint32_t *)(&(NBIO_BASE
.instance
[i
]));
51 adev
->reg_offset
[THM_HWIP
][i
] = (uint32_t *)(&(THM_BASE
.instance
[i
]));