drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_surfaces;
  49         uint32_t max_downscale_ratio;
  50         uint32_t i2c_speed_in_khz;
  51
  52         unsigned int max_cursor_size;
  53 };
  54
  55
  56 struct dc_dcc_surface_param {
  57         struct dc_size surface_size;
  58         enum surface_pixel_format format;
  59         enum swizzle_mode_values swizzle_mode;
  60         enum dc_scan_direction scan;
  61 };
  62
  63 struct dc_dcc_setting {
  64         unsigned int max_compressed_blk_size;
  65         unsigned int max_uncompressed_blk_size;
  66         bool independent_64b_blks;
  67 };
  68
  69 struct dc_surface_dcc_cap {
  70         union {
  71                 struct {
  72                         struct dc_dcc_setting rgb;
  73                 } grph;
  74
  75                 struct {
  76                         struct dc_dcc_setting luma;
  77                         struct dc_dcc_setting chroma;
  78                 } video;
  79         };
  80
  81         bool capable;
  82         bool const_color_support;
  83 };
  84
  85 struct dc_static_screen_events {
  86         bool cursor_update;
  87         bool surface_update;
  88         bool overlay_update;
  89 };
  90
  91 /* Forward declaration*/
  92 struct dc;
  93 struct dc_surface;
  94 struct validate_context;
  95
  96 struct dc_cap_funcs {
  97 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  98         bool (*get_dcc_compression_cap)(const struct dc *dc,
  99                         const struct dc_dcc_surface_param *input,
 100                         struct dc_surface_dcc_cap *output);
 101 #else
 102         int i;
 103 #endif
 104 };
 105
 106 struct dc_stream_funcs {
 107         bool (*adjust_vmin_vmax)(struct dc *dc,
 108                         const struct dc_stream **stream,
 109                         int num_streams,
 110                         int vmin,
 111                         int vmax);
 112         bool (*get_crtc_position)(struct dc *dc,
 113                         const struct dc_stream **stream,
 114                         int num_streams,
 115                         unsigned int *v_pos,
 116                         unsigned int *nom_v_pos);
 117
 118         bool (*set_gamut_remap)(struct dc *dc,
 119                         const struct dc_stream *stream);
 120
 121         bool (*program_csc_matrix)(struct dc *dc,
 122                         const struct dc_stream *stream);
 123
 124         void (*set_static_screen_events)(struct dc *dc,
 125                         const struct dc_stream **stream,
 126                         int num_streams,
 127                         const struct dc_static_screen_events *events);
 128
 129         void (*set_dither_option)(const struct dc_stream *stream,
 130                         enum dc_dither_option option);
 131 };
 132
 133 struct link_training_settings;
 134
 135 struct dc_link_funcs {
 136         void (*set_drive_settings)(struct dc *dc,
 137                         struct link_training_settings *lt_settings,
 138                         const struct dc_link *link);
 139         void (*perform_link_training)(struct dc *dc,
 140                         struct dc_link_settings *link_setting,
 141                         bool skip_video_pattern);
 142         void (*set_preferred_link_settings)(struct dc *dc,
 143                         struct dc_link_settings *link_setting,
 144                         const struct dc_link *link);
 145         void (*enable_hpd)(const struct dc_link *link);
 146         void (*disable_hpd)(const struct dc_link *link);
 147         void (*set_test_pattern)(
 148                         const struct dc_link *link,
 149                         enum dp_test_pattern test_pattern,
 150                         const struct link_training_settings *p_link_settings,
 151                         const unsigned char *p_custom_pattern,
 152                         unsigned int cust_pattern_size);
 153 };
 154
 155 /* Structure to hold configuration flags set by dm at dc creation. */
 156 struct dc_config {
 157         bool gpu_vm_support;
 158         bool disable_disp_pll_sharing;
 159 };
 160
 161 struct dc_debug {
 162         bool surface_visual_confirm;
 163         bool max_disp_clk;
 164         bool surface_trace;
 165         bool timing_trace;
 166         bool clock_trace;
 167         bool validation_trace;
 168         bool disable_stutter;
 169         bool disable_dcc;
 170         bool disable_dfs_bypass;
 171 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 172         bool disable_dpp_power_gate;
 173         bool disable_hubp_power_gate;
 174         bool disable_pplib_wm_range;
 175         bool use_dml_wm;
 176         bool disable_pipe_split;
 177         int sr_exit_time_dpm0_ns;
 178         int sr_enter_plus_exit_time_dpm0_ns;
 179         int sr_exit_time_ns;
 180         int sr_enter_plus_exit_time_ns;
 181         int urgent_latency_ns;
 182         int percent_of_ideal_drambw;
 183         int dram_clock_change_latency_ns;
 184         int always_scale;
 185 #endif
 186         bool disable_pplib_clock_request;
 187         bool disable_clock_gate;
 188         bool disable_dmcu;
 189         bool disable_psr;
 190         bool force_abm_enable;
 191         bool no_static_for_external_dp;
 192 };
 193
 194 struct dc {
 195         struct dc_caps caps;
 196         struct dc_cap_funcs cap_funcs;
 197         struct dc_stream_funcs stream_funcs;
 198         struct dc_link_funcs link_funcs;
 199         struct dc_config config;
 200         struct dc_debug debug;
 201 };
 202
 203 enum frame_buffer_mode {
 204         FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
 205         FRAME_BUFFER_MODE_ZFB_ONLY,
 206         FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL,
 207 } ;
 208
 209 struct dchub_init_data {
 210         int64_t zfb_phys_addr_base;
 211         int64_t zfb_mc_base_addr;
 212         uint64_t zfb_size_in_byte;
 213         enum frame_buffer_mode fb_mode;
 214         bool dchub_initialzied;
 215         bool dchub_info_valid;
 216 };
 217
 218 struct dc_init_data {
 219         struct hw_asic_id asic_id;
 220         void *driver; /* ctx */
 221         struct cgs_device *cgs_device;
 222
 223         int num_virtual_links;
 224         /*
 225          * If 'vbios_override' not NULL, it will be called instead
 226          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 227          */
 228         struct dc_bios *vbios_override;
 229         enum dce_environment dce_environment;
 230
 231         struct dc_config flags;
 232 };
 233
 234 struct dc *dc_create(const struct dc_init_data *init_params);
 235
 236 void dc_destroy(struct dc **dc);
 237
 238 bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
 239
 240 /*******************************************************************************
 241  * Surface Interfaces
 242  ******************************************************************************/
 243
 244 enum {
 245         TRANSFER_FUNC_POINTS = 1025
 246 };
 247
 248 struct dc_hdr_static_metadata {
 249         /* display chromaticities and white point in units of 0.00001 */
 250         unsigned int chromaticity_green_x;
 251         unsigned int chromaticity_green_y;
 252         unsigned int chromaticity_blue_x;
 253         unsigned int chromaticity_blue_y;
 254         unsigned int chromaticity_red_x;
 255         unsigned int chromaticity_red_y;
 256         unsigned int chromaticity_white_point_x;
 257         unsigned int chromaticity_white_point_y;
 258
 259         uint32_t min_luminance;
 260         uint32_t max_luminance;
 261         uint32_t maximum_content_light_level;
 262         uint32_t maximum_frame_average_light_level;
 263
 264         bool hdr_supported;
 265         bool is_hdr;
 266 };
 267
 268 enum dc_transfer_func_type {
 269         TF_TYPE_PREDEFINED,
 270         TF_TYPE_DISTRIBUTED_POINTS,
 271         TF_TYPE_BYPASS
 272 };
 273
 274 struct dc_transfer_func_distributed_points {
 275         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 276         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 277         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 278
 279         uint16_t end_exponent;
 280         uint16_t x_point_at_y1_red;
 281         uint16_t x_point_at_y1_green;
 282         uint16_t x_point_at_y1_blue;
 283 };
 284
 285 enum dc_transfer_func_predefined {
 286         TRANSFER_FUNCTION_SRGB,
 287         TRANSFER_FUNCTION_BT709,
 288         TRANSFER_FUNCTION_PQ,
 289         TRANSFER_FUNCTION_LINEAR,
 290 };
 291
 292 struct dc_transfer_func {
 293         struct dc_transfer_func_distributed_points tf_pts;
 294         enum dc_transfer_func_type type;
 295         enum dc_transfer_func_predefined tf;
 296 };
 297
 298 struct dc_surface {
 299         struct dc_plane_address address;
 300
 301         struct scaling_taps scaling_quality;
 302         struct rect src_rect;
 303         struct rect dst_rect;
 304         struct rect clip_rect;
 305
 306         union plane_size plane_size;
 307         union dc_tiling_info tiling_info;
 308
 309         struct dc_plane_dcc_param dcc;
 310         struct dc_hdr_static_metadata hdr_static_ctx;
 311
 312         const struct dc_gamma *gamma_correction;
 313         const struct dc_transfer_func *in_transfer_func;
 314
 315         enum dc_color_space color_space;
 316         enum surface_pixel_format format;
 317         enum dc_rotation_angle rotation;
 318         enum plane_stereo_format stereo_format;
 319
 320         bool per_pixel_alpha;
 321         bool visible;
 322         bool flip_immediate;
 323         bool horizontal_mirror;
 324 };
 325
 326 struct dc_plane_info {
 327         union plane_size plane_size;
 328         union dc_tiling_info tiling_info;
 329         struct dc_plane_dcc_param dcc;
 330         enum surface_pixel_format format;
 331         enum dc_rotation_angle rotation;
 332         enum plane_stereo_format stereo_format;
 333         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 334         bool horizontal_mirror;
 335         bool visible;
 336         bool per_pixel_alpha;
 337 };
 338
 339 struct dc_scaling_info {
 340         struct rect src_rect;
 341         struct rect dst_rect;
 342         struct rect clip_rect;
 343         struct scaling_taps scaling_quality;
 344 };
 345
 346 struct dc_surface_update {
 347         const struct dc_surface *surface;
 348
 349         /* isr safe update parameters.  null means no updates */
 350         struct dc_flip_addrs *flip_addr;
 351         struct dc_plane_info *plane_info;
 352         struct dc_scaling_info *scaling_info;
 353         /* following updates require alloc/sleep/spin that is not isr safe,
 354          * null means no updates
 355          */
 356         /* gamma TO BE REMOVED */
 357         struct dc_gamma *gamma;
 358         struct dc_transfer_func *in_transfer_func;
 359         struct dc_hdr_static_metadata *hdr_static_metadata;
 360 };
 361 /*
 362  * This structure is filled in by dc_surface_get_status and contains
 363  * the last requested address and the currently active address so the called
 364  * can determine if there are any outstanding flips
 365  */
 366 struct dc_surface_status {
 367         struct dc_plane_address requested_address;
 368         struct dc_plane_address current_address;
 369         bool is_flip_pending;
 370         bool is_right_eye;
 371 };
 372
 373 /*
 374  * Create a new surface with default parameters;
 375  */
 376 struct dc_surface *dc_create_surface(const struct dc *dc);
 377 const struct dc_surface_status *dc_surface_get_status(
 378                 const struct dc_surface *dc_surface);
 379
 380 void dc_surface_retain(const struct dc_surface *dc_surface);
 381 void dc_surface_release(const struct dc_surface *dc_surface);
 382
 383 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 384 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 385 struct dc_gamma *dc_create_gamma(void);
 386
 387 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 388 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 389 struct dc_transfer_func *dc_create_transfer_func(void);
 390
 391 /*
 392  * This structure holds a surface address.  There could be multiple addresses
 393  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 394  * as frame durations and DCC format can also be set.
 395  */
 396 struct dc_flip_addrs {
 397         struct dc_plane_address address;
 398         bool flip_immediate;
 399         /* TODO: add flip duration for FreeSync */
 400 };
 401
 402 /*
 403  * Set up surface attributes and associate to a stream
 404  * The surfaces parameter is an absolute set of all surface active for the stream.
 405  * If no surfaces are provided, the stream will be blanked; no memory read.
 406  * Any flip related attribute changes must be done through this interface.
 407  *
 408  * After this call:
 409  *   Surfaces attributes are programmed and configured to be composed into stream.
 410  *   This does not trigger a flip.  No surface address is programmed.
 411  */
 412
 413 bool dc_commit_surfaces_to_stream(
 414                 struct dc *dc,
 415                 const struct dc_surface **dc_surfaces,
 416                 uint8_t surface_count,
 417                 const struct dc_stream *stream);
 418
 419 bool dc_post_update_surfaces_to_stream(
 420                 struct dc *dc);
 421
 422 /* Surface update type is used by dc_update_surfaces_and_stream
 423  * The update type is determined at the very beginning of the function based
 424  * on parameters passed in and decides how much programming (or updating) is
 425  * going to be done during the call.
 426  *
 427  * UPDATE_TYPE_FAST is used for really fast updates that do not require much
 428  * logical calculations or hardware register programming. This update MUST be
 429  * ISR safe on windows. Currently fast update will only be used to flip surface
 430  * address.
 431  *
 432  * UPDATE_TYPE_MED is used for slower updates which require significant hw
 433  * re-programming however do not affect bandwidth consumption or clock
 434  * requirements. At present, this is the level at which front end updates
 435  * that do not require us to run bw_calcs happen. These are in/out transfer func
 436  * updates, viewport offset changes, recout size changes and pixel depth changes.
 437  * This update can be done at ISR, but we want to minimize how often this happens.
 438  *
 439  * UPDATE_TYPE_FULL is slow. Really slow. This requires us to recalculate our
 440  * bandwidth and clocks, possibly rearrange some pipes and reprogram anything front
 441  * end related. Any time viewport dimensions, recout dimensions, scaling ratios or
 442  * gamma need to be adjusted or pipe needs to be turned on (or disconnected) we do
 443  * a full update. This cannot be done at ISR level and should be a rare event.
 444  * Unless someone is stress testing mpo enter/exit, playing with colour or adjusting
 445  * underscan we don't expect to see this call at all.
 446  */
 447
 448 enum surface_update_type {
 449         UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
 450         UPDATE_TYPE_MED,  /* ISR safe, most of programming needed, no bw/clk change*/
 451         UPDATE_TYPE_FULL, /* may need to shuffle resources */
 452 };
 453
 454 /*******************************************************************************
 455  * Stream Interfaces
 456  ******************************************************************************/
 457 struct dc_stream {
 458         const struct dc_sink *sink;
 459         struct dc_crtc_timing timing;
 460
 461         struct rect src; /* composition area */
 462         struct rect dst; /* stream addressable area */
 463
 464         struct audio_info audio_info;
 465
 466         struct freesync_context freesync_ctx;
 467
 468         const struct dc_transfer_func *out_transfer_func;
 469         struct colorspace_transform gamut_remap_matrix;
 470         struct csc_transform csc_color_matrix;
 471
 472         enum signal_type output_signal;
 473
 474         enum dc_color_space output_color_space;
 475         enum dc_dither_option dither_option;
 476
 477         enum view_3d_format view_format;
 478
 479         bool ignore_msa_timing_param;
 480         /* TODO: custom INFO packets */
 481         /* TODO: ABM info (DMCU) */
 482         /* TODO: PSR info */
 483         /* TODO: CEA VIC */
 484 };
 485
 486 struct dc_stream_update {
 487         struct rect src;
 488         struct rect dst;
 489         struct dc_transfer_func *out_transfer_func;
 490 };
 491
 492
 493 /*
 494  * Setup stream attributes if no stream updates are provided
 495  * there will be no impact on the stream parameters
 496  *
 497  * Set up surface attributes and associate to a stream
 498  * The surfaces parameter is an absolute set of all surface active for the stream.
 499  * If no surfaces are provided, the stream will be blanked; no memory read.
 500  * Any flip related attribute changes must be done through this interface.
 501  *
 502  * After this call:
 503  *   Surfaces attributes are programmed and configured to be composed into stream.
 504  *   This does not trigger a flip.  No surface address is programmed.
 505  *
 506  */
 507
 508 void dc_update_surfaces_and_stream(struct dc *dc,
 509                 struct dc_surface_update *surface_updates, int surface_count,
 510                 const struct dc_stream *dc_stream,
 511                 struct dc_stream_update *stream_update);
 512
 513 /*
 514  * Log the current stream state.
 515  */
 516 void dc_stream_log(
 517         const struct dc_stream *stream,
 518         struct dal_logger *dc_logger,
 519         enum dc_log_type log_type);
 520
 521 uint8_t dc_get_current_stream_count(const struct dc *dc);
 522 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 523
 524 /*
 525  * Return the current frame counter.
 526  */
 527 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 528
 529 /* TODO: Return parsed values rather than direct register read
 530  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 531  * being refactored properly to be dce-specific
 532  */
 533 bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
 534                                   uint32_t *v_blank_start,
 535                                   uint32_t *v_blank_end,
 536                                   uint32_t *h_position,
 537                                   uint32_t *v_position);
 538
 539 /*
 540  * Structure to store surface/stream associations for validation
 541  */
 542 struct dc_validation_set {
 543         const struct dc_stream *stream;
 544         const struct dc_surface *surfaces[MAX_SURFACES];
 545         uint8_t surface_count;
 546 };
 547
 548 /*
 549  * This function takes a set of resources and checks that they are cofunctional.
 550  *
 551  * After this call:
 552  *   No hardware is programmed for call.  Only validation is done.
 553  */
 554 struct validate_context *dc_get_validate_context(
 555                 const struct dc *dc,
 556                 const struct dc_validation_set set[],
 557                 uint8_t set_count);
 558
 559 bool dc_validate_resources(
 560                 const struct dc *dc,
 561                 const struct dc_validation_set set[],
 562                 uint8_t set_count);
 563
 564 /*
 565  * This function takes a stream and checks if it is guaranteed to be supported.
 566  * Guaranteed means that MAX_COFUNC similar streams are supported.
 567  *
 568  * After this call:
 569  *   No hardware is programmed for call.  Only validation is done.
 570  */
 571
 572 bool dc_validate_guaranteed(
 573                 const struct dc *dc,
 574                 const struct dc_stream *stream);
 575
 576 void dc_resource_validate_ctx_copy_construct(
 577                 const struct validate_context *src_ctx,
 578                 struct validate_context *dst_ctx);
 579
 580 void dc_resource_validate_ctx_destruct(struct validate_context *context);
 581
 582 /*
 583  * Set up streams and links associated to drive sinks
 584  * The streams parameter is an absolute set of all active streams.
 585  *
 586  * After this call:
 587  *   Phy, Encoder, Timing Generator are programmed and enabled.
 588  *   New streams are enabled with blank stream; no memory read.
 589  */
 590 bool dc_commit_streams(
 591                 struct dc *dc,
 592                 const struct dc_stream *streams[],
 593                 uint8_t stream_count);
 594 /*
 595  * Enable stereo when commit_streams is not required,
 596  * for example, frame alternate.
 597  */
 598 bool dc_enable_stereo(
 599         struct dc *dc,
 600         struct validate_context *context,
 601         const struct dc_stream *streams[],
 602         uint8_t stream_count);
 603
 604 /**
 605  * Create a new default stream for the requested sink
 606  */
 607 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 608
 609 void dc_stream_retain(const struct dc_stream *dc_stream);
 610 void dc_stream_release(const struct dc_stream *dc_stream);
 611
 612 struct dc_stream_status {
 613         int primary_otg_inst;
 614         int surface_count;
 615         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 616
 617         /*
 618          * link this stream passes through
 619          */
 620         const struct dc_link *link;
 621 };
 622
 623 const struct dc_stream_status *dc_stream_get_status(
 624         const struct dc_stream *dc_stream);
 625
 626 enum surface_update_type dc_check_update_surfaces_for_stream(
 627                 struct dc *dc,
 628                 struct dc_surface_update *updates,
 629                 int surface_count,
 630                 struct dc_stream_update *stream_update,
 631                 const struct dc_stream_status *stream_status);
 632
 633 /*******************************************************************************
 634  * Link Interfaces
 635  ******************************************************************************/
 636
 637 /*
 638  * A link contains one or more sinks and their connected status.
 639  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 640  */
 641 struct dc_link {
 642         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 643         unsigned int sink_count;
 644         const struct dc_sink *local_sink;
 645         unsigned int link_index;
 646         enum dc_connection_type type;
 647         enum signal_type connector_signal;
 648         enum dc_irq_source irq_source_hpd;
 649         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 650         /* caps is the same as reported_link_cap. link_traing use
 651          * reported_link_cap. Will clean up.  TODO
 652          */
 653         struct dc_link_settings reported_link_cap;
 654         struct dc_link_settings verified_link_cap;
 655         struct dc_link_settings max_link_setting;
 656         struct dc_link_settings cur_link_settings;
 657         struct dc_lane_settings cur_lane_setting;
 658
 659         uint8_t ddc_hw_inst;
 660
 661         uint8_t hpd_src;
 662
 663         uint8_t link_enc_hw_inst;
 664
 665         bool test_pattern_enabled;
 666         union compliance_test_state compliance_test_state;
 667
 668         void *priv;
 669
 670         struct ddc_service *ddc;
 671
 672         bool aux_mode;
 673 };
 674
 675 struct dpcd_caps {
 676         union dpcd_rev dpcd_rev;
 677         union max_lane_count max_ln_count;
 678         union max_down_spread max_down_spread;
 679
 680         /* dongle type (DP converter, CV smart dongle) */
 681         enum display_dongle_type dongle_type;
 682         /* Dongle's downstream count. */
 683         union sink_count sink_count;
 684         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 685         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 686         struct dc_dongle_caps dongle_caps;
 687
 688         uint32_t sink_dev_id;
 689         uint32_t branch_dev_id;
 690         int8_t branch_dev_name[6];
 691         int8_t branch_hw_revision;
 692
 693         bool allow_invalid_MSA_timing_param;
 694         bool panel_mode_edp;
 695 };
 696
 697 struct dc_link_status {
 698         struct dpcd_caps *dpcd_caps;
 699 };
 700
 701 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 702
 703 /*
 704  * Return an enumerated dc_link.  dc_link order is constant and determined at
 705  * boot time.  They cannot be created or destroyed.
 706  * Use dc_get_caps() to get number of links.
 707  */
 708 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 709
 710 /* Return id of physical connector represented by a dc_link at link_index.*/
 711 const struct graphics_object_id dc_get_link_id_at_index(
 712                 struct dc *dc, uint32_t link_index);
 713
 714 /* Set backlight level of an embedded panel (eDP, LVDS). */
 715 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 716                 uint32_t frame_ramp, const struct dc_stream *stream);
 717
 718 bool dc_link_set_abm_disable(const struct dc_link *dc_link);
 719
 720 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 721
 722 bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
 723
 724 bool dc_link_setup_psr(const struct dc_link *dc_link,
 725                 const struct dc_stream *stream, struct psr_config *psr_config,
 726                 struct psr_context *psr_context);
 727
 728 /* Request DC to detect if there is a Panel connected.
 729  * boot - If this call is during initial boot.
 730  * Return false for any type of detection failure or MST detection
 731  * true otherwise. True meaning further action is required (status update
 732  * and OS notification).
 733  */
 734 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 735
 736 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 737  * Return:
 738  * true - Downstream port status changed. DM should call DC to do the
 739  * detection.
 740  * false - no change in Downstream port status. No further action required
 741  * from DM. */
 742 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 743
 744 struct dc_sink_init_data;
 745
 746 struct dc_sink *dc_link_add_remote_sink(
 747                 const struct dc_link *dc_link,
 748                 const uint8_t *edid,
 749                 int len,
 750                 struct dc_sink_init_data *init_data);
 751
 752 void dc_link_remove_remote_sink(
 753         const struct dc_link *link,
 754         const struct dc_sink *sink);
 755
 756 /* Used by diagnostics for virtual link at the moment */
 757 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 758
 759 void dc_link_dp_set_drive_settings(
 760         const struct dc_link *link,
 761         struct link_training_settings *lt_settings);
 762
 763 bool dc_link_dp_perform_link_training(
 764         struct dc_link *link,
 765         const struct dc_link_settings *link_setting,
 766         bool skip_video_pattern);
 767
 768 void dc_link_dp_enable_hpd(const struct dc_link *link);
 769
 770 void dc_link_dp_disable_hpd(const struct dc_link *link);
 771
 772 bool dc_link_dp_set_test_pattern(
 773         const struct dc_link *link,
 774         enum dp_test_pattern test_pattern,
 775         const struct link_training_settings *p_link_settings,
 776         const unsigned char *p_custom_pattern,
 777         unsigned int cust_pattern_size);
 778
 779 /*******************************************************************************
 780  * Sink Interfaces - A sink corresponds to a display output device
 781  ******************************************************************************/
 782
 783 struct dc_container_id {
 784         // 128bit GUID in binary form
 785         unsigned char  guid[16];
 786         // 8 byte port ID -> ELD.PortID
 787         unsigned int   portId[2];
 788         // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
 789         unsigned short manufacturerName;
 790         // 2 byte product code -> ELD.ProductCode
 791         unsigned short productCode;
 792 };
 793
 794
 795
 796 /*
 797  * The sink structure contains EDID and other display device properties
 798  */
 799 struct dc_sink {
 800         enum signal_type sink_signal;
 801         struct dc_edid dc_edid; /* raw edid */
 802         struct dc_edid_caps edid_caps; /* parse display caps */
 803         struct dc_container_id *dc_container_id;
 804         uint32_t dongle_max_pix_clk;
 805         void *priv;
 806         struct stereo_3d_features features_3d[TIMING_3D_FORMAT_MAX];
 807         bool converter_disable_audio;
 808 };
 809
 810 void dc_sink_retain(const struct dc_sink *sink);
 811 void dc_sink_release(const struct dc_sink *sink);
 812
 813 const struct audio **dc_get_audios(struct dc *dc);
 814
 815 struct dc_sink_init_data {
 816         enum signal_type sink_signal;
 817         const struct dc_link *link;
 818         uint32_t dongle_max_pix_clk;
 819         bool converter_disable_audio;
 820 };
 821
 822 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 823 bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id);
 824 bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id);
 825
 826 /*******************************************************************************
 827  * Cursor interfaces - To manages the cursor within a stream
 828  ******************************************************************************/
 829 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 830 bool dc_stream_set_cursor_attributes(
 831         const struct dc_stream *stream,
 832         const struct dc_cursor_attributes *attributes);
 833
 834 bool dc_stream_set_cursor_position(
 835         const struct dc_stream *stream,
 836         const struct dc_cursor_position *position);
 837
 838 /* Newer interfaces  */
 839 struct dc_cursor {
 840         struct dc_plane_address address;
 841         struct dc_cursor_attributes attributes;
 842 };
 843
 844 /*******************************************************************************
 845  * Interrupt interfaces
 846  ******************************************************************************/
 847 enum dc_irq_source dc_interrupt_to_irq_source(
 848                 struct dc *dc,
 849                 uint32_t src_id,
 850                 uint32_t ext_id);
 851 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 852 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 853 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 854                 struct dc *dc, uint32_t link_index);
 855
 856 /*******************************************************************************
 857  * Power Interfaces
 858  ******************************************************************************/
 859
 860 void dc_set_power_state(
 861                 struct dc *dc,
 862                 enum dc_acpi_cm_power_state power_state);
 863 void dc_resume(const struct dc *dc);
 864
 865 /*
 866  * DPCD access interfaces
 867  */
 868
 869 bool dc_read_aux_dpcd(
 870                 struct dc *dc,
 871                 uint32_t link_index,
 872                 uint32_t address,
 873                 uint8_t *data,
 874                 uint32_t size);
 875
 876 bool dc_write_aux_dpcd(
 877                 struct dc *dc,
 878                 uint32_t link_index,
 879                 uint32_t address,
 880                 const uint8_t *data,
 881                 uint32_t size);
 882
 883 bool dc_read_aux_i2c(
 884                 struct dc *dc,
 885                 uint32_t link_index,
 886                 enum i2c_mot_mode mot,
 887                 uint32_t address,
 888                 uint8_t *data,
 889                 uint32_t size);
 890
 891 bool dc_write_aux_i2c(
 892                 struct dc *dc,
 893                 uint32_t link_index,
 894                 enum i2c_mot_mode mot,
 895                 uint32_t address,
 896                 const uint8_t *data,
 897                 uint32_t size);
 898
 899 bool dc_query_ddc_data(
 900                 struct dc *dc,
 901                 uint32_t link_index,
 902                 uint32_t address,
 903                 uint8_t *write_buf,
 904                 uint32_t write_size,
 905                 uint8_t *read_buf,
 906                 uint32_t read_size);
 907
 908 bool dc_submit_i2c(
 909                 struct dc *dc,
 910                 uint32_t link_index,
 911                 struct i2c_command *cmd);
 912
 913
 914 #endif /* DC_INTERFACE_H_ */