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1 /*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #ifndef DC_INTERFACE_H_
27 #define DC_INTERFACE_H_
28
29 #include "dc_types.h"
30 #include "grph_object_defs.h"
31 #include "logger_types.h"
32 #include "gpio_types.h"
33 #include "link_service_types.h"
34
35 #define MAX_SURFACES 3
36 #define MAX_STREAMS 6
37 #define MAX_SINKS_PER_LINK 4
38
39 /*******************************************************************************
40 * Display Core Interfaces
41 ******************************************************************************/
42
43 struct dc_caps {
44 uint32_t max_streams;
45 uint32_t max_links;
46 uint32_t max_audios;
47 uint32_t max_slave_planes;
48 uint32_t max_downscale_ratio;
49 uint32_t i2c_speed_in_khz;
50 };
51
52
53 struct dc_dcc_surface_param {
54 enum surface_pixel_format format;
55 struct dc_size surface_size;
56 enum dc_scan_direction scan;
57 };
58
59 struct dc_dcc_setting {
60 unsigned int max_compressed_blk_size;
61 unsigned int max_uncompressed_blk_size;
62 bool independent_64b_blks;
63 };
64
65 struct dc_surface_dcc_cap {
66 bool capable;
67 bool const_color_support;
68
69 union {
70 struct {
71 struct dc_dcc_setting rgb;
72 } grph;
73
74 struct {
75 struct dc_dcc_setting luma;
76 struct dc_dcc_setting chroma;
77 } video;
78 };
79 };
80
81 /* Forward declaration*/
82 struct dc;
83 struct dc_surface;
84 struct validate_context;
85
86 struct dc_cap_funcs {
87 int i;
88 };
89
90 struct dc_stream_funcs {
91 bool (*adjust_vmin_vmax)(struct dc *dc,
92 const struct dc_stream **stream,
93 int num_streams,
94 int vmin,
95 int vmax);
96
97 void (*stream_update_scaling)(const struct dc *dc,
98 const struct dc_stream *dc_stream,
99 const struct rect *src,
100 const struct rect *dst);
101 bool (*set_gamut_remap)(struct dc *dc,
102 const struct dc_stream **stream, int num_streams);
103 bool (*set_psr_enable)(struct dc *dc, bool enable);
104 bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
105 };
106
107 struct link_training_settings;
108
109 struct dc_link_funcs {
110 void (*set_drive_settings)(struct dc *dc,
111 struct link_training_settings *lt_settings,
112 const struct dc_link *link);
113 void (*perform_link_training)(struct dc *dc,
114 struct dc_link_settings *link_setting,
115 bool skip_video_pattern);
116 void (*set_preferred_link_settings)(struct dc *dc,
117 struct dc_link_settings *link_setting,
118 const struct dc_link *link);
119 void (*enable_hpd)(const struct dc_link *link);
120 void (*disable_hpd)(const struct dc_link *link);
121 void (*set_test_pattern)(
122 const struct dc_link *link,
123 enum dp_test_pattern test_pattern,
124 const struct link_training_settings *p_link_settings,
125 const unsigned char *p_custom_pattern,
126 unsigned int cust_pattern_size);
127 };
128
129 /* Structure to hold configuration flags set by dm at dc creation. */
130 struct dc_config {
131 bool gpu_vm_support;
132 bool disable_disp_pll_sharing;
133 };
134
135 struct dc_debug {
136 bool surface_visual_confirm;
137 bool max_disp_clk;
138 bool surface_trace;
139 bool timing_trace;
140 bool validation_trace;
141 bool disable_stutter;
142 bool disable_dcc;
143 bool disable_dfs_bypass;
144 bool disable_clock_gate;
145 bool disable_dmcu;
146 };
147
148 struct dc {
149 struct dc_caps caps;
150 struct dc_cap_funcs cap_funcs;
151 struct dc_stream_funcs stream_funcs;
152 struct dc_link_funcs link_funcs;
153 struct dc_config config;
154 struct dc_debug debug;
155 };
156
157 struct dc_init_data {
158 struct hw_asic_id asic_id;
159 void *driver; /* ctx */
160 struct cgs_device *cgs_device;
161
162 int num_virtual_links;
163 /*
164 * If 'vbios_override' not NULL, it will be called instead
165 * of the real VBIOS. Intended use is Diagnostics on FPGA.
166 */
167 struct dc_bios *vbios_override;
168 enum dce_environment dce_environment;
169
170 struct dc_config flags;
171 };
172
173 struct dc *dc_create(const struct dc_init_data *init_params);
174
175 void dc_destroy(struct dc **dc);
176
177 /*******************************************************************************
178 * Surface Interfaces
179 ******************************************************************************/
180
181 enum {
182 TRANSFER_FUNC_POINTS = 1025
183 };
184
185 struct dc_hdr_static_metadata {
186 bool is_hdr;
187
188 /* display chromaticities and white point in units of 0.00001 */
189 unsigned int chromaticity_green_x;
190 unsigned int chromaticity_green_y;
191 unsigned int chromaticity_blue_x;
192 unsigned int chromaticity_blue_y;
193 unsigned int chromaticity_red_x;
194 unsigned int chromaticity_red_y;
195 unsigned int chromaticity_white_point_x;
196 unsigned int chromaticity_white_point_y;
197
198 uint32_t min_luminance;
199 uint32_t max_luminance;
200 uint32_t maximum_content_light_level;
201 uint32_t maximum_frame_average_light_level;
202 };
203
204 enum dc_transfer_func_type {
205 TF_TYPE_PREDEFINED,
206 TF_TYPE_DISTRIBUTED_POINTS,
207 };
208
209 struct dc_transfer_func_distributed_points {
210 struct fixed31_32 red[TRANSFER_FUNC_POINTS];
211 struct fixed31_32 green[TRANSFER_FUNC_POINTS];
212 struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
213
214 uint16_t end_exponent;
215 uint16_t x_point_at_y1_red;
216 uint16_t x_point_at_y1_green;
217 uint16_t x_point_at_y1_blue;
218 };
219
220 enum dc_transfer_func_predefined {
221 TRANSFER_FUNCTION_SRGB,
222 TRANSFER_FUNCTION_BT709,
223 TRANSFER_FUNCTION_PQ,
224 TRANSFER_FUNCTION_LINEAR,
225 };
226
227 struct dc_transfer_func {
228 enum dc_transfer_func_type type;
229 enum dc_transfer_func_predefined tf;
230 struct dc_transfer_func_distributed_points tf_pts;
231 };
232
233 struct dc_surface {
234 bool visible;
235 bool flip_immediate;
236 struct dc_plane_address address;
237
238 struct scaling_taps scaling_quality;
239 struct rect src_rect;
240 struct rect dst_rect;
241 struct rect clip_rect;
242
243 union plane_size plane_size;
244 union dc_tiling_info tiling_info;
245 struct dc_plane_dcc_param dcc;
246 enum dc_color_space color_space;
247
248 enum surface_pixel_format format;
249 enum dc_rotation_angle rotation;
250 bool horizontal_mirror;
251 enum plane_stereo_format stereo_format;
252
253 struct dc_hdr_static_metadata hdr_static_ctx;
254
255 const struct dc_gamma *gamma_correction;
256 const struct dc_transfer_func *in_transfer_func;
257 };
258
259 struct dc_plane_info {
260 union plane_size plane_size;
261 union dc_tiling_info tiling_info;
262 struct dc_plane_dcc_param dcc;
263 enum surface_pixel_format format;
264 enum dc_rotation_angle rotation;
265 bool horizontal_mirror;
266 enum plane_stereo_format stereo_format;
267 enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
268 bool visible;
269 };
270
271 struct dc_scaling_info {
272 struct rect src_rect;
273 struct rect dst_rect;
274 struct rect clip_rect;
275 struct scaling_taps scaling_quality;
276 };
277
278 struct dc_surface_update {
279 const struct dc_surface *surface;
280
281 /* isr safe update parameters. null means no updates */
282 struct dc_flip_addrs *flip_addr;
283 struct dc_plane_info *plane_info;
284 struct dc_scaling_info *scaling_info;
285 /* following updates require alloc/sleep/spin that is not isr safe,
286 * null means no updates
287 */
288 /* gamma TO BE REMOVED */
289 struct dc_gamma *gamma;
290 struct dc_hdr_static_metadata *hdr_static_metadata;
291 struct dc_transfer_func *in_transfer_func;
292 struct dc_transfer_func *out_transfer_func;
293
294
295 };
296 /*
297 * This structure is filled in by dc_surface_get_status and contains
298 * the last requested address and the currently active address so the called
299 * can determine if there are any outstanding flips
300 */
301 struct dc_surface_status {
302 struct dc_plane_address requested_address;
303 struct dc_plane_address current_address;
304 bool is_flip_pending;
305 };
306
307 /*
308 * Create a new surface with default parameters;
309 */
310 struct dc_surface *dc_create_surface(const struct dc *dc);
311 const struct dc_surface_status *dc_surface_get_status(
312 const struct dc_surface *dc_surface);
313
314 void dc_surface_retain(const struct dc_surface *dc_surface);
315 void dc_surface_release(const struct dc_surface *dc_surface);
316
317 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
318 void dc_gamma_release(const struct dc_gamma **dc_gamma);
319 struct dc_gamma *dc_create_gamma(void);
320
321 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
322 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
323 struct dc_transfer_func *dc_create_transfer_func(void);
324
325 /*
326 * This structure holds a surface address. There could be multiple addresses
327 * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such
328 * as frame durations and DCC format can also be set.
329 */
330 struct dc_flip_addrs {
331 struct dc_plane_address address;
332 bool flip_immediate;
333 /* TODO: add flip duration for FreeSync */
334 };
335
336 /*
337 * Optimized flip address update function.
338 *
339 * After this call:
340 * Surface addresses and flip attributes are programmed.
341 * Surface flip occur at next configured time (h_sync or v_sync flip)
342 */
343 void dc_flip_surface_addrs(struct dc *dc,
344 const struct dc_surface *const surfaces[],
345 struct dc_flip_addrs flip_addrs[],
346 uint32_t count);
347
348 /*
349 * Set up surface attributes and associate to a stream
350 * The surfaces parameter is an absolute set of all surface active for the stream.
351 * If no surfaces are provided, the stream will be blanked; no memory read.
352 * Any flip related attribute changes must be done through this interface.
353 *
354 * After this call:
355 * Surfaces attributes are programmed and configured to be composed into stream.
356 * This does not trigger a flip. No surface address is programmed.
357 */
358
359 bool dc_commit_surfaces_to_stream(
360 struct dc *dc,
361 const struct dc_surface **dc_surfaces,
362 uint8_t surface_count,
363 const struct dc_stream *stream);
364
365 bool dc_pre_update_surfaces_to_stream(
366 struct dc *dc,
367 const struct dc_surface *const *new_surfaces,
368 uint8_t new_surface_count,
369 const struct dc_stream *stream);
370
371 bool dc_post_update_surfaces_to_stream(
372 struct dc *dc);
373
374 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
375 int surface_count, const struct dc_stream *stream);
376
377 /*******************************************************************************
378 * Stream Interfaces
379 ******************************************************************************/
380 struct dc_stream {
381 const struct dc_sink *sink;
382 struct dc_crtc_timing timing;
383
384 enum dc_color_space output_color_space;
385
386 struct rect src; /* composition area */
387 struct rect dst; /* stream addressable area */
388
389 struct audio_info audio_info;
390
391 bool ignore_msa_timing_param;
392
393 struct freesync_context freesync_ctx;
394
395 const struct dc_transfer_func *out_transfer_func;
396 struct colorspace_transform gamut_remap_matrix;
397 struct csc_transform csc_color_matrix;
398
399 /* TODO: dithering */
400 /* TODO: custom INFO packets */
401 /* TODO: ABM info (DMCU) */
402 /* TODO: PSR info */
403 /* TODO: CEA VIC */
404 };
405
406 /*
407 * Log the current stream state.
408 */
409 void dc_stream_log(
410 const struct dc_stream *stream,
411 struct dal_logger *dc_logger,
412 enum dc_log_type log_type);
413
414 uint8_t dc_get_current_stream_count(const struct dc *dc);
415 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
416
417 /*
418 * Return the current frame counter.
419 */
420 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
421
422 /* TODO: Return parsed values rather than direct register read
423 * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
424 * being refactored properly to be dce-specific
425 */
426 uint32_t dc_stream_get_scanoutpos(
427 const struct dc_stream *stream, uint32_t *vbl, uint32_t *position);
428
429 /*
430 * Structure to store surface/stream associations for validation
431 */
432 struct dc_validation_set {
433 const struct dc_stream *stream;
434 const struct dc_surface *surfaces[MAX_SURFACES];
435 uint8_t surface_count;
436 };
437
438 /*
439 * This function takes a set of resources and checks that they are cofunctional.
440 *
441 * After this call:
442 * No hardware is programmed for call. Only validation is done.
443 */
444 bool dc_validate_resources(
445 const struct dc *dc,
446 const struct dc_validation_set set[],
447 uint8_t set_count);
448
449 /*
450 * This function takes a stream and checks if it is guaranteed to be supported.
451 * Guaranteed means that MAX_COFUNC similar streams are supported.
452 *
453 * After this call:
454 * No hardware is programmed for call. Only validation is done.
455 */
456
457 bool dc_validate_guaranteed(
458 const struct dc *dc,
459 const struct dc_stream *stream);
460
461 /*
462 * Set up streams and links associated to drive sinks
463 * The streams parameter is an absolute set of all active streams.
464 *
465 * After this call:
466 * Phy, Encoder, Timing Generator are programmed and enabled.
467 * New streams are enabled with blank stream; no memory read.
468 */
469 bool dc_commit_streams(
470 struct dc *dc,
471 const struct dc_stream *streams[],
472 uint8_t stream_count);
473
474 /**
475 * Create a new default stream for the requested sink
476 */
477 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
478
479 void dc_stream_retain(const struct dc_stream *dc_stream);
480 void dc_stream_release(const struct dc_stream *dc_stream);
481
482 struct dc_stream_status {
483 int primary_otg_inst;
484 int surface_count;
485 const struct dc_surface *surfaces[MAX_SURFACE_NUM];
486
487 /*
488 * link this stream passes through
489 */
490 const struct dc_link *link;
491 };
492
493 const struct dc_stream_status *dc_stream_get_status(
494 const struct dc_stream *dc_stream);
495
496 /*******************************************************************************
497 * Link Interfaces
498 ******************************************************************************/
499
500 /*
501 * A link contains one or more sinks and their connected status.
502 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
503 */
504 struct dc_link {
505 const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
506 unsigned int sink_count;
507 const struct dc_sink *local_sink;
508 unsigned int link_index;
509 enum dc_connection_type type;
510 enum signal_type connector_signal;
511 enum dc_irq_source irq_source_hpd;
512 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
513 /* caps is the same as reported_link_cap. link_traing use
514 * reported_link_cap. Will clean up. TODO
515 */
516 struct dc_link_settings reported_link_cap;
517 struct dc_link_settings verified_link_cap;
518 struct dc_link_settings max_link_setting;
519 struct dc_link_settings cur_link_settings;
520 struct dc_lane_settings cur_lane_setting;
521
522 uint8_t ddc_hw_inst;
523 uint8_t link_enc_hw_inst;
524
525 struct psr_caps psr_caps;
526 bool test_pattern_enabled;
527 union compliance_test_state compliance_test_state;
528 };
529
530 struct dpcd_caps {
531 union dpcd_rev dpcd_rev;
532 union max_lane_count max_ln_count;
533 union max_down_spread max_down_spread;
534
535 /* dongle type (DP converter, CV smart dongle) */
536 enum display_dongle_type dongle_type;
537 /* Dongle's downstream count. */
538 union sink_count sink_count;
539 /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
540 indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
541 bool is_dp_hdmi_s3d_converter;
542
543 bool allow_invalid_MSA_timing_param;
544 bool panel_mode_edp;
545 uint32_t sink_dev_id;
546 uint32_t branch_dev_id;
547 int8_t branch_dev_name[6];
548 int8_t branch_hw_revision;
549 };
550
551 struct dc_link_status {
552 struct dpcd_caps *dpcd_caps;
553 };
554
555 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
556
557 /*
558 * Return an enumerated dc_link. dc_link order is constant and determined at
559 * boot time. They cannot be created or destroyed.
560 * Use dc_get_caps() to get number of links.
561 */
562 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
563
564 /* Return id of physical connector represented by a dc_link at link_index.*/
565 const struct graphics_object_id dc_get_link_id_at_index(
566 struct dc *dc, uint32_t link_index);
567
568 /* Set backlight level of an embedded panel (eDP, LVDS). */
569 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
570 uint32_t frame_ramp, const struct dc_stream *stream);
571
572 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
573
574 bool dc_link_setup_psr(const struct dc_link *dc_link,
575 const struct dc_stream *stream);
576
577 /* Request DC to detect if there is a Panel connected.
578 * boot - If this call is during initial boot.
579 * Return false for any type of detection failure or MST detection
580 * true otherwise. True meaning further action is required (status update
581 * and OS notification).
582 */
583 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
584
585 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
586 * Return:
587 * true - Downstream port status changed. DM should call DC to do the
588 * detection.
589 * false - no change in Downstream port status. No further action required
590 * from DM. */
591 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
592
593 struct dc_sink_init_data;
594
595 struct dc_sink *dc_link_add_remote_sink(
596 const struct dc_link *dc_link,
597 const uint8_t *edid,
598 int len,
599 struct dc_sink_init_data *init_data);
600
601 void dc_link_remove_remote_sink(
602 const struct dc_link *link,
603 const struct dc_sink *sink);
604
605 /* Used by diagnostics for virtual link at the moment */
606 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
607
608 void dc_link_dp_set_drive_settings(
609 struct dc_link *link,
610 struct link_training_settings *lt_settings);
611
612 bool dc_link_dp_perform_link_training(
613 struct dc_link *link,
614 const struct dc_link_settings *link_setting,
615 bool skip_video_pattern);
616
617 void dc_link_dp_enable_hpd(const struct dc_link *link);
618
619 void dc_link_dp_disable_hpd(const struct dc_link *link);
620
621 bool dc_link_dp_set_test_pattern(
622 const struct dc_link *link,
623 enum dp_test_pattern test_pattern,
624 const struct link_training_settings *p_link_settings,
625 const unsigned char *p_custom_pattern,
626 unsigned int cust_pattern_size);
627
628 /*******************************************************************************
629 * Sink Interfaces - A sink corresponds to a display output device
630 ******************************************************************************/
631
632 /*
633 * The sink structure contains EDID and other display device properties
634 */
635 struct dc_sink {
636 enum signal_type sink_signal;
637 struct dc_edid dc_edid; /* raw edid */
638 struct dc_edid_caps edid_caps; /* parse display caps */
639 };
640
641 void dc_sink_retain(const struct dc_sink *sink);
642 void dc_sink_release(const struct dc_sink *sink);
643
644 const struct audio **dc_get_audios(struct dc *dc);
645
646 struct dc_sink_init_data {
647 enum signal_type sink_signal;
648 const struct dc_link *link;
649 uint32_t dongle_max_pix_clk;
650 bool converter_disable_audio;
651 };
652
653 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
654
655 /*******************************************************************************
656 * Cursor interfaces - To manages the cursor within a stream
657 ******************************************************************************/
658 /* TODO: Deprecated once we switch to dc_set_cursor_position */
659 bool dc_stream_set_cursor_attributes(
660 const struct dc_stream *stream,
661 const struct dc_cursor_attributes *attributes);
662
663 bool dc_stream_set_cursor_position(
664 const struct dc_stream *stream,
665 const struct dc_cursor_position *position);
666
667 /* Newer interfaces */
668 struct dc_cursor {
669 struct dc_plane_address address;
670 struct dc_cursor_attributes attributes;
671 };
672
673 /*******************************************************************************
674 * Interrupt interfaces
675 ******************************************************************************/
676 enum dc_irq_source dc_interrupt_to_irq_source(
677 struct dc *dc,
678 uint32_t src_id,
679 uint32_t ext_id);
680 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
681 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
682 enum dc_irq_source dc_get_hpd_irq_source_at_index(
683 struct dc *dc, uint32_t link_index);
684
685 /*******************************************************************************
686 * Power Interfaces
687 ******************************************************************************/
688
689 void dc_set_power_state(
690 struct dc *dc,
691 enum dc_acpi_cm_power_state power_state,
692 enum dc_video_power_state video_power_state);
693 void dc_resume(const struct dc *dc);
694
695 /*******************************************************************************
696 * DDC Interfaces
697 ******************************************************************************/
698
699 const struct ddc_service *dc_get_ddc_at_index(
700 struct dc *dc, uint32_t link_index);
701
702 /*
703 * DPCD access interfaces
704 */
705
706 bool dc_read_dpcd(
707 struct dc *dc,
708 uint32_t link_index,
709 uint32_t address,
710 uint8_t *data,
711 uint32_t size);
712
713 bool dc_write_dpcd(
714 struct dc *dc,
715 uint32_t link_index,
716 uint32_t address,
717 const uint8_t *data,
718 uint32_t size);
719
720 bool dc_submit_i2c(
721 struct dc *dc,
722 uint32_t link_index,
723 struct i2c_command *cmd);
724
725
726 #endif /* DC_INTERFACE_H_ */