drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_surfaces;
  49         uint32_t max_downscale_ratio;
  50         uint32_t i2c_speed_in_khz;
  51
  52         unsigned int max_cursor_size;
  53 };
  54
  55
  56 struct dc_dcc_surface_param {
  57         enum surface_pixel_format format;
  58         struct dc_size surface_size;
  59         enum swizzle_mode_values swizzle_mode;
  60         enum dc_scan_direction scan;
  61 };
  62
  63 struct dc_dcc_setting {
  64         unsigned int max_compressed_blk_size;
  65         unsigned int max_uncompressed_blk_size;
  66         bool independent_64b_blks;
  67 };
  68
  69 struct dc_surface_dcc_cap {
  70         bool capable;
  71         bool const_color_support;
  72
  73         union {
  74                 struct {
  75                         struct dc_dcc_setting rgb;
  76                 } grph;
  77
  78                 struct {
  79                         struct dc_dcc_setting luma;
  80                         struct dc_dcc_setting chroma;
  81                 } video;
  82         };
  83 };
  84
  85 struct dc_static_screen_events {
  86         bool cursor_update;
  87         bool surface_update;
  88         bool overlay_update;
  89 };
  90
  91 /* Forward declaration*/
  92 struct dc;
  93 struct dc_surface;
  94 struct validate_context;
  95
  96 struct dc_cap_funcs {
  97 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  98         bool (*get_dcc_compression_cap)(const struct dc *dc,
  99                         const struct dc_dcc_surface_param *input,
 100                         struct dc_surface_dcc_cap *output);
 101 #else
 102         int i;
 103 #endif
 104 };
 105
 106 struct dc_stream_funcs {
 107         bool (*adjust_vmin_vmax)(struct dc *dc,
 108                         const struct dc_stream **stream,
 109                         int num_streams,
 110                         int vmin,
 111                         int vmax);
 112         bool (*get_crtc_position)(struct dc *dc,
 113                         const struct dc_stream **stream,
 114                         int num_streams,
 115                         unsigned int *v_pos,
 116                         unsigned int *nom_v_pos);
 117
 118         bool (*set_gamut_remap)(struct dc *dc,
 119                         const struct dc_stream *stream);
 120
 121         void (*set_static_screen_events)(struct dc *dc,
 122                         const struct dc_stream **stream,
 123                         int num_streams,
 124                         const struct dc_static_screen_events *events);
 125
 126         void (*set_dither_option)(const struct dc_stream *stream,
 127                         enum dc_dither_option option);
 128 };
 129
 130 struct link_training_settings;
 131
 132 struct dc_link_funcs {
 133         void (*set_drive_settings)(struct dc *dc,
 134                         struct link_training_settings *lt_settings,
 135                         const struct dc_link *link);
 136         void (*perform_link_training)(struct dc *dc,
 137                         struct dc_link_settings *link_setting,
 138                         bool skip_video_pattern);
 139         void (*set_preferred_link_settings)(struct dc *dc,
 140                         struct dc_link_settings *link_setting,
 141                         const struct dc_link *link);
 142         void (*enable_hpd)(const struct dc_link *link);
 143         void (*disable_hpd)(const struct dc_link *link);
 144         void (*set_test_pattern)(
 145                         const struct dc_link *link,
 146                         enum dp_test_pattern test_pattern,
 147                         const struct link_training_settings *p_link_settings,
 148                         const unsigned char *p_custom_pattern,
 149                         unsigned int cust_pattern_size);
 150 };
 151
 152 /* Structure to hold configuration flags set by dm at dc creation. */
 153 struct dc_config {
 154         bool gpu_vm_support;
 155         bool disable_disp_pll_sharing;
 156 };
 157
 158 struct dc_debug {
 159         bool surface_visual_confirm;
 160         bool max_disp_clk;
 161         bool surface_trace;
 162         bool timing_trace;
 163         bool validation_trace;
 164         bool disable_stutter;
 165         bool disable_dcc;
 166         bool disable_dfs_bypass;
 167 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 168         bool disable_dpp_power_gate;
 169         bool disable_hubp_power_gate;
 170         bool disable_pplib_wm_range;
 171         bool use_dml_wm;
 172         bool use_max_voltage;
 173         int sr_exit_time_ns;
 174         int sr_enter_plus_exit_time_ns;
 175         int urgent_latency_ns;
 176         int percent_of_ideal_drambw;
 177         int dram_clock_change_latency_ns;
 178         int always_scale;
 179 #endif
 180         bool disable_pplib_clock_request;
 181         bool disable_clock_gate;
 182         bool disable_dmcu;
 183         bool force_abm_enable;
 184 };
 185
 186 struct dc {
 187         struct dc_caps caps;
 188         struct dc_cap_funcs cap_funcs;
 189         struct dc_stream_funcs stream_funcs;
 190         struct dc_link_funcs link_funcs;
 191         struct dc_config config;
 192         struct dc_debug debug;
 193 };
 194
 195 enum frame_buffer_mode {
 196         FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
 197         FRAME_BUFFER_MODE_ZFB_ONLY,
 198         FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL,
 199 } ;
 200
 201 struct dchub_init_data {
 202         bool dchub_initialzied;
 203         bool dchub_info_valid;
 204         int64_t zfb_phys_addr_base;
 205         int64_t zfb_mc_base_addr;
 206         uint64_t zfb_size_in_byte;
 207         enum frame_buffer_mode fb_mode;
 208 };
 209
 210 struct dc_init_data {
 211         struct hw_asic_id asic_id;
 212         void *driver; /* ctx */
 213         struct cgs_device *cgs_device;
 214
 215         int num_virtual_links;
 216         /*
 217          * If 'vbios_override' not NULL, it will be called instead
 218          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 219          */
 220         struct dc_bios *vbios_override;
 221         enum dce_environment dce_environment;
 222
 223         struct dc_config flags;
 224 };
 225
 226 struct dc *dc_create(const struct dc_init_data *init_params);
 227
 228 void dc_destroy(struct dc **dc);
 229
 230 bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
 231
 232 /*******************************************************************************
 233  * Surface Interfaces
 234  ******************************************************************************/
 235
 236 enum {
 237         TRANSFER_FUNC_POINTS = 1025
 238 };
 239
 240 struct dc_hdr_static_metadata {
 241         bool hdr_supported;
 242         bool is_hdr;
 243
 244         /* display chromaticities and white point in units of 0.00001 */
 245         unsigned int chromaticity_green_x;
 246         unsigned int chromaticity_green_y;
 247         unsigned int chromaticity_blue_x;
 248         unsigned int chromaticity_blue_y;
 249         unsigned int chromaticity_red_x;
 250         unsigned int chromaticity_red_y;
 251         unsigned int chromaticity_white_point_x;
 252         unsigned int chromaticity_white_point_y;
 253
 254         uint32_t min_luminance;
 255         uint32_t max_luminance;
 256         uint32_t maximum_content_light_level;
 257         uint32_t maximum_frame_average_light_level;
 258 };
 259
 260 enum dc_transfer_func_type {
 261         TF_TYPE_PREDEFINED,
 262         TF_TYPE_DISTRIBUTED_POINTS,
 263         TF_TYPE_BYPASS,
 264         TF_TYPE_UNKNOWN
 265 };
 266
 267 struct dc_transfer_func_distributed_points {
 268         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 269         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 270         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 271
 272         uint16_t end_exponent;
 273         uint16_t x_point_at_y1_red;
 274         uint16_t x_point_at_y1_green;
 275         uint16_t x_point_at_y1_blue;
 276 };
 277
 278 enum dc_transfer_func_predefined {
 279         TRANSFER_FUNCTION_SRGB,
 280         TRANSFER_FUNCTION_BT709,
 281         TRANSFER_FUNCTION_PQ,
 282         TRANSFER_FUNCTION_LINEAR,
 283 };
 284
 285 struct dc_transfer_func {
 286         enum dc_transfer_func_type type;
 287         enum dc_transfer_func_predefined tf;
 288         struct dc_transfer_func_distributed_points tf_pts;
 289 };
 290
 291 struct dc_surface {
 292         bool visible;
 293         bool flip_immediate;
 294         struct dc_plane_address address;
 295
 296         struct scaling_taps scaling_quality;
 297         struct rect src_rect;
 298         struct rect dst_rect;
 299         struct rect clip_rect;
 300
 301         union plane_size plane_size;
 302         union dc_tiling_info tiling_info;
 303         struct dc_plane_dcc_param dcc;
 304         enum dc_color_space color_space;
 305
 306         enum surface_pixel_format format;
 307         enum dc_rotation_angle rotation;
 308         bool horizontal_mirror;
 309         enum plane_stereo_format stereo_format;
 310
 311         struct dc_hdr_static_metadata hdr_static_ctx;
 312
 313         const struct dc_gamma *gamma_correction;
 314         const struct dc_transfer_func *in_transfer_func;
 315 };
 316
 317 struct dc_plane_info {
 318         union plane_size plane_size;
 319         union dc_tiling_info tiling_info;
 320         struct dc_plane_dcc_param dcc;
 321         enum surface_pixel_format format;
 322         enum dc_rotation_angle rotation;
 323         bool horizontal_mirror;
 324         enum plane_stereo_format stereo_format;
 325         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 326         bool visible;
 327 };
 328
 329 struct dc_scaling_info {
 330                 struct rect src_rect;
 331                 struct rect dst_rect;
 332                 struct rect clip_rect;
 333                 struct scaling_taps scaling_quality;
 334 };
 335
 336 struct dc_surface_update {
 337         const struct dc_surface *surface;
 338
 339         /* isr safe update parameters.  null means no updates */
 340         struct dc_flip_addrs *flip_addr;
 341         struct dc_plane_info *plane_info;
 342         struct dc_scaling_info *scaling_info;
 343         /* following updates require alloc/sleep/spin that is not isr safe,
 344          * null means no updates
 345          */
 346         /* gamma TO BE REMOVED */
 347         struct dc_gamma *gamma;
 348         struct dc_transfer_func *in_transfer_func;
 349         struct dc_hdr_static_metadata *hdr_static_metadata;
 350 };
 351 /*
 352  * This structure is filled in by dc_surface_get_status and contains
 353  * the last requested address and the currently active address so the called
 354  * can determine if there are any outstanding flips
 355  */
 356 struct dc_surface_status {
 357         struct dc_plane_address requested_address;
 358         struct dc_plane_address current_address;
 359         bool is_flip_pending;
 360 };
 361
 362 /*
 363  * Create a new surface with default parameters;
 364  */
 365 struct dc_surface *dc_create_surface(const struct dc *dc);
 366 const struct dc_surface_status *dc_surface_get_status(
 367                 const struct dc_surface *dc_surface);
 368
 369 void dc_surface_retain(const struct dc_surface *dc_surface);
 370 void dc_surface_release(const struct dc_surface *dc_surface);
 371
 372 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 373 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 374 struct dc_gamma *dc_create_gamma(void);
 375
 376 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 377 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 378 struct dc_transfer_func *dc_create_transfer_func(void);
 379
 380 /*
 381  * This structure holds a surface address.  There could be multiple addresses
 382  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 383  * as frame durations and DCC format can also be set.
 384  */
 385 struct dc_flip_addrs {
 386         struct dc_plane_address address;
 387         bool flip_immediate;
 388         /* TODO: add flip duration for FreeSync */
 389 };
 390
 391 /*
 392  * Set up surface attributes and associate to a stream
 393  * The surfaces parameter is an absolute set of all surface active for the stream.
 394  * If no surfaces are provided, the stream will be blanked; no memory read.
 395  * Any flip related attribute changes must be done through this interface.
 396  *
 397  * After this call:
 398  *   Surfaces attributes are programmed and configured to be composed into stream.
 399  *   This does not trigger a flip.  No surface address is programmed.
 400  */
 401
 402 bool dc_commit_surfaces_to_stream(
 403                 struct dc *dc,
 404                 const struct dc_surface **dc_surfaces,
 405                 uint8_t surface_count,
 406                 const struct dc_stream *stream);
 407
 408 bool dc_pre_update_surfaces_to_stream(
 409                 struct dc *dc,
 410                 const struct dc_surface *const *new_surfaces,
 411                 uint8_t new_surface_count,
 412                 const struct dc_stream *stream);
 413
 414 bool dc_post_update_surfaces_to_stream(
 415                 struct dc *dc);
 416
 417 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 418                 int surface_count, const struct dc_stream *stream);
 419
 420 /* Surface update type is used by dc_update_surfaces_and_stream
 421  * The update type is determined at the very beginning of the function based
 422  * on parameters passed in and decides how much programming (or updating) is
 423  * going to be done during the call.
 424  *
 425  * UPDATE_TYPE_FAST is used for really fast updates that do not require much
 426  * logical calculations or hardware register programming. This update MUST be
 427  * ISR safe on windows. Currently fast update will only be used to flip surface
 428  * address.
 429  *
 430  * UPDATE_TYPE_MED is used for slower updates which require significant hw
 431  * re-programming however do not affect bandwidth consumption or clock
 432  * requirements. At present, this is the level at which front end updates
 433  * that do not require us to run bw_calcs happen. These are in/out transfer func
 434  * updates, viewport offset changes, recout size changes and pixel depth changes.
 435  * This update can be done at ISR, but we want to minimize how often this happens.
 436  *
 437  * UPDATE_TYPE_FULL is slow. Really slow. This requires us to recalculate our
 438  * bandwidth and clocks, possibly rearrange some pipes and reprogram anything front
 439  * end related. Any time viewport dimensions, recout dimensions, scaling ratios or
 440  * gamma need to be adjusted or pipe needs to be turned on (or disconnected) we do
 441  * a full update. This cannot be done at ISR level and should be a rare event.
 442  * Unless someone is stress testing mpo enter/exit, playing with colour or adjusting
 443  * underscan we don't expect to see this call at all.
 444  */
 445
 446 enum surface_update_type {
 447         UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
 448         UPDATE_TYPE_MED,  /* ISR safe, most of programming needed, no bw/clk change*/
 449         UPDATE_TYPE_FULL, /* may need to shuffle resources */
 450 };
 451
 452 /*******************************************************************************
 453  * Stream Interfaces
 454  ******************************************************************************/
 455 struct dc_stream {
 456         const struct dc_sink *sink;
 457         struct dc_crtc_timing timing;
 458         enum signal_type output_signal;
 459
 460         enum dc_color_space output_color_space;
 461         enum dc_dither_option dither_option;
 462
 463         struct rect src; /* composition area */
 464         struct rect dst; /* stream addressable area */
 465
 466         struct audio_info audio_info;
 467
 468         bool ignore_msa_timing_param;
 469
 470         struct freesync_context freesync_ctx;
 471
 472         const struct dc_transfer_func *out_transfer_func;
 473         struct colorspace_transform gamut_remap_matrix;
 474         struct csc_transform csc_color_matrix;
 475
 476         /* TODO: custom INFO packets */
 477         /* TODO: ABM info (DMCU) */
 478         /* TODO: PSR info */
 479         /* TODO: CEA VIC */
 480 };
 481
 482 struct dc_stream_update {
 483         struct rect src;
 484         struct rect dst;
 485         struct dc_transfer_func *out_transfer_func;
 486 };
 487
 488
 489 /*
 490  * Setup stream attributes if no stream updates are provided
 491  * there will be no impact on the stream parameters
 492  *
 493  * Set up surface attributes and associate to a stream
 494  * The surfaces parameter is an absolute set of all surface active for the stream.
 495  * If no surfaces are provided, the stream will be blanked; no memory read.
 496  * Any flip related attribute changes must be done through this interface.
 497  *
 498  * After this call:
 499  *   Surfaces attributes are programmed and configured to be composed into stream.
 500  *   This does not trigger a flip.  No surface address is programmed.
 501  *
 502  */
 503
 504 void dc_update_surfaces_and_stream(struct dc *dc,
 505                 struct dc_surface_update *surface_updates, int surface_count,
 506                 const struct dc_stream *dc_stream,
 507                 struct dc_stream_update *stream_update);
 508
 509 /*
 510  * Log the current stream state.
 511  */
 512 void dc_stream_log(
 513         const struct dc_stream *stream,
 514         struct dal_logger *dc_logger,
 515         enum dc_log_type log_type);
 516
 517 uint8_t dc_get_current_stream_count(const struct dc *dc);
 518 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 519
 520 /*
 521  * Return the current frame counter.
 522  */
 523 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 524
 525 /* TODO: Return parsed values rather than direct register read
 526  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 527  * being refactored properly to be dce-specific
 528  */
 529 bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
 530                                   uint32_t *v_blank_start,
 531                                   uint32_t *v_blank_end,
 532                                   uint32_t *h_position,
 533                                   uint32_t *v_position);
 534
 535 /*
 536  * Structure to store surface/stream associations for validation
 537  */
 538 struct dc_validation_set {
 539         const struct dc_stream *stream;
 540         const struct dc_surface *surfaces[MAX_SURFACES];
 541         uint8_t surface_count;
 542 };
 543
 544 /*
 545  * This function takes a set of resources and checks that they are cofunctional.
 546  *
 547  * After this call:
 548  *   No hardware is programmed for call.  Only validation is done.
 549  */
 550 struct validate_context *dc_get_validate_context(
 551                 const struct dc *dc,
 552                 const struct dc_validation_set set[],
 553                 uint8_t set_count);
 554
 555 bool dc_validate_resources(
 556                 const struct dc *dc,
 557                 const struct dc_validation_set set[],
 558                 uint8_t set_count);
 559
 560 /*
 561  * This function takes a stream and checks if it is guaranteed to be supported.
 562  * Guaranteed means that MAX_COFUNC similar streams are supported.
 563  *
 564  * After this call:
 565  *   No hardware is programmed for call.  Only validation is done.
 566  */
 567
 568 bool dc_validate_guaranteed(
 569                 const struct dc *dc,
 570                 const struct dc_stream *stream);
 571
 572 void dc_resource_validate_ctx_copy_construct(
 573                 const struct validate_context *src_ctx,
 574                 struct validate_context *dst_ctx);
 575
 576 void dc_resource_validate_ctx_destruct(struct validate_context *context);
 577
 578 /*
 579  * Set up streams and links associated to drive sinks
 580  * The streams parameter is an absolute set of all active streams.
 581  *
 582  * After this call:
 583  *   Phy, Encoder, Timing Generator are programmed and enabled.
 584  *   New streams are enabled with blank stream; no memory read.
 585  */
 586 bool dc_commit_streams(
 587                 struct dc *dc,
 588                 const struct dc_stream *streams[],
 589                 uint8_t stream_count);
 590
 591 /**
 592  * Create a new default stream for the requested sink
 593  */
 594 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 595
 596 void dc_stream_retain(const struct dc_stream *dc_stream);
 597 void dc_stream_release(const struct dc_stream *dc_stream);
 598
 599 struct dc_stream_status {
 600         int primary_otg_inst;
 601         int surface_count;
 602         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 603
 604         /*
 605          * link this stream passes through
 606          */
 607         const struct dc_link *link;
 608 };
 609
 610 const struct dc_stream_status *dc_stream_get_status(
 611         const struct dc_stream *dc_stream);
 612
 613 enum surface_update_type dc_check_update_surfaces_for_stream(
 614                 struct dc *dc,
 615                 struct dc_surface_update *updates,
 616                 int surface_count,
 617                 struct dc_stream_update *stream_update,
 618                 const struct dc_stream_status *stream_status);
 619
 620 /*******************************************************************************
 621  * Link Interfaces
 622  ******************************************************************************/
 623
 624 /*
 625  * A link contains one or more sinks and their connected status.
 626  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 627  */
 628 struct dc_link {
 629         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 630         unsigned int sink_count;
 631         const struct dc_sink *local_sink;
 632         unsigned int link_index;
 633         enum dc_connection_type type;
 634         enum signal_type connector_signal;
 635         enum dc_irq_source irq_source_hpd;
 636         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 637         /* caps is the same as reported_link_cap. link_traing use
 638          * reported_link_cap. Will clean up.  TODO
 639          */
 640         struct dc_link_settings reported_link_cap;
 641         struct dc_link_settings verified_link_cap;
 642         struct dc_link_settings max_link_setting;
 643         struct dc_link_settings cur_link_settings;
 644         struct dc_lane_settings cur_lane_setting;
 645
 646         uint8_t ddc_hw_inst;
 647         uint8_t link_enc_hw_inst;
 648
 649         bool test_pattern_enabled;
 650         union compliance_test_state compliance_test_state;
 651
 652         void *priv;
 653         bool aux_mode;
 654
 655         struct ddc_service *ddc;
 656 };
 657
 658 struct dpcd_caps {
 659         union dpcd_rev dpcd_rev;
 660         union max_lane_count max_ln_count;
 661         union max_down_spread max_down_spread;
 662
 663         /* dongle type (DP converter, CV smart dongle) */
 664         enum display_dongle_type dongle_type;
 665         /* Dongle's downstream count. */
 666         union sink_count sink_count;
 667         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 668         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 669         struct dc_dongle_caps dongle_caps;
 670
 671         bool allow_invalid_MSA_timing_param;
 672         bool panel_mode_edp;
 673         uint32_t sink_dev_id;
 674         uint32_t branch_dev_id;
 675         int8_t branch_dev_name[6];
 676         int8_t branch_hw_revision;
 677 };
 678
 679 struct dc_link_status {
 680         struct dpcd_caps *dpcd_caps;
 681 };
 682
 683 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 684
 685 /*
 686  * Return an enumerated dc_link.  dc_link order is constant and determined at
 687  * boot time.  They cannot be created or destroyed.
 688  * Use dc_get_caps() to get number of links.
 689  */
 690 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 691
 692 /* Return id of physical connector represented by a dc_link at link_index.*/
 693 const struct graphics_object_id dc_get_link_id_at_index(
 694                 struct dc *dc, uint32_t link_index);
 695
 696 /* Set backlight level of an embedded panel (eDP, LVDS). */
 697 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 698                 uint32_t frame_ramp, const struct dc_stream *stream);
 699
 700 bool dc_link_set_abm_disable(const struct dc_link *dc_link);
 701
 702 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 703
 704 bool dc_link_setup_psr(const struct dc_link *dc_link,
 705                 const struct dc_stream *stream, struct psr_config *psr_config);
 706
 707 /* Request DC to detect if there is a Panel connected.
 708  * boot - If this call is during initial boot.
 709  * Return false for any type of detection failure or MST detection
 710  * true otherwise. True meaning further action is required (status update
 711  * and OS notification).
 712  */
 713 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 714
 715 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 716  * Return:
 717  * true - Downstream port status changed. DM should call DC to do the
 718  * detection.
 719  * false - no change in Downstream port status. No further action required
 720  * from DM. */
 721 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 722
 723 struct dc_sink_init_data;
 724
 725 struct dc_sink *dc_link_add_remote_sink(
 726                 const struct dc_link *dc_link,
 727                 const uint8_t *edid,
 728                 int len,
 729                 struct dc_sink_init_data *init_data);
 730
 731 void dc_link_remove_remote_sink(
 732         const struct dc_link *link,
 733         const struct dc_sink *sink);
 734
 735 /* Used by diagnostics for virtual link at the moment */
 736 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 737
 738 void dc_link_dp_set_drive_settings(
 739         const struct dc_link *link,
 740         struct link_training_settings *lt_settings);
 741
 742 bool dc_link_dp_perform_link_training(
 743         struct dc_link *link,
 744         const struct dc_link_settings *link_setting,
 745         bool skip_video_pattern);
 746
 747 void dc_link_dp_enable_hpd(const struct dc_link *link);
 748
 749 void dc_link_dp_disable_hpd(const struct dc_link *link);
 750
 751 bool dc_link_dp_set_test_pattern(
 752         const struct dc_link *link,
 753         enum dp_test_pattern test_pattern,
 754         const struct link_training_settings *p_link_settings,
 755         const unsigned char *p_custom_pattern,
 756         unsigned int cust_pattern_size);
 757
 758 /*******************************************************************************
 759  * Sink Interfaces - A sink corresponds to a display output device
 760  ******************************************************************************/
 761
 762 struct dc_container_id {
 763         // 128bit GUID in binary form
 764         unsigned char  guid[16];
 765         // 8 byte port ID -> ELD.PortID
 766         unsigned int   portId[2];
 767         // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
 768         unsigned short manufacturerName;
 769         // 2 byte product code -> ELD.ProductCode
 770         unsigned short productCode;
 771 };
 772
 773 /*
 774  * The sink structure contains EDID and other display device properties
 775  */
 776 struct dc_sink {
 777         enum signal_type sink_signal;
 778         struct dc_edid dc_edid; /* raw edid */
 779         struct dc_edid_caps edid_caps; /* parse display caps */
 780         struct dc_container_id *dc_container_id;
 781         uint32_t dongle_max_pix_clk;
 782         bool converter_disable_audio;
 783         void *priv;
 784 };
 785
 786 void dc_sink_retain(const struct dc_sink *sink);
 787 void dc_sink_release(const struct dc_sink *sink);
 788
 789 const struct audio **dc_get_audios(struct dc *dc);
 790
 791 struct dc_sink_init_data {
 792         enum signal_type sink_signal;
 793         const struct dc_link *link;
 794         uint32_t dongle_max_pix_clk;
 795         bool converter_disable_audio;
 796 };
 797
 798 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 799 bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id);
 800 bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id);
 801
 802 /*******************************************************************************
 803  * Cursor interfaces - To manages the cursor within a stream
 804  ******************************************************************************/
 805 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 806 bool dc_stream_set_cursor_attributes(
 807         const struct dc_stream *stream,
 808         const struct dc_cursor_attributes *attributes);
 809
 810 bool dc_stream_set_cursor_position(
 811         const struct dc_stream *stream,
 812         const struct dc_cursor_position *position);
 813
 814 /* Newer interfaces  */
 815 struct dc_cursor {
 816         struct dc_plane_address address;
 817         struct dc_cursor_attributes attributes;
 818 };
 819
 820 /*******************************************************************************
 821  * Interrupt interfaces
 822  ******************************************************************************/
 823 enum dc_irq_source dc_interrupt_to_irq_source(
 824                 struct dc *dc,
 825                 uint32_t src_id,
 826                 uint32_t ext_id);
 827 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 828 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 829 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 830                 struct dc *dc, uint32_t link_index);
 831
 832 /*******************************************************************************
 833  * Power Interfaces
 834  ******************************************************************************/
 835
 836 void dc_set_power_state(
 837                 struct dc *dc,
 838                 enum dc_acpi_cm_power_state power_state);
 839 void dc_resume(const struct dc *dc);
 840
 841 /*
 842  * DPCD access interfaces
 843  */
 844
 845 bool dc_read_aux_dpcd(
 846                 struct dc *dc,
 847                 uint32_t link_index,
 848                 uint32_t address,
 849                 uint8_t *data,
 850                 uint32_t size);
 851
 852 bool dc_write_aux_dpcd(
 853                 struct dc *dc,
 854                 uint32_t link_index,
 855                 uint32_t address,
 856                 const uint8_t *data,
 857                 uint32_t size);
 858
 859 bool dc_read_aux_i2c(
 860                 struct dc *dc,
 861                 uint32_t link_index,
 862                 enum i2c_mot_mode mot,
 863                 uint32_t address,
 864                 uint8_t *data,
 865                 uint32_t size);
 866
 867 bool dc_write_aux_i2c(
 868                 struct dc *dc,
 869                 uint32_t link_index,
 870                 enum i2c_mot_mode mot,
 871                 uint32_t address,
 872                 const uint8_t *data,
 873                 uint32_t size);
 874
 875 bool dc_query_ddc_data(
 876                 struct dc *dc,
 877                 uint32_t link_index,
 878                 uint32_t address,
 879                 uint8_t *write_buf,
 880                 uint32_t write_size,
 881                 uint8_t *read_buf,
 882                 uint32_t read_size);
 883
 884 bool dc_submit_i2c(
 885                 struct dc *dc,
 886                 uint32_t link_index,
 887                 struct i2c_command *cmd);
 888
 889
 890 #endif /* DC_INTERFACE_H_ */