drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_surfaces;
  49         uint32_t max_downscale_ratio;
  50         uint32_t i2c_speed_in_khz;
  51
  52         unsigned int max_cursor_size;
  53 };
  54
  55
  56 struct dc_dcc_surface_param {
  57         struct dc_size surface_size;
  58         enum surface_pixel_format format;
  59         enum swizzle_mode_values swizzle_mode;
  60         enum dc_scan_direction scan;
  61 };
  62
  63 struct dc_dcc_setting {
  64         unsigned int max_compressed_blk_size;
  65         unsigned int max_uncompressed_blk_size;
  66         bool independent_64b_blks;
  67 };
  68
  69 struct dc_surface_dcc_cap {
  70         union {
  71                 struct {
  72                         struct dc_dcc_setting rgb;
  73                 } grph;
  74
  75                 struct {
  76                         struct dc_dcc_setting luma;
  77                         struct dc_dcc_setting chroma;
  78                 } video;
  79         };
  80
  81         bool capable;
  82         bool const_color_support;
  83 };
  84
  85 struct dc_static_screen_events {
  86         bool cursor_update;
  87         bool surface_update;
  88         bool overlay_update;
  89 };
  90
  91 /* Forward declaration*/
  92 struct dc;
  93 struct dc_surface;
  94 struct validate_context;
  95
  96 struct dc_cap_funcs {
  97 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  98         bool (*get_dcc_compression_cap)(const struct dc *dc,
  99                         const struct dc_dcc_surface_param *input,
 100                         struct dc_surface_dcc_cap *output);
 101 #else
 102         int i;
 103 #endif
 104 };
 105
 106 struct dc_stream_funcs {
 107         bool (*adjust_vmin_vmax)(struct dc *dc,
 108                         const struct dc_stream **stream,
 109                         int num_streams,
 110                         int vmin,
 111                         int vmax);
 112         bool (*get_crtc_position)(struct dc *dc,
 113                         const struct dc_stream **stream,
 114                         int num_streams,
 115                         unsigned int *v_pos,
 116                         unsigned int *nom_v_pos);
 117
 118         bool (*set_gamut_remap)(struct dc *dc,
 119                         const struct dc_stream *stream);
 120
 121         void (*set_static_screen_events)(struct dc *dc,
 122                         const struct dc_stream **stream,
 123                         int num_streams,
 124                         const struct dc_static_screen_events *events);
 125
 126         void (*set_dither_option)(const struct dc_stream *stream,
 127                         enum dc_dither_option option);
 128 };
 129
 130 struct link_training_settings;
 131
 132 struct dc_link_funcs {
 133         void (*set_drive_settings)(struct dc *dc,
 134                         struct link_training_settings *lt_settings,
 135                         const struct dc_link *link);
 136         void (*perform_link_training)(struct dc *dc,
 137                         struct dc_link_settings *link_setting,
 138                         bool skip_video_pattern);
 139         void (*set_preferred_link_settings)(struct dc *dc,
 140                         struct dc_link_settings *link_setting,
 141                         const struct dc_link *link);
 142         void (*enable_hpd)(const struct dc_link *link);
 143         void (*disable_hpd)(const struct dc_link *link);
 144         void (*set_test_pattern)(
 145                         const struct dc_link *link,
 146                         enum dp_test_pattern test_pattern,
 147                         const struct link_training_settings *p_link_settings,
 148                         const unsigned char *p_custom_pattern,
 149                         unsigned int cust_pattern_size);
 150 };
 151
 152 /* Structure to hold configuration flags set by dm at dc creation. */
 153 struct dc_config {
 154         bool gpu_vm_support;
 155         bool disable_disp_pll_sharing;
 156 };
 157
 158 struct dc_debug {
 159         bool surface_visual_confirm;
 160         bool max_disp_clk;
 161         bool surface_trace;
 162         bool timing_trace;
 163         bool clock_trace;
 164         bool validation_trace;
 165         bool disable_stutter;
 166         bool disable_dcc;
 167         bool disable_dfs_bypass;
 168 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 169         bool disable_dpp_power_gate;
 170         bool disable_hubp_power_gate;
 171         bool disable_pplib_wm_range;
 172         bool use_dml_wm;
 173         bool disable_pipe_split;
 174         int sr_exit_time_ns;
 175         int sr_enter_plus_exit_time_ns;
 176         int urgent_latency_ns;
 177         int percent_of_ideal_drambw;
 178         int dram_clock_change_latency_ns;
 179         int always_scale;
 180 #endif
 181         bool disable_pplib_clock_request;
 182         bool disable_clock_gate;
 183         bool disable_dmcu;
 184         bool disable_psr;
 185         bool force_abm_enable;
 186 };
 187
 188 struct dc {
 189         struct dc_caps caps;
 190         struct dc_cap_funcs cap_funcs;
 191         struct dc_stream_funcs stream_funcs;
 192         struct dc_link_funcs link_funcs;
 193         struct dc_config config;
 194         struct dc_debug debug;
 195 };
 196
 197 enum frame_buffer_mode {
 198         FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
 199         FRAME_BUFFER_MODE_ZFB_ONLY,
 200         FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL,
 201 } ;
 202
 203 struct dchub_init_data {
 204         int64_t zfb_phys_addr_base;
 205         int64_t zfb_mc_base_addr;
 206         uint64_t zfb_size_in_byte;
 207         enum frame_buffer_mode fb_mode;
 208         bool dchub_initialzied;
 209         bool dchub_info_valid;
 210 };
 211
 212 struct dc_init_data {
 213         struct hw_asic_id asic_id;
 214         void *driver; /* ctx */
 215         struct cgs_device *cgs_device;
 216
 217         int num_virtual_links;
 218         /*
 219          * If 'vbios_override' not NULL, it will be called instead
 220          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 221          */
 222         struct dc_bios *vbios_override;
 223         enum dce_environment dce_environment;
 224
 225         struct dc_config flags;
 226 };
 227
 228 struct dc *dc_create(const struct dc_init_data *init_params);
 229
 230 void dc_destroy(struct dc **dc);
 231
 232 bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
 233
 234 /*******************************************************************************
 235  * Surface Interfaces
 236  ******************************************************************************/
 237
 238 enum {
 239         TRANSFER_FUNC_POINTS = 1025
 240 };
 241
 242 struct dc_hdr_static_metadata {
 243         /* display chromaticities and white point in units of 0.00001 */
 244         unsigned int chromaticity_green_x;
 245         unsigned int chromaticity_green_y;
 246         unsigned int chromaticity_blue_x;
 247         unsigned int chromaticity_blue_y;
 248         unsigned int chromaticity_red_x;
 249         unsigned int chromaticity_red_y;
 250         unsigned int chromaticity_white_point_x;
 251         unsigned int chromaticity_white_point_y;
 252
 253         uint32_t min_luminance;
 254         uint32_t max_luminance;
 255         uint32_t maximum_content_light_level;
 256         uint32_t maximum_frame_average_light_level;
 257
 258         bool hdr_supported;
 259         bool is_hdr;
 260 };
 261
 262 enum dc_transfer_func_type {
 263         TF_TYPE_PREDEFINED,
 264         TF_TYPE_DISTRIBUTED_POINTS,
 265         TF_TYPE_BYPASS
 266 };
 267
 268 struct dc_transfer_func_distributed_points {
 269         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 270         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 271         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 272
 273         uint16_t end_exponent;
 274         uint16_t x_point_at_y1_red;
 275         uint16_t x_point_at_y1_green;
 276         uint16_t x_point_at_y1_blue;
 277 };
 278
 279 enum dc_transfer_func_predefined {
 280         TRANSFER_FUNCTION_SRGB,
 281         TRANSFER_FUNCTION_BT709,
 282         TRANSFER_FUNCTION_PQ,
 283         TRANSFER_FUNCTION_LINEAR,
 284 };
 285
 286 struct dc_transfer_func {
 287         struct dc_transfer_func_distributed_points tf_pts;
 288         enum dc_transfer_func_type type;
 289         enum dc_transfer_func_predefined tf;
 290 };
 291
 292 struct dc_surface {
 293         struct dc_plane_address address;
 294
 295         struct scaling_taps scaling_quality;
 296         struct rect src_rect;
 297         struct rect dst_rect;
 298         struct rect clip_rect;
 299
 300         union plane_size plane_size;
 301         union dc_tiling_info tiling_info;
 302
 303         struct dc_plane_dcc_param dcc;
 304         struct dc_hdr_static_metadata hdr_static_ctx;
 305
 306         const struct dc_gamma *gamma_correction;
 307         const struct dc_transfer_func *in_transfer_func;
 308
 309         enum dc_color_space color_space;
 310         enum surface_pixel_format format;
 311         enum dc_rotation_angle rotation;
 312         enum plane_stereo_format stereo_format;
 313
 314         bool per_pixel_alpha;
 315         bool visible;
 316         bool flip_immediate;
 317         bool horizontal_mirror;
 318 };
 319
 320 struct dc_plane_info {
 321         union plane_size plane_size;
 322         union dc_tiling_info tiling_info;
 323         struct dc_plane_dcc_param dcc;
 324         enum surface_pixel_format format;
 325         enum dc_rotation_angle rotation;
 326         enum plane_stereo_format stereo_format;
 327         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 328         bool horizontal_mirror;
 329         bool visible;
 330         bool per_pixel_alpha;
 331 };
 332
 333 struct dc_scaling_info {
 334         struct rect src_rect;
 335         struct rect dst_rect;
 336         struct rect clip_rect;
 337         struct scaling_taps scaling_quality;
 338 };
 339
 340 struct dc_surface_update {
 341         const struct dc_surface *surface;
 342
 343         /* isr safe update parameters.  null means no updates */
 344         struct dc_flip_addrs *flip_addr;
 345         struct dc_plane_info *plane_info;
 346         struct dc_scaling_info *scaling_info;
 347         /* following updates require alloc/sleep/spin that is not isr safe,
 348          * null means no updates
 349          */
 350         /* gamma TO BE REMOVED */
 351         struct dc_gamma *gamma;
 352         struct dc_transfer_func *in_transfer_func;
 353         struct dc_hdr_static_metadata *hdr_static_metadata;
 354 };
 355 /*
 356  * This structure is filled in by dc_surface_get_status and contains
 357  * the last requested address and the currently active address so the called
 358  * can determine if there are any outstanding flips
 359  */
 360 struct dc_surface_status {
 361         struct dc_plane_address requested_address;
 362         struct dc_plane_address current_address;
 363         bool is_flip_pending;
 364         bool is_right_eye;
 365 };
 366
 367 /*
 368  * Create a new surface with default parameters;
 369  */
 370 struct dc_surface *dc_create_surface(const struct dc *dc);
 371 const struct dc_surface_status *dc_surface_get_status(
 372                 const struct dc_surface *dc_surface);
 373
 374 void dc_surface_retain(const struct dc_surface *dc_surface);
 375 void dc_surface_release(const struct dc_surface *dc_surface);
 376
 377 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 378 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 379 struct dc_gamma *dc_create_gamma(void);
 380
 381 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 382 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 383 struct dc_transfer_func *dc_create_transfer_func(void);
 384
 385 /*
 386  * This structure holds a surface address.  There could be multiple addresses
 387  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 388  * as frame durations and DCC format can also be set.
 389  */
 390 struct dc_flip_addrs {
 391         struct dc_plane_address address;
 392         bool flip_immediate;
 393         /* TODO: add flip duration for FreeSync */
 394 };
 395
 396 /*
 397  * Set up surface attributes and associate to a stream
 398  * The surfaces parameter is an absolute set of all surface active for the stream.
 399  * If no surfaces are provided, the stream will be blanked; no memory read.
 400  * Any flip related attribute changes must be done through this interface.
 401  *
 402  * After this call:
 403  *   Surfaces attributes are programmed and configured to be composed into stream.
 404  *   This does not trigger a flip.  No surface address is programmed.
 405  */
 406
 407 bool dc_commit_surfaces_to_stream(
 408                 struct dc *dc,
 409                 const struct dc_surface **dc_surfaces,
 410                 uint8_t surface_count,
 411                 const struct dc_stream *stream);
 412
 413 bool dc_post_update_surfaces_to_stream(
 414                 struct dc *dc);
 415
 416 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 417                 int surface_count, const struct dc_stream *stream);
 418
 419 /* Surface update type is used by dc_update_surfaces_and_stream
 420  * The update type is determined at the very beginning of the function based
 421  * on parameters passed in and decides how much programming (or updating) is
 422  * going to be done during the call.
 423  *
 424  * UPDATE_TYPE_FAST is used for really fast updates that do not require much
 425  * logical calculations or hardware register programming. This update MUST be
 426  * ISR safe on windows. Currently fast update will only be used to flip surface
 427  * address.
 428  *
 429  * UPDATE_TYPE_MED is used for slower updates which require significant hw
 430  * re-programming however do not affect bandwidth consumption or clock
 431  * requirements. At present, this is the level at which front end updates
 432  * that do not require us to run bw_calcs happen. These are in/out transfer func
 433  * updates, viewport offset changes, recout size changes and pixel depth changes.
 434  * This update can be done at ISR, but we want to minimize how often this happens.
 435  *
 436  * UPDATE_TYPE_FULL is slow. Really slow. This requires us to recalculate our
 437  * bandwidth and clocks, possibly rearrange some pipes and reprogram anything front
 438  * end related. Any time viewport dimensions, recout dimensions, scaling ratios or
 439  * gamma need to be adjusted or pipe needs to be turned on (or disconnected) we do
 440  * a full update. This cannot be done at ISR level and should be a rare event.
 441  * Unless someone is stress testing mpo enter/exit, playing with colour or adjusting
 442  * underscan we don't expect to see this call at all.
 443  */
 444
 445 enum surface_update_type {
 446         UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
 447         UPDATE_TYPE_MED,  /* ISR safe, most of programming needed, no bw/clk change*/
 448         UPDATE_TYPE_FULL, /* may need to shuffle resources */
 449 };
 450
 451 /*******************************************************************************
 452  * Stream Interfaces
 453  ******************************************************************************/
 454 struct dc_stream {
 455         const struct dc_sink *sink;
 456         struct dc_crtc_timing timing;
 457
 458         struct rect src; /* composition area */
 459         struct rect dst; /* stream addressable area */
 460
 461         struct audio_info audio_info;
 462
 463         struct freesync_context freesync_ctx;
 464
 465         const struct dc_transfer_func *out_transfer_func;
 466         struct colorspace_transform gamut_remap_matrix;
 467         struct csc_transform csc_color_matrix;
 468
 469         enum signal_type output_signal;
 470
 471         enum dc_color_space output_color_space;
 472         enum dc_dither_option dither_option;
 473
 474         enum view_3d_format view_format;
 475
 476         bool ignore_msa_timing_param;
 477         /* TODO: custom INFO packets */
 478         /* TODO: ABM info (DMCU) */
 479         /* TODO: PSR info */
 480         /* TODO: CEA VIC */
 481 };
 482
 483 struct dc_stream_update {
 484         struct rect src;
 485         struct rect dst;
 486         struct dc_transfer_func *out_transfer_func;
 487 };
 488
 489
 490 /*
 491  * Setup stream attributes if no stream updates are provided
 492  * there will be no impact on the stream parameters
 493  *
 494  * Set up surface attributes and associate to a stream
 495  * The surfaces parameter is an absolute set of all surface active for the stream.
 496  * If no surfaces are provided, the stream will be blanked; no memory read.
 497  * Any flip related attribute changes must be done through this interface.
 498  *
 499  * After this call:
 500  *   Surfaces attributes are programmed and configured to be composed into stream.
 501  *   This does not trigger a flip.  No surface address is programmed.
 502  *
 503  */
 504
 505 void dc_update_surfaces_and_stream(struct dc *dc,
 506                 struct dc_surface_update *surface_updates, int surface_count,
 507                 const struct dc_stream *dc_stream,
 508                 struct dc_stream_update *stream_update);
 509
 510 /*
 511  * Log the current stream state.
 512  */
 513 void dc_stream_log(
 514         const struct dc_stream *stream,
 515         struct dal_logger *dc_logger,
 516         enum dc_log_type log_type);
 517
 518 uint8_t dc_get_current_stream_count(const struct dc *dc);
 519 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 520
 521 /*
 522  * Return the current frame counter.
 523  */
 524 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 525
 526 /* TODO: Return parsed values rather than direct register read
 527  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 528  * being refactored properly to be dce-specific
 529  */
 530 bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
 531                                   uint32_t *v_blank_start,
 532                                   uint32_t *v_blank_end,
 533                                   uint32_t *h_position,
 534                                   uint32_t *v_position);
 535
 536 /*
 537  * Structure to store surface/stream associations for validation
 538  */
 539 struct dc_validation_set {
 540         const struct dc_stream *stream;
 541         const struct dc_surface *surfaces[MAX_SURFACES];
 542         uint8_t surface_count;
 543 };
 544
 545 /*
 546  * This function takes a set of resources and checks that they are cofunctional.
 547  *
 548  * After this call:
 549  *   No hardware is programmed for call.  Only validation is done.
 550  */
 551 struct validate_context *dc_get_validate_context(
 552                 const struct dc *dc,
 553                 const struct dc_validation_set set[],
 554                 uint8_t set_count);
 555
 556 bool dc_validate_resources(
 557                 const struct dc *dc,
 558                 const struct dc_validation_set set[],
 559                 uint8_t set_count);
 560
 561 /*
 562  * This function takes a stream and checks if it is guaranteed to be supported.
 563  * Guaranteed means that MAX_COFUNC similar streams are supported.
 564  *
 565  * After this call:
 566  *   No hardware is programmed for call.  Only validation is done.
 567  */
 568
 569 bool dc_validate_guaranteed(
 570                 const struct dc *dc,
 571                 const struct dc_stream *stream);
 572
 573 void dc_resource_validate_ctx_copy_construct(
 574                 const struct validate_context *src_ctx,
 575                 struct validate_context *dst_ctx);
 576
 577 void dc_resource_validate_ctx_destruct(struct validate_context *context);
 578
 579 /*
 580  * Set up streams and links associated to drive sinks
 581  * The streams parameter is an absolute set of all active streams.
 582  *
 583  * After this call:
 584  *   Phy, Encoder, Timing Generator are programmed and enabled.
 585  *   New streams are enabled with blank stream; no memory read.
 586  */
 587 bool dc_commit_streams(
 588                 struct dc *dc,
 589                 const struct dc_stream *streams[],
 590                 uint8_t stream_count);
 591 /*
 592  * Enable stereo when commit_streams is not required,
 593  * for example, frame alternate.
 594  */
 595 bool dc_enable_stereo(
 596         struct dc *dc,
 597         struct validate_context *context,
 598         const struct dc_stream *streams[],
 599         uint8_t stream_count);
 600
 601 /**
 602  * Create a new default stream for the requested sink
 603  */
 604 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 605
 606 void dc_stream_retain(const struct dc_stream *dc_stream);
 607 void dc_stream_release(const struct dc_stream *dc_stream);
 608
 609 struct dc_stream_status {
 610         int primary_otg_inst;
 611         int surface_count;
 612         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 613
 614         /*
 615          * link this stream passes through
 616          */
 617         const struct dc_link *link;
 618 };
 619
 620 const struct dc_stream_status *dc_stream_get_status(
 621         const struct dc_stream *dc_stream);
 622
 623 enum surface_update_type dc_check_update_surfaces_for_stream(
 624                 struct dc *dc,
 625                 struct dc_surface_update *updates,
 626                 int surface_count,
 627                 struct dc_stream_update *stream_update,
 628                 const struct dc_stream_status *stream_status);
 629
 630 /*******************************************************************************
 631  * Link Interfaces
 632  ******************************************************************************/
 633
 634 /*
 635  * A link contains one or more sinks and their connected status.
 636  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 637  */
 638 struct dc_link {
 639         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 640         unsigned int sink_count;
 641         const struct dc_sink *local_sink;
 642         unsigned int link_index;
 643         enum dc_connection_type type;
 644         enum signal_type connector_signal;
 645         enum dc_irq_source irq_source_hpd;
 646         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 647         /* caps is the same as reported_link_cap. link_traing use
 648          * reported_link_cap. Will clean up.  TODO
 649          */
 650         struct dc_link_settings reported_link_cap;
 651         struct dc_link_settings verified_link_cap;
 652         struct dc_link_settings max_link_setting;
 653         struct dc_link_settings cur_link_settings;
 654         struct dc_lane_settings cur_lane_setting;
 655
 656         uint8_t ddc_hw_inst;
 657
 658         uint8_t hpd_src;
 659
 660         uint8_t link_enc_hw_inst;
 661
 662         bool test_pattern_enabled;
 663         union compliance_test_state compliance_test_state;
 664
 665         void *priv;
 666
 667         struct ddc_service *ddc;
 668
 669         bool aux_mode;
 670 };
 671
 672 struct dpcd_caps {
 673         union dpcd_rev dpcd_rev;
 674         union max_lane_count max_ln_count;
 675         union max_down_spread max_down_spread;
 676
 677         /* dongle type (DP converter, CV smart dongle) */
 678         enum display_dongle_type dongle_type;
 679         /* Dongle's downstream count. */
 680         union sink_count sink_count;
 681         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 682         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 683         struct dc_dongle_caps dongle_caps;
 684
 685         uint32_t sink_dev_id;
 686         uint32_t branch_dev_id;
 687         int8_t branch_dev_name[6];
 688         int8_t branch_hw_revision;
 689
 690         bool allow_invalid_MSA_timing_param;
 691         bool panel_mode_edp;
 692 };
 693
 694 struct dc_link_status {
 695         struct dpcd_caps *dpcd_caps;
 696 };
 697
 698 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 699
 700 /*
 701  * Return an enumerated dc_link.  dc_link order is constant and determined at
 702  * boot time.  They cannot be created or destroyed.
 703  * Use dc_get_caps() to get number of links.
 704  */
 705 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 706
 707 /* Return id of physical connector represented by a dc_link at link_index.*/
 708 const struct graphics_object_id dc_get_link_id_at_index(
 709                 struct dc *dc, uint32_t link_index);
 710
 711 /* Set backlight level of an embedded panel (eDP, LVDS). */
 712 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 713                 uint32_t frame_ramp, const struct dc_stream *stream);
 714
 715 bool dc_link_set_abm_disable(const struct dc_link *dc_link);
 716
 717 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 718
 719 bool dc_link_get_psr_state(const struct dc_link *dc_link, uint32_t *psr_state);
 720
 721 bool dc_link_setup_psr(const struct dc_link *dc_link,
 722                 const struct dc_stream *stream, struct psr_config *psr_config,
 723                 struct psr_context *psr_context);
 724
 725 /* Request DC to detect if there is a Panel connected.
 726  * boot - If this call is during initial boot.
 727  * Return false for any type of detection failure or MST detection
 728  * true otherwise. True meaning further action is required (status update
 729  * and OS notification).
 730  */
 731 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 732
 733 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 734  * Return:
 735  * true - Downstream port status changed. DM should call DC to do the
 736  * detection.
 737  * false - no change in Downstream port status. No further action required
 738  * from DM. */
 739 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 740
 741 struct dc_sink_init_data;
 742
 743 struct dc_sink *dc_link_add_remote_sink(
 744                 const struct dc_link *dc_link,
 745                 const uint8_t *edid,
 746                 int len,
 747                 struct dc_sink_init_data *init_data);
 748
 749 void dc_link_remove_remote_sink(
 750         const struct dc_link *link,
 751         const struct dc_sink *sink);
 752
 753 /* Used by diagnostics for virtual link at the moment */
 754 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 755
 756 void dc_link_dp_set_drive_settings(
 757         const struct dc_link *link,
 758         struct link_training_settings *lt_settings);
 759
 760 bool dc_link_dp_perform_link_training(
 761         struct dc_link *link,
 762         const struct dc_link_settings *link_setting,
 763         bool skip_video_pattern);
 764
 765 void dc_link_dp_enable_hpd(const struct dc_link *link);
 766
 767 void dc_link_dp_disable_hpd(const struct dc_link *link);
 768
 769 bool dc_link_dp_set_test_pattern(
 770         const struct dc_link *link,
 771         enum dp_test_pattern test_pattern,
 772         const struct link_training_settings *p_link_settings,
 773         const unsigned char *p_custom_pattern,
 774         unsigned int cust_pattern_size);
 775
 776 /*******************************************************************************
 777  * Sink Interfaces - A sink corresponds to a display output device
 778  ******************************************************************************/
 779
 780 struct dc_container_id {
 781         // 128bit GUID in binary form
 782         unsigned char  guid[16];
 783         // 8 byte port ID -> ELD.PortID
 784         unsigned int   portId[2];
 785         // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
 786         unsigned short manufacturerName;
 787         // 2 byte product code -> ELD.ProductCode
 788         unsigned short productCode;
 789 };
 790
 791
 792
 793 /*
 794  * The sink structure contains EDID and other display device properties
 795  */
 796 struct dc_sink {
 797         enum signal_type sink_signal;
 798         struct dc_edid dc_edid; /* raw edid */
 799         struct dc_edid_caps edid_caps; /* parse display caps */
 800         struct dc_container_id *dc_container_id;
 801         uint32_t dongle_max_pix_clk;
 802         void *priv;
 803         struct stereo_3d_features features_3d[TIMING_3D_FORMAT_MAX];
 804         bool converter_disable_audio;
 805 };
 806
 807 void dc_sink_retain(const struct dc_sink *sink);
 808 void dc_sink_release(const struct dc_sink *sink);
 809
 810 const struct audio **dc_get_audios(struct dc *dc);
 811
 812 struct dc_sink_init_data {
 813         enum signal_type sink_signal;
 814         const struct dc_link *link;
 815         uint32_t dongle_max_pix_clk;
 816         bool converter_disable_audio;
 817 };
 818
 819 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 820 bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id);
 821 bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id);
 822
 823 /*******************************************************************************
 824  * Cursor interfaces - To manages the cursor within a stream
 825  ******************************************************************************/
 826 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 827 bool dc_stream_set_cursor_attributes(
 828         const struct dc_stream *stream,
 829         const struct dc_cursor_attributes *attributes);
 830
 831 bool dc_stream_set_cursor_position(
 832         const struct dc_stream *stream,
 833         const struct dc_cursor_position *position);
 834
 835 /* Newer interfaces  */
 836 struct dc_cursor {
 837         struct dc_plane_address address;
 838         struct dc_cursor_attributes attributes;
 839 };
 840
 841 /*******************************************************************************
 842  * Interrupt interfaces
 843  ******************************************************************************/
 844 enum dc_irq_source dc_interrupt_to_irq_source(
 845                 struct dc *dc,
 846                 uint32_t src_id,
 847                 uint32_t ext_id);
 848 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 849 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 850 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 851                 struct dc *dc, uint32_t link_index);
 852
 853 /*******************************************************************************
 854  * Power Interfaces
 855  ******************************************************************************/
 856
 857 void dc_set_power_state(
 858                 struct dc *dc,
 859                 enum dc_acpi_cm_power_state power_state);
 860 void dc_resume(const struct dc *dc);
 861
 862 /*
 863  * DPCD access interfaces
 864  */
 865
 866 bool dc_read_aux_dpcd(
 867                 struct dc *dc,
 868                 uint32_t link_index,
 869                 uint32_t address,
 870                 uint8_t *data,
 871                 uint32_t size);
 872
 873 bool dc_write_aux_dpcd(
 874                 struct dc *dc,
 875                 uint32_t link_index,
 876                 uint32_t address,
 877                 const uint8_t *data,
 878                 uint32_t size);
 879
 880 bool dc_read_aux_i2c(
 881                 struct dc *dc,
 882                 uint32_t link_index,
 883                 enum i2c_mot_mode mot,
 884                 uint32_t address,
 885                 uint8_t *data,
 886                 uint32_t size);
 887
 888 bool dc_write_aux_i2c(
 889                 struct dc *dc,
 890                 uint32_t link_index,
 891                 enum i2c_mot_mode mot,
 892                 uint32_t address,
 893                 const uint8_t *data,
 894                 uint32_t size);
 895
 896 bool dc_query_ddc_data(
 897                 struct dc *dc,
 898                 uint32_t link_index,
 899                 uint32_t address,
 900                 uint8_t *write_buf,
 901                 uint32_t write_size,
 902                 uint8_t *read_buf,
 903                 uint32_t read_size);
 904
 905 bool dc_submit_i2c(
 906                 struct dc *dc,
 907                 uint32_t link_index,
 908                 struct i2c_command *cmd);
 909
 910
 911 #endif /* DC_INTERFACE_H_ */