drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_downscale_ratio;
  49         uint32_t i2c_speed_in_khz;
  50
  51         unsigned int max_cursor_size;
  52 };
  53
  54
  55 struct dc_dcc_surface_param {
  56         enum surface_pixel_format format;
  57         struct dc_size surface_size;
  58         enum dc_scan_direction scan;
  59 };
  60
  61 struct dc_dcc_setting {
  62         unsigned int max_compressed_blk_size;
  63         unsigned int max_uncompressed_blk_size;
  64         bool independent_64b_blks;
  65 };
  66
  67 struct dc_surface_dcc_cap {
  68         bool capable;
  69         bool const_color_support;
  70
  71         union {
  72                 struct {
  73                         struct dc_dcc_setting rgb;
  74                 } grph;
  75
  76                 struct {
  77                         struct dc_dcc_setting luma;
  78                         struct dc_dcc_setting chroma;
  79                 } video;
  80         };
  81 };
  82
  83 /* Forward declaration*/
  84 struct dc;
  85 struct dc_surface;
  86 struct validate_context;
  87
  88 struct dc_cap_funcs {
  89         int i;
  90 };
  91
  92 struct dc_stream_funcs {
  93         bool (*adjust_vmin_vmax)(struct dc *dc,
  94                         const struct dc_stream **stream,
  95                         int num_streams,
  96                         int vmin,
  97                         int vmax);
  98
  99         void (*stream_update_scaling)(const struct dc *dc,
 100                         const struct dc_stream *dc_stream,
 101                         const struct rect *src,
 102                         const struct rect *dst);
 103         bool (*set_gamut_remap)(struct dc *dc,
 104                         const struct dc_stream **stream, int num_streams);
 105         bool (*set_psr_enable)(struct dc *dc, bool enable);
 106         bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
 107 };
 108
 109 struct link_training_settings;
 110
 111 struct dc_link_funcs {
 112         void (*set_drive_settings)(struct dc *dc,
 113                         struct link_training_settings *lt_settings,
 114                         const struct dc_link *link);
 115         void (*perform_link_training)(struct dc *dc,
 116                         struct dc_link_settings *link_setting,
 117                         bool skip_video_pattern);
 118         void (*set_preferred_link_settings)(struct dc *dc,
 119                         struct dc_link_settings *link_setting,
 120                         const struct dc_link *link);
 121         void (*enable_hpd)(const struct dc_link *link);
 122         void (*disable_hpd)(const struct dc_link *link);
 123         void (*set_test_pattern)(
 124                         const struct dc_link *link,
 125                         enum dp_test_pattern test_pattern,
 126                         const struct link_training_settings *p_link_settings,
 127                         const unsigned char *p_custom_pattern,
 128                         unsigned int cust_pattern_size);
 129 };
 130
 131 /* Structure to hold configuration flags set by dm at dc creation. */
 132 struct dc_config {
 133         bool gpu_vm_support;
 134         bool disable_disp_pll_sharing;
 135 };
 136
 137 struct dc_debug {
 138         bool surface_visual_confirm;
 139         bool max_disp_clk;
 140         bool surface_trace;
 141         bool timing_trace;
 142         bool validation_trace;
 143         bool disable_stutter;
 144         bool disable_dcc;
 145         bool disable_dfs_bypass;
 146         bool disable_clock_gate;
 147         bool disable_dmcu;
 148         bool force_abm_enable;
 149 };
 150
 151 struct dc {
 152         struct dc_caps caps;
 153         struct dc_cap_funcs cap_funcs;
 154         struct dc_stream_funcs stream_funcs;
 155         struct dc_link_funcs link_funcs;
 156         struct dc_config config;
 157         struct dc_debug debug;
 158 };
 159
 160 struct dc_init_data {
 161         struct hw_asic_id asic_id;
 162         void *driver; /* ctx */
 163         struct cgs_device *cgs_device;
 164
 165         int num_virtual_links;
 166         /*
 167          * If 'vbios_override' not NULL, it will be called instead
 168          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 169          */
 170         struct dc_bios *vbios_override;
 171         enum dce_environment dce_environment;
 172
 173         struct dc_config flags;
 174 };
 175
 176 struct dc *dc_create(const struct dc_init_data *init_params);
 177
 178 void dc_destroy(struct dc **dc);
 179
 180 /*******************************************************************************
 181  * Surface Interfaces
 182  ******************************************************************************/
 183
 184 enum {
 185         TRANSFER_FUNC_POINTS = 1025
 186 };
 187
 188 struct dc_hdr_static_metadata {
 189         bool hdr_supported;
 190         bool is_hdr;
 191
 192         /* display chromaticities and white point in units of 0.00001 */
 193         unsigned int chromaticity_green_x;
 194         unsigned int chromaticity_green_y;
 195         unsigned int chromaticity_blue_x;
 196         unsigned int chromaticity_blue_y;
 197         unsigned int chromaticity_red_x;
 198         unsigned int chromaticity_red_y;
 199         unsigned int chromaticity_white_point_x;
 200         unsigned int chromaticity_white_point_y;
 201
 202         uint32_t min_luminance;
 203         uint32_t max_luminance;
 204         uint32_t maximum_content_light_level;
 205         uint32_t maximum_frame_average_light_level;
 206 };
 207
 208 enum dc_transfer_func_type {
 209         TF_TYPE_PREDEFINED,
 210         TF_TYPE_DISTRIBUTED_POINTS,
 211         TF_TYPE_BYPASS
 212 };
 213
 214 struct dc_transfer_func_distributed_points {
 215         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 216         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 217         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 218
 219         uint16_t end_exponent;
 220         uint16_t x_point_at_y1_red;
 221         uint16_t x_point_at_y1_green;
 222         uint16_t x_point_at_y1_blue;
 223 };
 224
 225 enum dc_transfer_func_predefined {
 226         TRANSFER_FUNCTION_SRGB,
 227         TRANSFER_FUNCTION_BT709,
 228         TRANSFER_FUNCTION_PQ,
 229         TRANSFER_FUNCTION_LINEAR,
 230 };
 231
 232 struct dc_transfer_func {
 233         enum dc_transfer_func_type type;
 234         enum dc_transfer_func_predefined tf;
 235         struct dc_transfer_func_distributed_points tf_pts;
 236 };
 237
 238 struct dc_surface {
 239         bool visible;
 240         bool flip_immediate;
 241         struct dc_plane_address address;
 242
 243         struct scaling_taps scaling_quality;
 244         struct rect src_rect;
 245         struct rect dst_rect;
 246         struct rect clip_rect;
 247
 248         union plane_size plane_size;
 249         union dc_tiling_info tiling_info;
 250         struct dc_plane_dcc_param dcc;
 251         enum dc_color_space color_space;
 252
 253         enum surface_pixel_format format;
 254         enum dc_rotation_angle rotation;
 255         bool horizontal_mirror;
 256         enum plane_stereo_format stereo_format;
 257
 258         struct dc_hdr_static_metadata hdr_static_ctx;
 259
 260         const struct dc_gamma *gamma_correction;
 261         const struct dc_transfer_func *in_transfer_func;
 262 };
 263
 264 struct dc_plane_info {
 265         union plane_size plane_size;
 266         union dc_tiling_info tiling_info;
 267         struct dc_plane_dcc_param dcc;
 268         enum surface_pixel_format format;
 269         enum dc_rotation_angle rotation;
 270         bool horizontal_mirror;
 271         enum plane_stereo_format stereo_format;
 272         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 273         bool visible;
 274 };
 275
 276 struct dc_scaling_info {
 277                 struct rect src_rect;
 278                 struct rect dst_rect;
 279                 struct rect clip_rect;
 280                 struct scaling_taps scaling_quality;
 281 };
 282
 283 struct dc_surface_update {
 284         const struct dc_surface *surface;
 285
 286         /* isr safe update parameters.  null means no updates */
 287         struct dc_flip_addrs *flip_addr;
 288         struct dc_plane_info *plane_info;
 289         struct dc_scaling_info *scaling_info;
 290         /* following updates require alloc/sleep/spin that is not isr safe,
 291          * null means no updates
 292          */
 293         /* gamma TO BE REMOVED */
 294         struct dc_gamma *gamma;
 295         struct dc_hdr_static_metadata *hdr_static_metadata;
 296         struct dc_transfer_func *in_transfer_func;
 297         struct dc_transfer_func *out_transfer_func;
 298
 299
 300 };
 301 /*
 302  * This structure is filled in by dc_surface_get_status and contains
 303  * the last requested address and the currently active address so the called
 304  * can determine if there are any outstanding flips
 305  */
 306 struct dc_surface_status {
 307         struct dc_plane_address requested_address;
 308         struct dc_plane_address current_address;
 309         bool is_flip_pending;
 310 };
 311
 312 /*
 313  * Create a new surface with default parameters;
 314  */
 315 struct dc_surface *dc_create_surface(const struct dc *dc);
 316 const struct dc_surface_status *dc_surface_get_status(
 317                 const struct dc_surface *dc_surface);
 318
 319 void dc_surface_retain(const struct dc_surface *dc_surface);
 320 void dc_surface_release(const struct dc_surface *dc_surface);
 321
 322 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 323 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 324 struct dc_gamma *dc_create_gamma(void);
 325
 326 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 327 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 328 struct dc_transfer_func *dc_create_transfer_func(void);
 329
 330 /*
 331  * This structure holds a surface address.  There could be multiple addresses
 332  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 333  * as frame durations and DCC format can also be set.
 334  */
 335 struct dc_flip_addrs {
 336         struct dc_plane_address address;
 337         bool flip_immediate;
 338         /* TODO: add flip duration for FreeSync */
 339 };
 340
 341 /*
 342  * Optimized flip address update function.
 343  *
 344  * After this call:
 345  *   Surface addresses and flip attributes are programmed.
 346  *   Surface flip occur at next configured time (h_sync or v_sync flip)
 347  */
 348 void dc_flip_surface_addrs(struct dc *dc,
 349                 const struct dc_surface *const surfaces[],
 350                 struct dc_flip_addrs flip_addrs[],
 351                 uint32_t count);
 352
 353 /*
 354  * Set up surface attributes and associate to a stream
 355  * The surfaces parameter is an absolute set of all surface active for the stream.
 356  * If no surfaces are provided, the stream will be blanked; no memory read.
 357  * Any flip related attribute changes must be done through this interface.
 358  *
 359  * After this call:
 360  *   Surfaces attributes are programmed and configured to be composed into stream.
 361  *   This does not trigger a flip.  No surface address is programmed.
 362  */
 363
 364 bool dc_commit_surfaces_to_stream(
 365                 struct dc *dc,
 366                 const struct dc_surface **dc_surfaces,
 367                 uint8_t surface_count,
 368                 const struct dc_stream *stream);
 369
 370 bool dc_pre_update_surfaces_to_stream(
 371                 struct dc *dc,
 372                 const struct dc_surface *const *new_surfaces,
 373                 uint8_t new_surface_count,
 374                 const struct dc_stream *stream);
 375
 376 bool dc_post_update_surfaces_to_stream(
 377                 struct dc *dc);
 378
 379 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 380                 int surface_count, const struct dc_stream *stream);
 381
 382 enum surface_update_type {
 383         UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
 384         UPDATE_TYPE_MED,  /* a lot of programming needed.  may need to alloc */
 385         UPDATE_TYPE_FULL, /* may need to shuffle resources */
 386 };
 387
 388 /*******************************************************************************
 389  * Stream Interfaces
 390  ******************************************************************************/
 391 struct dc_stream {
 392         const struct dc_sink *sink;
 393         struct dc_crtc_timing timing;
 394
 395         enum dc_color_space output_color_space;
 396
 397         struct rect src; /* composition area */
 398         struct rect dst; /* stream addressable area */
 399
 400         struct audio_info audio_info;
 401
 402         bool ignore_msa_timing_param;
 403
 404         struct freesync_context freesync_ctx;
 405
 406         const struct dc_transfer_func *out_transfer_func;
 407         struct colorspace_transform gamut_remap_matrix;
 408         struct csc_transform csc_color_matrix;
 409
 410         /* TODO: dithering */
 411         /* TODO: custom INFO packets */
 412         /* TODO: ABM info (DMCU) */
 413         /* TODO: PSR info */
 414         /* TODO: CEA VIC */
 415 };
 416
 417 /*
 418  * Log the current stream state.
 419  */
 420 void dc_stream_log(
 421         const struct dc_stream *stream,
 422         struct dal_logger *dc_logger,
 423         enum dc_log_type log_type);
 424
 425 uint8_t dc_get_current_stream_count(const struct dc *dc);
 426 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 427
 428 /*
 429  * Return the current frame counter.
 430  */
 431 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 432
 433 /* TODO: Return parsed values rather than direct register read
 434  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 435  * being refactored properly to be dce-specific
 436  */
 437 uint32_t dc_stream_get_scanoutpos(
 438                 const struct dc_stream *stream, uint32_t *vbl, uint32_t *position);
 439
 440 /*
 441  * Structure to store surface/stream associations for validation
 442  */
 443 struct dc_validation_set {
 444         const struct dc_stream *stream;
 445         const struct dc_surface *surfaces[MAX_SURFACES];
 446         uint8_t surface_count;
 447 };
 448
 449 /*
 450  * This function takes a set of resources and checks that they are cofunctional.
 451  *
 452  * After this call:
 453  *   No hardware is programmed for call.  Only validation is done.
 454  */
 455 bool dc_validate_resources(
 456                 const struct dc *dc,
 457                 const struct dc_validation_set set[],
 458                 uint8_t set_count);
 459
 460 /*
 461  * This function takes a stream and checks if it is guaranteed to be supported.
 462  * Guaranteed means that MAX_COFUNC similar streams are supported.
 463  *
 464  * After this call:
 465  *   No hardware is programmed for call.  Only validation is done.
 466  */
 467
 468 bool dc_validate_guaranteed(
 469                 const struct dc *dc,
 470                 const struct dc_stream *stream);
 471
 472 /*
 473  * Set up streams and links associated to drive sinks
 474  * The streams parameter is an absolute set of all active streams.
 475  *
 476  * After this call:
 477  *   Phy, Encoder, Timing Generator are programmed and enabled.
 478  *   New streams are enabled with blank stream; no memory read.
 479  */
 480 bool dc_commit_streams(
 481                 struct dc *dc,
 482                 const struct dc_stream *streams[],
 483                 uint8_t stream_count);
 484
 485 /**
 486  * Create a new default stream for the requested sink
 487  */
 488 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 489
 490 void dc_stream_retain(const struct dc_stream *dc_stream);
 491 void dc_stream_release(const struct dc_stream *dc_stream);
 492
 493 struct dc_stream_status {
 494         int primary_otg_inst;
 495         int surface_count;
 496         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 497
 498         /*
 499          * link this stream passes through
 500          */
 501         const struct dc_link *link;
 502 };
 503
 504 const struct dc_stream_status *dc_stream_get_status(
 505         const struct dc_stream *dc_stream);
 506
 507 enum surface_update_type dc_check_update_surfaces_for_stream(
 508                 struct dc *dc,
 509                 struct dc_surface_update *updates,
 510                 int surface_count,
 511                 const struct dc_stream_status *stream_status);
 512
 513 /*******************************************************************************
 514  * Link Interfaces
 515  ******************************************************************************/
 516
 517 /*
 518  * A link contains one or more sinks and their connected status.
 519  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 520  */
 521 struct dc_link {
 522         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 523         unsigned int sink_count;
 524         const struct dc_sink *local_sink;
 525         unsigned int link_index;
 526         enum dc_connection_type type;
 527         enum signal_type connector_signal;
 528         enum dc_irq_source irq_source_hpd;
 529         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 530         /* caps is the same as reported_link_cap. link_traing use
 531          * reported_link_cap. Will clean up.  TODO
 532          */
 533         struct dc_link_settings reported_link_cap;
 534         struct dc_link_settings verified_link_cap;
 535         struct dc_link_settings max_link_setting;
 536         struct dc_link_settings cur_link_settings;
 537         struct dc_lane_settings cur_lane_setting;
 538
 539         uint8_t ddc_hw_inst;
 540         uint8_t link_enc_hw_inst;
 541
 542         struct psr_caps psr_caps;
 543         bool test_pattern_enabled;
 544         union compliance_test_state compliance_test_state;
 545 };
 546
 547 struct dpcd_caps {
 548         union dpcd_rev dpcd_rev;
 549         union max_lane_count max_ln_count;
 550         union max_down_spread max_down_spread;
 551
 552         /* dongle type (DP converter, CV smart dongle) */
 553         enum display_dongle_type dongle_type;
 554         /* Dongle's downstream count. */
 555         union sink_count sink_count;
 556         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 557         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 558         bool is_dp_hdmi_s3d_converter;
 559
 560         bool allow_invalid_MSA_timing_param;
 561         bool panel_mode_edp;
 562         uint32_t sink_dev_id;
 563         uint32_t branch_dev_id;
 564         int8_t branch_dev_name[6];
 565         int8_t branch_hw_revision;
 566 };
 567
 568 struct dc_link_status {
 569         struct dpcd_caps *dpcd_caps;
 570 };
 571
 572 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 573
 574 /*
 575  * Return an enumerated dc_link.  dc_link order is constant and determined at
 576  * boot time.  They cannot be created or destroyed.
 577  * Use dc_get_caps() to get number of links.
 578  */
 579 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 580
 581 /* Return id of physical connector represented by a dc_link at link_index.*/
 582 const struct graphics_object_id dc_get_link_id_at_index(
 583                 struct dc *dc, uint32_t link_index);
 584
 585 /* Set backlight level of an embedded panel (eDP, LVDS). */
 586 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 587                 uint32_t frame_ramp, const struct dc_stream *stream);
 588
 589 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 590
 591 bool dc_link_setup_psr(const struct dc_link *dc_link,
 592                 const struct dc_stream *stream);
 593
 594 /* Request DC to detect if there is a Panel connected.
 595  * boot - If this call is during initial boot.
 596  * Return false for any type of detection failure or MST detection
 597  * true otherwise. True meaning further action is required (status update
 598  * and OS notification).
 599  */
 600 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 601
 602 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 603  * Return:
 604  * true - Downstream port status changed. DM should call DC to do the
 605  * detection.
 606  * false - no change in Downstream port status. No further action required
 607  * from DM. */
 608 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 609
 610 struct dc_sink_init_data;
 611
 612 struct dc_sink *dc_link_add_remote_sink(
 613                 const struct dc_link *dc_link,
 614                 const uint8_t *edid,
 615                 int len,
 616                 struct dc_sink_init_data *init_data);
 617
 618 void dc_link_remove_remote_sink(
 619         const struct dc_link *link,
 620         const struct dc_sink *sink);
 621
 622 /* Used by diagnostics for virtual link at the moment */
 623 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 624
 625 void dc_link_dp_set_drive_settings(
 626         struct dc_link *link,
 627         struct link_training_settings *lt_settings);
 628
 629 bool dc_link_dp_perform_link_training(
 630         struct dc_link *link,
 631         const struct dc_link_settings *link_setting,
 632         bool skip_video_pattern);
 633
 634 void dc_link_dp_enable_hpd(const struct dc_link *link);
 635
 636 void dc_link_dp_disable_hpd(const struct dc_link *link);
 637
 638 bool dc_link_dp_set_test_pattern(
 639         const struct dc_link *link,
 640         enum dp_test_pattern test_pattern,
 641         const struct link_training_settings *p_link_settings,
 642         const unsigned char *p_custom_pattern,
 643         unsigned int cust_pattern_size);
 644
 645 /*******************************************************************************
 646  * Sink Interfaces - A sink corresponds to a display output device
 647  ******************************************************************************/
 648
 649 /*
 650  * The sink structure contains EDID and other display device properties
 651  */
 652 struct dc_sink {
 653         enum signal_type sink_signal;
 654         struct dc_edid dc_edid; /* raw edid */
 655         struct dc_edid_caps edid_caps; /* parse display caps */
 656 };
 657
 658 void dc_sink_retain(const struct dc_sink *sink);
 659 void dc_sink_release(const struct dc_sink *sink);
 660
 661 const struct audio **dc_get_audios(struct dc *dc);
 662
 663 struct dc_sink_init_data {
 664         enum signal_type sink_signal;
 665         const struct dc_link *link;
 666         uint32_t dongle_max_pix_clk;
 667         bool converter_disable_audio;
 668 };
 669
 670 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 671
 672 /*******************************************************************************
 673  * Cursor interfaces - To manages the cursor within a stream
 674  ******************************************************************************/
 675 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 676 bool dc_stream_set_cursor_attributes(
 677         const struct dc_stream *stream,
 678         const struct dc_cursor_attributes *attributes);
 679
 680 bool dc_stream_set_cursor_position(
 681         const struct dc_stream *stream,
 682         const struct dc_cursor_position *position);
 683
 684 /* Newer interfaces  */
 685 struct dc_cursor {
 686         struct dc_plane_address address;
 687         struct dc_cursor_attributes attributes;
 688 };
 689
 690 /*******************************************************************************
 691  * Interrupt interfaces
 692  ******************************************************************************/
 693 enum dc_irq_source dc_interrupt_to_irq_source(
 694                 struct dc *dc,
 695                 uint32_t src_id,
 696                 uint32_t ext_id);
 697 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 698 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 699 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 700                 struct dc *dc, uint32_t link_index);
 701
 702 /*******************************************************************************
 703  * Power Interfaces
 704  ******************************************************************************/
 705
 706 void dc_set_power_state(
 707                 struct dc *dc,
 708                 enum dc_acpi_cm_power_state power_state);
 709 void dc_resume(const struct dc *dc);
 710
 711 /*******************************************************************************
 712  * DDC Interfaces
 713  ******************************************************************************/
 714
 715 const struct ddc_service *dc_get_ddc_at_index(
 716                 struct dc *dc, uint32_t link_index);
 717
 718 /*
 719  * DPCD access interfaces
 720  */
 721
 722 bool dc_read_dpcd(
 723                 struct dc *dc,
 724                 uint32_t link_index,
 725                 uint32_t address,
 726                 uint8_t *data,
 727                 uint32_t size);
 728
 729 bool dc_write_dpcd(
 730                 struct dc *dc,
 731                 uint32_t link_index,
 732                 uint32_t address,
 733                 const uint8_t *data,
 734                 uint32_t size);
 735
 736 bool dc_query_ddc_data(
 737                 struct dc *dc,
 738                 uint32_t link_index,
 739                 uint32_t address,
 740                 uint8_t *write_buf,
 741                 uint32_t write_size,
 742                 uint8_t *read_buf,
 743                 uint32_t read_size);
 744
 745 bool dc_submit_i2c(
 746                 struct dc *dc,
 747                 uint32_t link_index,
 748                 struct i2c_command *cmd);
 749
 750
 751 #endif /* DC_INTERFACE_H_ */