drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_downscale_ratio;
  49         uint32_t i2c_speed_in_khz;
  50
  51         unsigned int max_cursor_size;
  52 };
  53
  54
  55 struct dc_dcc_surface_param {
  56         enum surface_pixel_format format;
  57         struct dc_size surface_size;
  58         enum dc_scan_direction scan;
  59 };
  60
  61 struct dc_dcc_setting {
  62         unsigned int max_compressed_blk_size;
  63         unsigned int max_uncompressed_blk_size;
  64         bool independent_64b_blks;
  65 };
  66
  67 struct dc_surface_dcc_cap {
  68         bool capable;
  69         bool const_color_support;
  70
  71         union {
  72                 struct {
  73                         struct dc_dcc_setting rgb;
  74                 } grph;
  75
  76                 struct {
  77                         struct dc_dcc_setting luma;
  78                         struct dc_dcc_setting chroma;
  79                 } video;
  80         };
  81 };
  82
  83 /* Forward declaration*/
  84 struct dc;
  85 struct dc_surface;
  86 struct validate_context;
  87
  88 struct dc_cap_funcs {
  89         int i;
  90 };
  91
  92 struct dc_stream_funcs {
  93         bool (*adjust_vmin_vmax)(struct dc *dc,
  94                         const struct dc_stream **stream,
  95                         int num_streams,
  96                         int vmin,
  97                         int vmax);
  98
  99         void (*stream_update_scaling)(const struct dc *dc,
 100                         const struct dc_stream *dc_stream,
 101                         const struct rect *src,
 102                         const struct rect *dst);
 103         bool (*set_gamut_remap)(struct dc *dc,
 104                         const struct dc_stream **stream, int num_streams);
 105         bool (*set_psr_enable)(struct dc *dc, bool enable);
 106         bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
 107 };
 108
 109 struct link_training_settings;
 110
 111 struct dc_link_funcs {
 112         void (*set_drive_settings)(struct dc *dc,
 113                         struct link_training_settings *lt_settings,
 114                         const struct dc_link *link);
 115         void (*perform_link_training)(struct dc *dc,
 116                         struct dc_link_settings *link_setting,
 117                         bool skip_video_pattern);
 118         void (*set_preferred_link_settings)(struct dc *dc,
 119                         struct dc_link_settings *link_setting,
 120                         const struct dc_link *link);
 121         void (*enable_hpd)(const struct dc_link *link);
 122         void (*disable_hpd)(const struct dc_link *link);
 123         void (*set_test_pattern)(
 124                         const struct dc_link *link,
 125                         enum dp_test_pattern test_pattern,
 126                         const struct link_training_settings *p_link_settings,
 127                         const unsigned char *p_custom_pattern,
 128                         unsigned int cust_pattern_size);
 129 };
 130
 131 /* Structure to hold configuration flags set by dm at dc creation. */
 132 struct dc_config {
 133         bool gpu_vm_support;
 134         bool disable_disp_pll_sharing;
 135 };
 136
 137 struct dc_debug {
 138         bool surface_visual_confirm;
 139         bool max_disp_clk;
 140         bool surface_trace;
 141         bool timing_trace;
 142         bool validation_trace;
 143         bool disable_stutter;
 144         bool disable_dcc;
 145         bool disable_dfs_bypass;
 146         bool disable_clock_gate;
 147         bool disable_dmcu;
 148         bool force_abm_enable;
 149 };
 150
 151 struct dc {
 152         struct dc_caps caps;
 153         struct dc_cap_funcs cap_funcs;
 154         struct dc_stream_funcs stream_funcs;
 155         struct dc_link_funcs link_funcs;
 156         struct dc_config config;
 157         struct dc_debug debug;
 158 };
 159
 160 struct dc_init_data {
 161         struct hw_asic_id asic_id;
 162         void *driver; /* ctx */
 163         struct cgs_device *cgs_device;
 164
 165         int num_virtual_links;
 166         /*
 167          * If 'vbios_override' not NULL, it will be called instead
 168          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 169          */
 170         struct dc_bios *vbios_override;
 171         enum dce_environment dce_environment;
 172
 173         struct dc_config flags;
 174 };
 175
 176 struct dc *dc_create(const struct dc_init_data *init_params);
 177
 178 void dc_destroy(struct dc **dc);
 179
 180 /*******************************************************************************
 181  * Surface Interfaces
 182  ******************************************************************************/
 183
 184 enum {
 185         TRANSFER_FUNC_POINTS = 1025
 186 };
 187
 188 struct dc_hdr_static_metadata {
 189         bool is_hdr;
 190
 191         /* display chromaticities and white point in units of 0.00001 */
 192         unsigned int chromaticity_green_x;
 193         unsigned int chromaticity_green_y;
 194         unsigned int chromaticity_blue_x;
 195         unsigned int chromaticity_blue_y;
 196         unsigned int chromaticity_red_x;
 197         unsigned int chromaticity_red_y;
 198         unsigned int chromaticity_white_point_x;
 199         unsigned int chromaticity_white_point_y;
 200
 201         uint32_t min_luminance;
 202         uint32_t max_luminance;
 203         uint32_t maximum_content_light_level;
 204         uint32_t maximum_frame_average_light_level;
 205 };
 206
 207 enum dc_transfer_func_type {
 208         TF_TYPE_PREDEFINED,
 209         TF_TYPE_DISTRIBUTED_POINTS,
 210 };
 211
 212 struct dc_transfer_func_distributed_points {
 213         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 214         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 215         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 216
 217         uint16_t end_exponent;
 218         uint16_t x_point_at_y1_red;
 219         uint16_t x_point_at_y1_green;
 220         uint16_t x_point_at_y1_blue;
 221 };
 222
 223 enum dc_transfer_func_predefined {
 224         TRANSFER_FUNCTION_SRGB,
 225         TRANSFER_FUNCTION_BT709,
 226         TRANSFER_FUNCTION_PQ,
 227         TRANSFER_FUNCTION_LINEAR,
 228 };
 229
 230 struct dc_transfer_func {
 231         enum dc_transfer_func_type type;
 232         enum dc_transfer_func_predefined tf;
 233         struct dc_transfer_func_distributed_points tf_pts;
 234 };
 235
 236 struct dc_surface {
 237         bool visible;
 238         bool flip_immediate;
 239         struct dc_plane_address address;
 240
 241         struct scaling_taps scaling_quality;
 242         struct rect src_rect;
 243         struct rect dst_rect;
 244         struct rect clip_rect;
 245
 246         union plane_size plane_size;
 247         union dc_tiling_info tiling_info;
 248         struct dc_plane_dcc_param dcc;
 249         enum dc_color_space color_space;
 250
 251         enum surface_pixel_format format;
 252         enum dc_rotation_angle rotation;
 253         bool horizontal_mirror;
 254         enum plane_stereo_format stereo_format;
 255
 256         struct dc_hdr_static_metadata hdr_static_ctx;
 257
 258         const struct dc_gamma *gamma_correction;
 259         const struct dc_transfer_func *in_transfer_func;
 260 };
 261
 262 struct dc_plane_info {
 263         union plane_size plane_size;
 264         union dc_tiling_info tiling_info;
 265         struct dc_plane_dcc_param dcc;
 266         enum surface_pixel_format format;
 267         enum dc_rotation_angle rotation;
 268         bool horizontal_mirror;
 269         enum plane_stereo_format stereo_format;
 270         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 271         bool visible;
 272 };
 273
 274 struct dc_scaling_info {
 275                 struct rect src_rect;
 276                 struct rect dst_rect;
 277                 struct rect clip_rect;
 278                 struct scaling_taps scaling_quality;
 279 };
 280
 281 struct dc_surface_update {
 282         const struct dc_surface *surface;
 283
 284         /* isr safe update parameters.  null means no updates */
 285         struct dc_flip_addrs *flip_addr;
 286         struct dc_plane_info *plane_info;
 287         struct dc_scaling_info *scaling_info;
 288         /* following updates require alloc/sleep/spin that is not isr safe,
 289          * null means no updates
 290          */
 291         /* gamma TO BE REMOVED */
 292         struct dc_gamma *gamma;
 293         struct dc_hdr_static_metadata *hdr_static_metadata;
 294         struct dc_transfer_func *in_transfer_func;
 295         struct dc_transfer_func *out_transfer_func;
 296
 297
 298 };
 299 /*
 300  * This structure is filled in by dc_surface_get_status and contains
 301  * the last requested address and the currently active address so the called
 302  * can determine if there are any outstanding flips
 303  */
 304 struct dc_surface_status {
 305         struct dc_plane_address requested_address;
 306         struct dc_plane_address current_address;
 307         bool is_flip_pending;
 308 };
 309
 310 /*
 311  * Create a new surface with default parameters;
 312  */
 313 struct dc_surface *dc_create_surface(const struct dc *dc);
 314 const struct dc_surface_status *dc_surface_get_status(
 315                 const struct dc_surface *dc_surface);
 316
 317 void dc_surface_retain(const struct dc_surface *dc_surface);
 318 void dc_surface_release(const struct dc_surface *dc_surface);
 319
 320 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 321 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 322 struct dc_gamma *dc_create_gamma(void);
 323
 324 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 325 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 326 struct dc_transfer_func *dc_create_transfer_func(void);
 327
 328 /*
 329  * This structure holds a surface address.  There could be multiple addresses
 330  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 331  * as frame durations and DCC format can also be set.
 332  */
 333 struct dc_flip_addrs {
 334         struct dc_plane_address address;
 335         bool flip_immediate;
 336         /* TODO: add flip duration for FreeSync */
 337 };
 338
 339 /*
 340  * Optimized flip address update function.
 341  *
 342  * After this call:
 343  *   Surface addresses and flip attributes are programmed.
 344  *   Surface flip occur at next configured time (h_sync or v_sync flip)
 345  */
 346 void dc_flip_surface_addrs(struct dc *dc,
 347                 const struct dc_surface *const surfaces[],
 348                 struct dc_flip_addrs flip_addrs[],
 349                 uint32_t count);
 350
 351 /*
 352  * Set up surface attributes and associate to a stream
 353  * The surfaces parameter is an absolute set of all surface active for the stream.
 354  * If no surfaces are provided, the stream will be blanked; no memory read.
 355  * Any flip related attribute changes must be done through this interface.
 356  *
 357  * After this call:
 358  *   Surfaces attributes are programmed and configured to be composed into stream.
 359  *   This does not trigger a flip.  No surface address is programmed.
 360  */
 361
 362 bool dc_commit_surfaces_to_stream(
 363                 struct dc *dc,
 364                 const struct dc_surface **dc_surfaces,
 365                 uint8_t surface_count,
 366                 const struct dc_stream *stream);
 367
 368 bool dc_pre_update_surfaces_to_stream(
 369                 struct dc *dc,
 370                 const struct dc_surface *const *new_surfaces,
 371                 uint8_t new_surface_count,
 372                 const struct dc_stream *stream);
 373
 374 bool dc_post_update_surfaces_to_stream(
 375                 struct dc *dc);
 376
 377 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 378                 int surface_count, const struct dc_stream *stream);
 379
 380 /*******************************************************************************
 381  * Stream Interfaces
 382  ******************************************************************************/
 383 struct dc_stream {
 384         const struct dc_sink *sink;
 385         struct dc_crtc_timing timing;
 386
 387         enum dc_color_space output_color_space;
 388
 389         struct rect src; /* composition area */
 390         struct rect dst; /* stream addressable area */
 391
 392         struct audio_info audio_info;
 393
 394         bool ignore_msa_timing_param;
 395
 396         struct freesync_context freesync_ctx;
 397
 398         const struct dc_transfer_func *out_transfer_func;
 399         struct colorspace_transform gamut_remap_matrix;
 400         struct csc_transform csc_color_matrix;
 401
 402         /* TODO: dithering */
 403         /* TODO: custom INFO packets */
 404         /* TODO: ABM info (DMCU) */
 405         /* TODO: PSR info */
 406         /* TODO: CEA VIC */
 407 };
 408
 409 /*
 410  * Log the current stream state.
 411  */
 412 void dc_stream_log(
 413         const struct dc_stream *stream,
 414         struct dal_logger *dc_logger,
 415         enum dc_log_type log_type);
 416
 417 uint8_t dc_get_current_stream_count(const struct dc *dc);
 418 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 419
 420 /*
 421  * Return the current frame counter.
 422  */
 423 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 424
 425 /* TODO: Return parsed values rather than direct register read
 426  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 427  * being refactored properly to be dce-specific
 428  */
 429 uint32_t dc_stream_get_scanoutpos(
 430                 const struct dc_stream *stream, uint32_t *vbl, uint32_t *position);
 431
 432 /*
 433  * Structure to store surface/stream associations for validation
 434  */
 435 struct dc_validation_set {
 436         const struct dc_stream *stream;
 437         const struct dc_surface *surfaces[MAX_SURFACES];
 438         uint8_t surface_count;
 439 };
 440
 441 /*
 442  * This function takes a set of resources and checks that they are cofunctional.
 443  *
 444  * After this call:
 445  *   No hardware is programmed for call.  Only validation is done.
 446  */
 447 bool dc_validate_resources(
 448                 const struct dc *dc,
 449                 const struct dc_validation_set set[],
 450                 uint8_t set_count);
 451
 452 /*
 453  * This function takes a stream and checks if it is guaranteed to be supported.
 454  * Guaranteed means that MAX_COFUNC similar streams are supported.
 455  *
 456  * After this call:
 457  *   No hardware is programmed for call.  Only validation is done.
 458  */
 459
 460 bool dc_validate_guaranteed(
 461                 const struct dc *dc,
 462                 const struct dc_stream *stream);
 463
 464 /*
 465  * Set up streams and links associated to drive sinks
 466  * The streams parameter is an absolute set of all active streams.
 467  *
 468  * After this call:
 469  *   Phy, Encoder, Timing Generator are programmed and enabled.
 470  *   New streams are enabled with blank stream; no memory read.
 471  */
 472 bool dc_commit_streams(
 473                 struct dc *dc,
 474                 const struct dc_stream *streams[],
 475                 uint8_t stream_count);
 476
 477 /**
 478  * Create a new default stream for the requested sink
 479  */
 480 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 481
 482 void dc_stream_retain(const struct dc_stream *dc_stream);
 483 void dc_stream_release(const struct dc_stream *dc_stream);
 484
 485 struct dc_stream_status {
 486         int primary_otg_inst;
 487         int surface_count;
 488         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 489
 490         /*
 491          * link this stream passes through
 492          */
 493         const struct dc_link *link;
 494 };
 495
 496 const struct dc_stream_status *dc_stream_get_status(
 497         const struct dc_stream *dc_stream);
 498
 499 /*******************************************************************************
 500  * Link Interfaces
 501  ******************************************************************************/
 502
 503 /*
 504  * A link contains one or more sinks and their connected status.
 505  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 506  */
 507 struct dc_link {
 508         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 509         unsigned int sink_count;
 510         const struct dc_sink *local_sink;
 511         unsigned int link_index;
 512         enum dc_connection_type type;
 513         enum signal_type connector_signal;
 514         enum dc_irq_source irq_source_hpd;
 515         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 516         /* caps is the same as reported_link_cap. link_traing use
 517          * reported_link_cap. Will clean up.  TODO
 518          */
 519         struct dc_link_settings reported_link_cap;
 520         struct dc_link_settings verified_link_cap;
 521         struct dc_link_settings max_link_setting;
 522         struct dc_link_settings cur_link_settings;
 523         struct dc_lane_settings cur_lane_setting;
 524
 525         uint8_t ddc_hw_inst;
 526         uint8_t link_enc_hw_inst;
 527
 528         struct psr_caps psr_caps;
 529         bool test_pattern_enabled;
 530         union compliance_test_state compliance_test_state;
 531 };
 532
 533 struct dpcd_caps {
 534         union dpcd_rev dpcd_rev;
 535         union max_lane_count max_ln_count;
 536         union max_down_spread max_down_spread;
 537
 538         /* dongle type (DP converter, CV smart dongle) */
 539         enum display_dongle_type dongle_type;
 540         /* Dongle's downstream count. */
 541         union sink_count sink_count;
 542         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 543         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 544         bool is_dp_hdmi_s3d_converter;
 545
 546         bool allow_invalid_MSA_timing_param;
 547         bool panel_mode_edp;
 548         uint32_t sink_dev_id;
 549         uint32_t branch_dev_id;
 550         int8_t branch_dev_name[6];
 551         int8_t branch_hw_revision;
 552 };
 553
 554 struct dc_link_status {
 555         struct dpcd_caps *dpcd_caps;
 556 };
 557
 558 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 559
 560 /*
 561  * Return an enumerated dc_link.  dc_link order is constant and determined at
 562  * boot time.  They cannot be created or destroyed.
 563  * Use dc_get_caps() to get number of links.
 564  */
 565 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 566
 567 /* Return id of physical connector represented by a dc_link at link_index.*/
 568 const struct graphics_object_id dc_get_link_id_at_index(
 569                 struct dc *dc, uint32_t link_index);
 570
 571 /* Set backlight level of an embedded panel (eDP, LVDS). */
 572 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 573                 uint32_t frame_ramp, const struct dc_stream *stream);
 574
 575 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 576
 577 bool dc_link_setup_psr(const struct dc_link *dc_link,
 578                 const struct dc_stream *stream);
 579
 580 /* Request DC to detect if there is a Panel connected.
 581  * boot - If this call is during initial boot.
 582  * Return false for any type of detection failure or MST detection
 583  * true otherwise. True meaning further action is required (status update
 584  * and OS notification).
 585  */
 586 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 587
 588 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 589  * Return:
 590  * true - Downstream port status changed. DM should call DC to do the
 591  * detection.
 592  * false - no change in Downstream port status. No further action required
 593  * from DM. */
 594 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 595
 596 struct dc_sink_init_data;
 597
 598 struct dc_sink *dc_link_add_remote_sink(
 599                 const struct dc_link *dc_link,
 600                 const uint8_t *edid,
 601                 int len,
 602                 struct dc_sink_init_data *init_data);
 603
 604 void dc_link_remove_remote_sink(
 605         const struct dc_link *link,
 606         const struct dc_sink *sink);
 607
 608 /* Used by diagnostics for virtual link at the moment */
 609 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 610
 611 void dc_link_dp_set_drive_settings(
 612         struct dc_link *link,
 613         struct link_training_settings *lt_settings);
 614
 615 bool dc_link_dp_perform_link_training(
 616         struct dc_link *link,
 617         const struct dc_link_settings *link_setting,
 618         bool skip_video_pattern);
 619
 620 void dc_link_dp_enable_hpd(const struct dc_link *link);
 621
 622 void dc_link_dp_disable_hpd(const struct dc_link *link);
 623
 624 bool dc_link_dp_set_test_pattern(
 625         const struct dc_link *link,
 626         enum dp_test_pattern test_pattern,
 627         const struct link_training_settings *p_link_settings,
 628         const unsigned char *p_custom_pattern,
 629         unsigned int cust_pattern_size);
 630
 631 /*******************************************************************************
 632  * Sink Interfaces - A sink corresponds to a display output device
 633  ******************************************************************************/
 634
 635 /*
 636  * The sink structure contains EDID and other display device properties
 637  */
 638 struct dc_sink {
 639         enum signal_type sink_signal;
 640         struct dc_edid dc_edid; /* raw edid */
 641         struct dc_edid_caps edid_caps; /* parse display caps */
 642 };
 643
 644 void dc_sink_retain(const struct dc_sink *sink);
 645 void dc_sink_release(const struct dc_sink *sink);
 646
 647 const struct audio **dc_get_audios(struct dc *dc);
 648
 649 struct dc_sink_init_data {
 650         enum signal_type sink_signal;
 651         const struct dc_link *link;
 652         uint32_t dongle_max_pix_clk;
 653         bool converter_disable_audio;
 654 };
 655
 656 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 657
 658 /*******************************************************************************
 659  * Cursor interfaces - To manages the cursor within a stream
 660  ******************************************************************************/
 661 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 662 bool dc_stream_set_cursor_attributes(
 663         const struct dc_stream *stream,
 664         const struct dc_cursor_attributes *attributes);
 665
 666 bool dc_stream_set_cursor_position(
 667         const struct dc_stream *stream,
 668         const struct dc_cursor_position *position);
 669
 670 /* Newer interfaces  */
 671 struct dc_cursor {
 672         struct dc_plane_address address;
 673         struct dc_cursor_attributes attributes;
 674 };
 675
 676 /*******************************************************************************
 677  * Interrupt interfaces
 678  ******************************************************************************/
 679 enum dc_irq_source dc_interrupt_to_irq_source(
 680                 struct dc *dc,
 681                 uint32_t src_id,
 682                 uint32_t ext_id);
 683 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 684 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 685 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 686                 struct dc *dc, uint32_t link_index);
 687
 688 /*******************************************************************************
 689  * Power Interfaces
 690  ******************************************************************************/
 691
 692 void dc_set_power_state(
 693                 struct dc *dc,
 694                 enum dc_acpi_cm_power_state power_state,
 695                 enum dc_video_power_state video_power_state);
 696 void dc_resume(const struct dc *dc);
 697
 698 /*******************************************************************************
 699  * DDC Interfaces
 700  ******************************************************************************/
 701
 702 const struct ddc_service *dc_get_ddc_at_index(
 703                 struct dc *dc, uint32_t link_index);
 704
 705 /*
 706  * DPCD access interfaces
 707  */
 708
 709 bool dc_read_dpcd(
 710                 struct dc *dc,
 711                 uint32_t link_index,
 712                 uint32_t address,
 713                 uint8_t *data,
 714                 uint32_t size);
 715
 716 bool dc_write_dpcd(
 717                 struct dc *dc,
 718                 uint32_t link_index,
 719                 uint32_t address,
 720                 const uint8_t *data,
 721         uint32_t size);
 722
 723 bool dc_submit_i2c(
 724                 struct dc *dc,
 725                 uint32_t link_index,
 726                 struct i2c_command *cmd);
 727
 728
 729 #endif /* DC_INTERFACE_H_ */