drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_surfaces;
  49         uint32_t max_downscale_ratio;
  50         uint32_t i2c_speed_in_khz;
  51
  52         unsigned int max_cursor_size;
  53 };
  54
  55
  56 struct dc_dcc_surface_param {
  57         enum surface_pixel_format format;
  58         struct dc_size surface_size;
  59         enum swizzle_mode_values swizzle_mode;
  60         enum dc_scan_direction scan;
  61 };
  62
  63 struct dc_dcc_setting {
  64         unsigned int max_compressed_blk_size;
  65         unsigned int max_uncompressed_blk_size;
  66         bool independent_64b_blks;
  67 };
  68
  69 struct dc_surface_dcc_cap {
  70         bool capable;
  71         bool const_color_support;
  72
  73         union {
  74                 struct {
  75                         struct dc_dcc_setting rgb;
  76                 } grph;
  77
  78                 struct {
  79                         struct dc_dcc_setting luma;
  80                         struct dc_dcc_setting chroma;
  81                 } video;
  82         };
  83 };
  84
  85 struct dc_static_screen_events {
  86         bool cursor_update;
  87         bool surface_update;
  88         bool overlay_update;
  89 };
  90
  91 /* Forward declaration*/
  92 struct dc;
  93 struct dc_surface;
  94 struct validate_context;
  95
  96 struct dc_cap_funcs {
  97 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
  98         bool (*get_dcc_compression_cap)(const struct dc *dc,
  99                         const struct dc_dcc_surface_param *input,
 100                         struct dc_surface_dcc_cap *output);
 101 #else
 102         int i;
 103 #endif
 104 };
 105
 106 struct dc_stream_funcs {
 107         bool (*adjust_vmin_vmax)(struct dc *dc,
 108                         const struct dc_stream **stream,
 109                         int num_streams,
 110                         int vmin,
 111                         int vmax);
 112         bool (*get_crtc_position)(struct dc *dc,
 113                         const struct dc_stream **stream,
 114                         int num_streams,
 115                         unsigned int *v_pos,
 116                         unsigned int *nom_v_pos);
 117
 118
 119         void (*stream_update_scaling)(const struct dc *dc,
 120                         const struct dc_stream *dc_stream,
 121                         const struct rect *src,
 122                         const struct rect *dst);
 123
 124         bool (*set_gamut_remap)(struct dc *dc,
 125                         const struct dc_stream *stream);
 126
 127         void (*set_static_screen_events)(struct dc *dc,
 128                         const struct dc_stream **stream,
 129                         int num_streams,
 130                         const struct dc_static_screen_events *events);
 131
 132         void (*set_dither_option)(const struct dc_stream *stream,
 133                         enum dc_dither_option option);
 134 };
 135
 136 struct link_training_settings;
 137
 138 struct dc_link_funcs {
 139         void (*set_drive_settings)(struct dc *dc,
 140                         struct link_training_settings *lt_settings,
 141                         const struct dc_link *link);
 142         void (*perform_link_training)(struct dc *dc,
 143                         struct dc_link_settings *link_setting,
 144                         bool skip_video_pattern);
 145         void (*set_preferred_link_settings)(struct dc *dc,
 146                         struct dc_link_settings *link_setting,
 147                         const struct dc_link *link);
 148         void (*enable_hpd)(const struct dc_link *link);
 149         void (*disable_hpd)(const struct dc_link *link);
 150         void (*set_test_pattern)(
 151                         const struct dc_link *link,
 152                         enum dp_test_pattern test_pattern,
 153                         const struct link_training_settings *p_link_settings,
 154                         const unsigned char *p_custom_pattern,
 155                         unsigned int cust_pattern_size);
 156 };
 157
 158 /* Structure to hold configuration flags set by dm at dc creation. */
 159 struct dc_config {
 160         bool gpu_vm_support;
 161         bool disable_disp_pll_sharing;
 162 };
 163
 164 struct dc_debug {
 165         bool surface_visual_confirm;
 166         bool max_disp_clk;
 167         bool surface_trace;
 168         bool timing_trace;
 169         bool validation_trace;
 170         bool disable_stutter;
 171         bool disable_dcc;
 172         bool disable_dfs_bypass;
 173 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
 174         bool disable_dpp_power_gate;
 175         bool disable_hubp_power_gate;
 176         bool disable_pplib_wm_range;
 177         bool use_dml_wm;
 178         bool use_max_voltage;
 179         int sr_exit_time_ns;
 180         int sr_enter_plus_exit_time_ns;
 181         int urgent_latency_ns;
 182         int percent_of_ideal_drambw;
 183         int dram_clock_change_latency_ns;
 184         int always_scale;
 185 #endif
 186         bool disable_pplib_clock_request;
 187         bool disable_clock_gate;
 188         bool disable_dmcu;
 189         bool force_abm_enable;
 190 };
 191
 192 struct dc {
 193         struct dc_caps caps;
 194         struct dc_cap_funcs cap_funcs;
 195         struct dc_stream_funcs stream_funcs;
 196         struct dc_link_funcs link_funcs;
 197         struct dc_config config;
 198         struct dc_debug debug;
 199 };
 200
 201 enum frame_buffer_mode {
 202         FRAME_BUFFER_MODE_LOCAL_ONLY = 0,
 203         FRAME_BUFFER_MODE_ZFB_ONLY,
 204         FRAME_BUFFER_MODE_MIXED_ZFB_AND_LOCAL,
 205 } ;
 206
 207 struct dchub_init_data {
 208         bool dchub_initialzied;
 209         bool dchub_info_valid;
 210         int64_t zfb_phys_addr_base;
 211         int64_t zfb_mc_base_addr;
 212         uint64_t zfb_size_in_byte;
 213         enum frame_buffer_mode fb_mode;
 214 };
 215
 216 struct dc_init_data {
 217         struct hw_asic_id asic_id;
 218         void *driver; /* ctx */
 219         struct cgs_device *cgs_device;
 220
 221         int num_virtual_links;
 222         /*
 223          * If 'vbios_override' not NULL, it will be called instead
 224          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 225          */
 226         struct dc_bios *vbios_override;
 227         enum dce_environment dce_environment;
 228
 229         struct dc_config flags;
 230 };
 231
 232 struct dc *dc_create(const struct dc_init_data *init_params);
 233
 234 void dc_destroy(struct dc **dc);
 235
 236 bool dc_init_dchub(struct dc *dc, struct dchub_init_data *dh_data);
 237
 238 /*******************************************************************************
 239  * Surface Interfaces
 240  ******************************************************************************/
 241
 242 enum {
 243         TRANSFER_FUNC_POINTS = 1025
 244 };
 245
 246 struct dc_hdr_static_metadata {
 247         bool hdr_supported;
 248         bool is_hdr;
 249
 250         /* display chromaticities and white point in units of 0.00001 */
 251         unsigned int chromaticity_green_x;
 252         unsigned int chromaticity_green_y;
 253         unsigned int chromaticity_blue_x;
 254         unsigned int chromaticity_blue_y;
 255         unsigned int chromaticity_red_x;
 256         unsigned int chromaticity_red_y;
 257         unsigned int chromaticity_white_point_x;
 258         unsigned int chromaticity_white_point_y;
 259
 260         uint32_t min_luminance;
 261         uint32_t max_luminance;
 262         uint32_t maximum_content_light_level;
 263         uint32_t maximum_frame_average_light_level;
 264 };
 265
 266 enum dc_transfer_func_type {
 267         TF_TYPE_PREDEFINED,
 268         TF_TYPE_DISTRIBUTED_POINTS,
 269         TF_TYPE_BYPASS,
 270         TF_TYPE_UNKNOWN
 271 };
 272
 273 struct dc_transfer_func_distributed_points {
 274         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 275         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 276         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 277
 278         uint16_t end_exponent;
 279         uint16_t x_point_at_y1_red;
 280         uint16_t x_point_at_y1_green;
 281         uint16_t x_point_at_y1_blue;
 282 };
 283
 284 enum dc_transfer_func_predefined {
 285         TRANSFER_FUNCTION_SRGB,
 286         TRANSFER_FUNCTION_BT709,
 287         TRANSFER_FUNCTION_PQ,
 288         TRANSFER_FUNCTION_LINEAR,
 289 };
 290
 291 struct dc_transfer_func {
 292         enum dc_transfer_func_type type;
 293         enum dc_transfer_func_predefined tf;
 294         struct dc_transfer_func_distributed_points tf_pts;
 295 };
 296
 297 struct dc_surface {
 298         bool visible;
 299         bool flip_immediate;
 300         struct dc_plane_address address;
 301
 302         struct scaling_taps scaling_quality;
 303         struct rect src_rect;
 304         struct rect dst_rect;
 305         struct rect clip_rect;
 306
 307         union plane_size plane_size;
 308         union dc_tiling_info tiling_info;
 309         struct dc_plane_dcc_param dcc;
 310         enum dc_color_space color_space;
 311
 312         enum surface_pixel_format format;
 313         enum dc_rotation_angle rotation;
 314         bool horizontal_mirror;
 315         enum plane_stereo_format stereo_format;
 316
 317         struct dc_hdr_static_metadata hdr_static_ctx;
 318
 319         const struct dc_gamma *gamma_correction;
 320         const struct dc_transfer_func *in_transfer_func;
 321 };
 322
 323 struct dc_plane_info {
 324         union plane_size plane_size;
 325         union dc_tiling_info tiling_info;
 326         struct dc_plane_dcc_param dcc;
 327         enum surface_pixel_format format;
 328         enum dc_rotation_angle rotation;
 329         bool horizontal_mirror;
 330         enum plane_stereo_format stereo_format;
 331         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 332         bool visible;
 333 };
 334
 335 struct dc_scaling_info {
 336                 struct rect src_rect;
 337                 struct rect dst_rect;
 338                 struct rect clip_rect;
 339                 struct scaling_taps scaling_quality;
 340 };
 341
 342 struct dc_surface_update {
 343         const struct dc_surface *surface;
 344
 345         /* isr safe update parameters.  null means no updates */
 346         struct dc_flip_addrs *flip_addr;
 347         struct dc_plane_info *plane_info;
 348         struct dc_scaling_info *scaling_info;
 349         /* following updates require alloc/sleep/spin that is not isr safe,
 350          * null means no updates
 351          */
 352         /* gamma TO BE REMOVED */
 353         struct dc_gamma *gamma;
 354         struct dc_transfer_func *in_transfer_func;
 355         struct dc_hdr_static_metadata *hdr_static_metadata;
 356 };
 357 /*
 358  * This structure is filled in by dc_surface_get_status and contains
 359  * the last requested address and the currently active address so the called
 360  * can determine if there are any outstanding flips
 361  */
 362 struct dc_surface_status {
 363         struct dc_plane_address requested_address;
 364         struct dc_plane_address current_address;
 365         bool is_flip_pending;
 366 };
 367
 368 /*
 369  * Create a new surface with default parameters;
 370  */
 371 struct dc_surface *dc_create_surface(const struct dc *dc);
 372 const struct dc_surface_status *dc_surface_get_status(
 373                 const struct dc_surface *dc_surface);
 374
 375 void dc_surface_retain(const struct dc_surface *dc_surface);
 376 void dc_surface_release(const struct dc_surface *dc_surface);
 377
 378 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 379 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 380 struct dc_gamma *dc_create_gamma(void);
 381
 382 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 383 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 384 struct dc_transfer_func *dc_create_transfer_func(void);
 385
 386 /*
 387  * This structure holds a surface address.  There could be multiple addresses
 388  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 389  * as frame durations and DCC format can also be set.
 390  */
 391 struct dc_flip_addrs {
 392         struct dc_plane_address address;
 393         bool flip_immediate;
 394         /* TODO: add flip duration for FreeSync */
 395 };
 396
 397 /*
 398  * Set up surface attributes and associate to a stream
 399  * The surfaces parameter is an absolute set of all surface active for the stream.
 400  * If no surfaces are provided, the stream will be blanked; no memory read.
 401  * Any flip related attribute changes must be done through this interface.
 402  *
 403  * After this call:
 404  *   Surfaces attributes are programmed and configured to be composed into stream.
 405  *   This does not trigger a flip.  No surface address is programmed.
 406  */
 407
 408 bool dc_commit_surfaces_to_stream(
 409                 struct dc *dc,
 410                 const struct dc_surface **dc_surfaces,
 411                 uint8_t surface_count,
 412                 const struct dc_stream *stream);
 413
 414 bool dc_pre_update_surfaces_to_stream(
 415                 struct dc *dc,
 416                 const struct dc_surface *const *new_surfaces,
 417                 uint8_t new_surface_count,
 418                 const struct dc_stream *stream);
 419
 420 bool dc_post_update_surfaces_to_stream(
 421                 struct dc *dc);
 422
 423 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 424                 int surface_count, const struct dc_stream *stream);
 425
 426 /* Surface update type is used by dc_update_surfaces_and_stream
 427  * The update type is determined at the very beginning of the function based
 428  * on parameters passed in and decides how much programming (or updating) is
 429  * going to be done during the call.
 430  *
 431  * UPDATE_TYPE_FAST is used for really fast updates that do not require much
 432  * logical calculations or hardware register programming. This update MUST be
 433  * ISR safe on windows. Currently fast update will only be used to flip surface
 434  * address.
 435  *
 436  * UPDATE_TYPE_MED is used for slower updates which require significant hw
 437  * re-programming however do not affect bandwidth consumption or clock
 438  * requirements. At present, this is the level at which front end updates
 439  * that do not require us to run bw_calcs happen. These are in/out transfer func
 440  * updates, viewport offset changes, recout size changes and pixel depth changes.
 441  * This update can be done at ISR, but we want to minimize how often this happens.
 442  *
 443  * UPDATE_TYPE_FULL is slow. Really slow. This requires us to recalculate our
 444  * bandwidth and clocks, possibly rearrange some pipes and reprogram anything front
 445  * end related. Any time viewport dimensions, recout dimensions, scaling ratios or
 446  * gamma need to be adjusted or pipe needs to be turned on (or disconnected) we do
 447  * a full update. This cannot be done at ISR level and should be a rare event.
 448  * Unless someone is stress testing mpo enter/exit, playing with colour or adjusting
 449  * underscan we don't expect to see this call at all.
 450  */
 451
 452 enum surface_update_type {
 453         UPDATE_TYPE_FAST, /* super fast, safe to execute in isr */
 454         UPDATE_TYPE_MED,  /* ISR safe, most of programming needed, no bw/clk change*/
 455         UPDATE_TYPE_FULL, /* may need to shuffle resources */
 456 };
 457
 458 /*******************************************************************************
 459  * Stream Interfaces
 460  ******************************************************************************/
 461 struct dc_stream {
 462         const struct dc_sink *sink;
 463         struct dc_crtc_timing timing;
 464         enum signal_type output_signal;
 465
 466         enum dc_color_space output_color_space;
 467         enum dc_dither_option dither_option;
 468
 469         struct rect src; /* composition area */
 470         struct rect dst; /* stream addressable area */
 471
 472         struct audio_info audio_info;
 473
 474         bool ignore_msa_timing_param;
 475
 476         struct freesync_context freesync_ctx;
 477
 478         const struct dc_transfer_func *out_transfer_func;
 479         struct colorspace_transform gamut_remap_matrix;
 480         struct csc_transform csc_color_matrix;
 481
 482         /* TODO: custom INFO packets */
 483         /* TODO: ABM info (DMCU) */
 484         /* TODO: PSR info */
 485         /* TODO: CEA VIC */
 486 };
 487
 488 struct dc_stream_update {
 489         struct rect src;
 490         struct rect dst;
 491         struct dc_transfer_func *out_transfer_func;
 492 };
 493
 494
 495 /*
 496  * Setup stream attributes if no stream updates are provided
 497  * there will be no impact on the stream parameters
 498  *
 499  * Set up surface attributes and associate to a stream
 500  * The surfaces parameter is an absolute set of all surface active for the stream.
 501  * If no surfaces are provided, the stream will be blanked; no memory read.
 502  * Any flip related attribute changes must be done through this interface.
 503  *
 504  * After this call:
 505  *   Surfaces attributes are programmed and configured to be composed into stream.
 506  *   This does not trigger a flip.  No surface address is programmed.
 507  *
 508  */
 509
 510 void dc_update_surfaces_and_stream(struct dc *dc,
 511                 struct dc_surface_update *surface_updates, int surface_count,
 512                 const struct dc_stream *dc_stream,
 513                 struct dc_stream_update *stream_update);
 514
 515 /*
 516  * Log the current stream state.
 517  */
 518 void dc_stream_log(
 519         const struct dc_stream *stream,
 520         struct dal_logger *dc_logger,
 521         enum dc_log_type log_type);
 522
 523 uint8_t dc_get_current_stream_count(const struct dc *dc);
 524 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 525
 526 /*
 527  * Return the current frame counter.
 528  */
 529 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 530
 531 /* TODO: Return parsed values rather than direct register read
 532  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 533  * being refactored properly to be dce-specific
 534  */
 535 bool dc_stream_get_scanoutpos(const struct dc_stream *stream,
 536                                   uint32_t *v_blank_start,
 537                                   uint32_t *v_blank_end,
 538                                   uint32_t *h_position,
 539                                   uint32_t *v_position);
 540
 541 /*
 542  * Structure to store surface/stream associations for validation
 543  */
 544 struct dc_validation_set {
 545         const struct dc_stream *stream;
 546         const struct dc_surface *surfaces[MAX_SURFACES];
 547         uint8_t surface_count;
 548 };
 549
 550 /*
 551  * This function takes a set of resources and checks that they are cofunctional.
 552  *
 553  * After this call:
 554  *   No hardware is programmed for call.  Only validation is done.
 555  */
 556 struct validate_context *dc_get_validate_context(
 557                 const struct dc *dc,
 558                 const struct dc_validation_set set[],
 559                 uint8_t set_count);
 560
 561 bool dc_validate_resources(
 562                 const struct dc *dc,
 563                 const struct dc_validation_set set[],
 564                 uint8_t set_count);
 565
 566 /*
 567  * This function takes a stream and checks if it is guaranteed to be supported.
 568  * Guaranteed means that MAX_COFUNC similar streams are supported.
 569  *
 570  * After this call:
 571  *   No hardware is programmed for call.  Only validation is done.
 572  */
 573
 574 bool dc_validate_guaranteed(
 575                 const struct dc *dc,
 576                 const struct dc_stream *stream);
 577
 578 void dc_resource_validate_ctx_copy_construct(
 579                 const struct validate_context *src_ctx,
 580                 struct validate_context *dst_ctx);
 581
 582 void dc_resource_validate_ctx_destruct(struct validate_context *context);
 583
 584 /*
 585  * Set up streams and links associated to drive sinks
 586  * The streams parameter is an absolute set of all active streams.
 587  *
 588  * After this call:
 589  *   Phy, Encoder, Timing Generator are programmed and enabled.
 590  *   New streams are enabled with blank stream; no memory read.
 591  */
 592 bool dc_commit_streams(
 593                 struct dc *dc,
 594                 const struct dc_stream *streams[],
 595                 uint8_t stream_count);
 596
 597 /**
 598  * Create a new default stream for the requested sink
 599  */
 600 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 601
 602 void dc_stream_retain(const struct dc_stream *dc_stream);
 603 void dc_stream_release(const struct dc_stream *dc_stream);
 604
 605 struct dc_stream_status {
 606         int primary_otg_inst;
 607         int surface_count;
 608         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 609
 610         /*
 611          * link this stream passes through
 612          */
 613         const struct dc_link *link;
 614 };
 615
 616 const struct dc_stream_status *dc_stream_get_status(
 617         const struct dc_stream *dc_stream);
 618
 619 enum surface_update_type dc_check_update_surfaces_for_stream(
 620                 struct dc *dc,
 621                 struct dc_surface_update *updates,
 622                 int surface_count,
 623                 struct dc_stream_update *stream_update,
 624                 const struct dc_stream_status *stream_status);
 625
 626 /*******************************************************************************
 627  * Link Interfaces
 628  ******************************************************************************/
 629
 630 /*
 631  * A link contains one or more sinks and their connected status.
 632  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 633  */
 634 struct dc_link {
 635         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 636         unsigned int sink_count;
 637         const struct dc_sink *local_sink;
 638         unsigned int link_index;
 639         enum dc_connection_type type;
 640         enum signal_type connector_signal;
 641         enum dc_irq_source irq_source_hpd;
 642         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 643         /* caps is the same as reported_link_cap. link_traing use
 644          * reported_link_cap. Will clean up.  TODO
 645          */
 646         struct dc_link_settings reported_link_cap;
 647         struct dc_link_settings verified_link_cap;
 648         struct dc_link_settings max_link_setting;
 649         struct dc_link_settings cur_link_settings;
 650         struct dc_lane_settings cur_lane_setting;
 651
 652         uint8_t ddc_hw_inst;
 653         uint8_t link_enc_hw_inst;
 654
 655         bool test_pattern_enabled;
 656         union compliance_test_state compliance_test_state;
 657
 658         void *priv;
 659         bool aux_mode;
 660
 661         struct ddc_service *ddc;
 662 };
 663
 664 struct dpcd_caps {
 665         union dpcd_rev dpcd_rev;
 666         union max_lane_count max_ln_count;
 667         union max_down_spread max_down_spread;
 668
 669         /* dongle type (DP converter, CV smart dongle) */
 670         enum display_dongle_type dongle_type;
 671         /* Dongle's downstream count. */
 672         union sink_count sink_count;
 673         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 674         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 675         struct dc_dongle_caps dongle_caps;
 676
 677         bool allow_invalid_MSA_timing_param;
 678         bool panel_mode_edp;
 679         uint32_t sink_dev_id;
 680         uint32_t branch_dev_id;
 681         int8_t branch_dev_name[6];
 682         int8_t branch_hw_revision;
 683 };
 684
 685 struct dc_link_status {
 686         struct dpcd_caps *dpcd_caps;
 687 };
 688
 689 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 690
 691 /*
 692  * Return an enumerated dc_link.  dc_link order is constant and determined at
 693  * boot time.  They cannot be created or destroyed.
 694  * Use dc_get_caps() to get number of links.
 695  */
 696 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 697
 698 /* Return id of physical connector represented by a dc_link at link_index.*/
 699 const struct graphics_object_id dc_get_link_id_at_index(
 700                 struct dc *dc, uint32_t link_index);
 701
 702 /* Set backlight level of an embedded panel (eDP, LVDS). */
 703 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 704                 uint32_t frame_ramp, const struct dc_stream *stream);
 705
 706 bool dc_link_set_abm_disable(const struct dc_link *dc_link);
 707
 708 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 709
 710 bool dc_link_setup_psr(const struct dc_link *dc_link,
 711                 const struct dc_stream *stream, struct psr_config *psr_config);
 712
 713 /* Request DC to detect if there is a Panel connected.
 714  * boot - If this call is during initial boot.
 715  * Return false for any type of detection failure or MST detection
 716  * true otherwise. True meaning further action is required (status update
 717  * and OS notification).
 718  */
 719 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 720
 721 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 722  * Return:
 723  * true - Downstream port status changed. DM should call DC to do the
 724  * detection.
 725  * false - no change in Downstream port status. No further action required
 726  * from DM. */
 727 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 728
 729 struct dc_sink_init_data;
 730
 731 struct dc_sink *dc_link_add_remote_sink(
 732                 const struct dc_link *dc_link,
 733                 const uint8_t *edid,
 734                 int len,
 735                 struct dc_sink_init_data *init_data);
 736
 737 void dc_link_remove_remote_sink(
 738         const struct dc_link *link,
 739         const struct dc_sink *sink);
 740
 741 /* Used by diagnostics for virtual link at the moment */
 742 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 743
 744 void dc_link_dp_set_drive_settings(
 745         const struct dc_link *link,
 746         struct link_training_settings *lt_settings);
 747
 748 bool dc_link_dp_perform_link_training(
 749         struct dc_link *link,
 750         const struct dc_link_settings *link_setting,
 751         bool skip_video_pattern);
 752
 753 void dc_link_dp_enable_hpd(const struct dc_link *link);
 754
 755 void dc_link_dp_disable_hpd(const struct dc_link *link);
 756
 757 bool dc_link_dp_set_test_pattern(
 758         const struct dc_link *link,
 759         enum dp_test_pattern test_pattern,
 760         const struct link_training_settings *p_link_settings,
 761         const unsigned char *p_custom_pattern,
 762         unsigned int cust_pattern_size);
 763
 764 /*******************************************************************************
 765  * Sink Interfaces - A sink corresponds to a display output device
 766  ******************************************************************************/
 767
 768 struct dc_container_id {
 769         // 128bit GUID in binary form
 770         unsigned char  guid[16];
 771         // 8 byte port ID -> ELD.PortID
 772         unsigned int   portId[2];
 773         // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
 774         unsigned short manufacturerName;
 775         // 2 byte product code -> ELD.ProductCode
 776         unsigned short productCode;
 777 };
 778
 779 /*
 780  * The sink structure contains EDID and other display device properties
 781  */
 782 struct dc_sink {
 783         enum signal_type sink_signal;
 784         struct dc_edid dc_edid; /* raw edid */
 785         struct dc_edid_caps edid_caps; /* parse display caps */
 786         struct dc_container_id *dc_container_id;
 787         uint32_t dongle_max_pix_clk;
 788         bool converter_disable_audio;
 789         void *priv;
 790 };
 791
 792 void dc_sink_retain(const struct dc_sink *sink);
 793 void dc_sink_release(const struct dc_sink *sink);
 794
 795 const struct audio **dc_get_audios(struct dc *dc);
 796
 797 struct dc_sink_init_data {
 798         enum signal_type sink_signal;
 799         const struct dc_link *link;
 800         uint32_t dongle_max_pix_clk;
 801         bool converter_disable_audio;
 802 };
 803
 804 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 805 bool dc_sink_get_container_id(struct dc_sink *dc_sink, struct dc_container_id *container_id);
 806 bool dc_sink_set_container_id(struct dc_sink *dc_sink, const struct dc_container_id *container_id);
 807
 808 /*******************************************************************************
 809  * Cursor interfaces - To manages the cursor within a stream
 810  ******************************************************************************/
 811 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 812 bool dc_stream_set_cursor_attributes(
 813         const struct dc_stream *stream,
 814         const struct dc_cursor_attributes *attributes);
 815
 816 bool dc_stream_set_cursor_position(
 817         const struct dc_stream *stream,
 818         const struct dc_cursor_position *position);
 819
 820 /* Newer interfaces  */
 821 struct dc_cursor {
 822         struct dc_plane_address address;
 823         struct dc_cursor_attributes attributes;
 824 };
 825
 826 /*******************************************************************************
 827  * Interrupt interfaces
 828  ******************************************************************************/
 829 enum dc_irq_source dc_interrupt_to_irq_source(
 830                 struct dc *dc,
 831                 uint32_t src_id,
 832                 uint32_t ext_id);
 833 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 834 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 835 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 836                 struct dc *dc, uint32_t link_index);
 837
 838 /*******************************************************************************
 839  * Power Interfaces
 840  ******************************************************************************/
 841
 842 void dc_set_power_state(
 843                 struct dc *dc,
 844                 enum dc_acpi_cm_power_state power_state);
 845 void dc_resume(const struct dc *dc);
 846
 847 /*
 848  * DPCD access interfaces
 849  */
 850
 851 bool dc_read_aux_dpcd(
 852                 struct dc *dc,
 853                 uint32_t link_index,
 854                 uint32_t address,
 855                 uint8_t *data,
 856                 uint32_t size);
 857
 858 bool dc_write_aux_dpcd(
 859                 struct dc *dc,
 860                 uint32_t link_index,
 861                 uint32_t address,
 862                 const uint8_t *data,
 863                 uint32_t size);
 864
 865 bool dc_read_aux_i2c(
 866                 struct dc *dc,
 867                 uint32_t link_index,
 868                 enum i2c_mot_mode mot,
 869                 uint32_t address,
 870                 uint8_t *data,
 871                 uint32_t size);
 872
 873 bool dc_write_aux_i2c(
 874                 struct dc *dc,
 875                 uint32_t link_index,
 876                 enum i2c_mot_mode mot,
 877                 uint32_t address,
 878                 const uint8_t *data,
 879                 uint32_t size);
 880
 881 bool dc_query_ddc_data(
 882                 struct dc *dc,
 883                 uint32_t link_index,
 884                 uint32_t address,
 885                 uint8_t *write_buf,
 886                 uint32_t write_size,
 887                 uint8_t *read_buf,
 888                 uint32_t read_size);
 889
 890 bool dc_submit_i2c(
 891                 struct dc *dc,
 892                 uint32_t link_index,
 893                 struct i2c_command *cmd);
 894
 895
 896 #endif /* DC_INTERFACE_H_ */