drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_TARGETS 6
  36 #define MAX_SURFACES 3
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_targets;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_downscale_ratio;
  49         uint32_t i2c_speed_in_khz;
  50 };
  51
  52
  53 struct dc_dcc_surface_param {
  54         enum surface_pixel_format format;
  55         struct dc_size surface_size;
  56         enum dc_scan_direction scan;
  57 };
  58
  59 struct dc_dcc_setting {
  60         unsigned int max_compressed_blk_size;
  61         unsigned int max_uncompressed_blk_size;
  62         bool independent_64b_blks;
  63 };
  64
  65 struct dc_surface_dcc_cap {
  66         bool capable;
  67         bool const_color_support;
  68
  69         union {
  70                 struct {
  71                         struct dc_dcc_setting rgb;
  72                 } grph;
  73
  74                 struct {
  75                         struct dc_dcc_setting luma;
  76                         struct dc_dcc_setting chroma;
  77                 } video;
  78         };
  79 };
  80
  81 /* Forward declaration*/
  82 struct dc;
  83 struct dc_surface;
  84 struct validate_context;
  85
  86 struct dc_cap_funcs {
  87         int i;
  88 };
  89
  90 struct dc_stream_funcs {
  91         bool (*adjust_vmin_vmax)(struct dc *dc,
  92                         const struct dc_stream **stream,
  93                         int num_streams,
  94                         int vmin,
  95                         int vmax);
  96
  97         void (*stream_update_scaling)(const struct dc *dc,
  98                         const struct dc_stream *dc_stream,
  99                         const struct rect *src,
 100                         const struct rect *dst);
 101         bool (*set_gamut_remap)(struct dc *dc,
 102                         const struct dc_stream **stream, int num_streams);
 103         bool (*set_backlight)(struct dc *dc, unsigned int backlight_level,
 104                 unsigned int frame_ramp, const struct dc_stream *stream);
 105         bool (*init_dmcu_backlight_settings)(struct dc *dc);
 106         bool (*set_abm_level)(struct dc *dc, unsigned int abm_level);
 107         bool (*set_psr_enable)(struct dc *dc, bool enable);
 108         bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
 109 };
 110
 111 struct link_training_settings;
 112
 113 struct dc_link_funcs {
 114         void (*set_drive_settings)(struct dc *dc,
 115                         struct link_training_settings *lt_settings);
 116         void (*perform_link_training)(struct dc *dc,
 117                         struct dc_link_settings *link_setting,
 118                         bool skip_video_pattern);
 119         void (*set_preferred_link_settings)(struct dc *dc,
 120                         struct dc_link_settings *link_setting);
 121         void (*enable_hpd)(const struct dc_link *link);
 122         void (*disable_hpd)(const struct dc_link *link);
 123         void (*set_test_pattern)(
 124                         const struct dc_link *link,
 125                         enum dp_test_pattern test_pattern,
 126                         const struct link_training_settings *p_link_settings,
 127                         const unsigned char *p_custom_pattern,
 128                         unsigned int cust_pattern_size);
 129 };
 130
 131 /* Structure to hold configuration flags set by dm at dc creation. */
 132 struct dc_config {
 133         bool gpu_vm_support;
 134         bool disable_disp_pll_sharing;
 135 };
 136
 137 struct dc_debug {
 138         bool surface_visual_confirm;
 139         bool max_disp_clk;
 140         bool target_trace;
 141         bool surface_trace;
 142         bool timing_trace;
 143         bool validation_trace;
 144         bool disable_stutter;
 145         bool disable_dcc;
 146         bool disable_dfs_bypass;
 147         bool disable_power_gate;
 148         bool disable_clock_gate;
 149         bool disable_dmcu;
 150 };
 151
 152 struct dc {
 153         struct dc_caps caps;
 154         struct dc_cap_funcs cap_funcs;
 155         struct dc_stream_funcs stream_funcs;
 156         struct dc_link_funcs link_funcs;
 157         struct dc_config config;
 158         struct dc_debug debug;
 159 };
 160
 161 struct dc_init_data {
 162         struct hw_asic_id asic_id;
 163         void *driver; /* ctx */
 164         struct cgs_device *cgs_device;
 165
 166         int num_virtual_links;
 167         /*
 168          * If 'vbios_override' not NULL, it will be called instead
 169          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 170          */
 171         struct dc_bios *vbios_override;
 172         enum dce_environment dce_environment;
 173
 174         struct dc_config flags;
 175 };
 176
 177 struct dc *dc_create(const struct dc_init_data *init_params);
 178
 179 void dc_destroy(struct dc **dc);
 180
 181 /*******************************************************************************
 182  * Surface Interfaces
 183  ******************************************************************************/
 184
 185 enum {
 186         RGB_256X3X16 = 256,
 187         FLOAT_GAMMA_RAMP_MAX = 1025,
 188         TRANSFER_FUNC_POINTS = 1025
 189 };
 190
 191 enum dc_gamma_ramp_type {
 192         GAMMA_RAMP_RBG256X3X16,
 193         GAMMA_RAMP_FLOAT,
 194 };
 195
 196 struct float_rgb {
 197         struct fixed32_32 red;
 198         struct fixed32_32 green;
 199         struct fixed32_32 blue;
 200 };
 201
 202 struct dc_gamma_ramp_float {
 203         struct float_rgb scale;
 204         struct float_rgb offset;
 205         struct float_rgb gamma_curve[FLOAT_GAMMA_RAMP_MAX];
 206 };
 207
 208 struct dc_gamma_ramp_rgb256x3x16 {
 209         uint16_t red[RGB_256X3X16];
 210         uint16_t green[RGB_256X3X16];
 211         uint16_t blue[RGB_256X3X16];
 212 };
 213
 214 struct dc_gamma {
 215         enum dc_gamma_ramp_type type;
 216         union {
 217                 struct dc_gamma_ramp_rgb256x3x16 gamma_ramp_rgb256x3x16;
 218                 struct dc_gamma_ramp_float gamma_ramp_float;
 219         };
 220         uint32_t size;
 221 };
 222
 223 enum dc_transfer_func_type {
 224         TF_TYPE_PREDEFINED,
 225         TF_TYPE_DISTRIBUTED_POINTS,
 226 };
 227
 228 struct dc_transfer_func_distributed_points {
 229         uint16_t red[TRANSFER_FUNC_POINTS];
 230         uint16_t green[TRANSFER_FUNC_POINTS];
 231         uint16_t blue[TRANSFER_FUNC_POINTS];
 232         uint16_t end_exponent;
 233         uint16_t x_point_at_y1;
 234 };
 235
 236 enum dc_transfer_func_predefined {
 237         TRANSFER_FUNCTION_SRGB,
 238         TRANSFER_FUNCTION_BT709,
 239         TRANSFER_FUNCTION_PQ,
 240         TRANSFER_FUNCTION_LINEAR,
 241 };
 242
 243 struct dc_transfer_func {
 244         enum dc_transfer_func_type type;
 245         enum dc_transfer_func_predefined tf;
 246         struct dc_transfer_func_distributed_points tf_pts;
 247 };
 248
 249 struct dc_surface {
 250         bool visible;
 251         bool flip_immediate;
 252         struct dc_plane_address address;
 253
 254         struct scaling_taps scaling_quality;
 255         struct rect src_rect;
 256         struct rect dst_rect;
 257         struct rect clip_rect;
 258
 259         union plane_size plane_size;
 260         union dc_tiling_info tiling_info;
 261         struct dc_plane_dcc_param dcc;
 262         enum dc_color_space color_space;
 263
 264         enum surface_pixel_format format;
 265         enum dc_rotation_angle rotation;
 266         bool horizontal_mirror;
 267         enum plane_stereo_format stereo_format;
 268
 269         /* TO BE REMOVED AFTER BELOW TRANSFER FUNCTIONS IMPLEMENTED */
 270         const struct dc_gamma *gamma_correction;
 271
 272         const struct dc_transfer_func *in_transfer_func;
 273 };
 274
 275 struct dc_plane_info {
 276         union plane_size plane_size;
 277         union dc_tiling_info tiling_info;
 278         enum surface_pixel_format format;
 279         enum dc_rotation_angle rotation;
 280         bool horizontal_mirror;
 281         enum plane_stereo_format stereo_format;
 282         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 283         bool visible;
 284 };
 285
 286 struct dc_scaling_info {
 287                 struct rect src_rect;
 288                 struct rect dst_rect;
 289                 struct rect clip_rect;
 290                 struct scaling_taps scaling_quality;
 291 };
 292
 293 struct dc_surface_update {
 294         const struct dc_surface *surface;
 295
 296         /* isr safe update parameters.  null means no updates */
 297         struct dc_flip_addrs *flip_addr;
 298         struct dc_plane_info *plane_info;
 299         struct dc_scaling_info *scaling_info;
 300         /* following updates require alloc/sleep/spin that is not isr safe,
 301          * null means no updates
 302          */
 303         /* gamma TO BE REMOVED */
 304         struct dc_gamma *gamma;
 305
 306         struct dc_transfer_func *in_transfer_func;
 307         struct dc_transfer_func *out_transfer_func;
 308
 309
 310 };
 311 /*
 312  * This structure is filled in by dc_surface_get_status and contains
 313  * the last requested address and the currently active address so the called
 314  * can determine if there are any outstanding flips
 315  */
 316 struct dc_surface_status {
 317         struct dc_plane_address requested_address;
 318         struct dc_plane_address current_address;
 319         bool is_flip_pending;
 320 };
 321
 322 /*
 323  * Create a new surface with default parameters;
 324  */
 325 struct dc_surface *dc_create_surface(const struct dc *dc);
 326 const struct dc_surface_status *dc_surface_get_status(
 327                 const struct dc_surface *dc_surface);
 328
 329 void dc_surface_retain(const struct dc_surface *dc_surface);
 330 void dc_surface_release(const struct dc_surface *dc_surface);
 331
 332 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 333 void dc_gamma_release(const struct dc_gamma *dc_gamma);
 334 struct dc_gamma *dc_create_gamma(void);
 335
 336 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 337 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 338 struct dc_transfer_func *dc_create_transfer_func(void);
 339
 340 /*
 341  * This structure holds a surface address.  There could be multiple addresses
 342  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 343  * as frame durations and DCC format can also be set.
 344  */
 345 struct dc_flip_addrs {
 346         struct dc_plane_address address;
 347         bool flip_immediate;
 348         /* TODO: DCC format info */
 349         /* TODO: add flip duration for FreeSync */
 350 };
 351
 352 /*
 353  * Optimized flip address update function.
 354  *
 355  * After this call:
 356  *   Surface addresses and flip attributes are programmed.
 357  *   Surface flip occur at next configured time (h_sync or v_sync flip)
 358  */
 359 void dc_flip_surface_addrs(struct dc *dc,
 360                 const struct dc_surface *const surfaces[],
 361                 struct dc_flip_addrs flip_addrs[],
 362                 uint32_t count);
 363
 364 /*
 365  * Set up surface attributes and associate to a target
 366  * The surfaces parameter is an absolute set of all surface active for the target.
 367  * If no surfaces are provided, the target will be blanked; no memory read.
 368  * Any flip related attribute changes must be done through this interface.
 369  *
 370  * After this call:
 371  *   Surfaces attributes are programmed and configured to be composed into target.
 372  *   This does not trigger a flip.  No surface address is programmed.
 373  */
 374
 375 bool dc_commit_surfaces_to_target(
 376                 struct dc *dc,
 377                 const struct dc_surface **dc_surfaces,
 378                 uint8_t surface_count,
 379                 struct dc_target *dc_target);
 380
 381 bool dc_pre_update_surfaces_to_target(
 382                 struct dc *dc,
 383                 const struct dc_surface *const *new_surfaces,
 384                 uint8_t new_surface_count,
 385                 struct dc_target *dc_target);
 386
 387 bool dc_post_update_surfaces_to_target(
 388                 struct dc *dc);
 389
 390 void dc_update_surfaces_for_target(struct dc *dc, struct dc_surface_update *updates,
 391                 int surface_count, struct dc_target *dc_target);
 392
 393 /*******************************************************************************
 394  * Target Interfaces
 395  ******************************************************************************/
 396 #define MAX_STREAM_NUM 1
 397
 398 struct dc_target {
 399         uint8_t stream_count;
 400         const struct dc_stream *streams[MAX_STREAM_NUM];
 401 };
 402
 403 /*
 404  * Target status is returned from dc_target_get_status in order to get the
 405  * the IRQ source, current frame counter and currently attached surfaces.
 406  */
 407 struct dc_target_status {
 408         int primary_otg_inst;
 409         int cur_frame_count;
 410         int surface_count;
 411         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 412 };
 413
 414 struct dc_target *dc_create_target_for_streams(
 415                 struct dc_stream *dc_streams[],
 416                 uint8_t stream_count);
 417
 418 /*
 419  * Get the current target status.
 420  */
 421 const struct dc_target_status *dc_target_get_status(
 422                                         const struct dc_target* dc_target);
 423
 424 void dc_target_retain(const struct dc_target *dc_target);
 425 void dc_target_release(const struct dc_target *dc_target);
 426 void dc_target_log(
 427         const struct dc_target *dc_target,
 428         struct dal_logger *dc_logger,
 429         enum dc_log_type log_type);
 430
 431 uint8_t dc_get_current_target_count(const struct dc *dc);
 432 struct dc_target *dc_get_target_at_index(const struct dc *dc, uint8_t i);
 433
 434 bool dc_target_is_connected_to_sink(
 435                 const struct dc_target *dc_target,
 436                 const struct dc_sink *dc_sink);
 437
 438 uint32_t dc_target_get_vblank_counter(const struct dc_target *dc_target);
 439
 440 /* TODO: Return parsed values rather than direct register read
 441  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 442  * being refactored properly to be dce-specific
 443  */
 444 uint32_t dc_target_get_scanoutpos(
 445                 const struct dc_target *dc_target,
 446                 uint32_t *vbl,
 447                 uint32_t *position);
 448
 449 /*
 450  * Structure to store surface/target associations for validation
 451  */
 452 struct dc_validation_set {
 453         const struct dc_target *target;
 454         const struct dc_surface *surfaces[MAX_SURFACES];
 455         uint8_t surface_count;
 456 };
 457
 458 /*
 459  * This function takes a set of resources and checks that they are cofunctional.
 460  *
 461  * After this call:
 462  *   No hardware is programmed for call.  Only validation is done.
 463  */
 464 bool dc_validate_resources(
 465                 const struct dc *dc,
 466                 const struct dc_validation_set set[],
 467                 uint8_t set_count);
 468
 469 /*
 470  * This function takes a target and checks if it is guaranteed to be supported.
 471  * Guaranteed means that MAX_COFUNC*target is supported.
 472  *
 473  * After this call:
 474  *   No hardware is programmed for call.  Only validation is done.
 475  */
 476
 477 bool dc_validate_guaranteed(
 478                 const struct dc *dc,
 479                 const struct dc_target *dc_target);
 480
 481 /*
 482  * Set up streams and links associated to targets to drive sinks
 483  * The targets parameter is an absolute set of all active targets.
 484  *
 485  * After this call:
 486  *   Phy, Encoder, Timing Generator are programmed and enabled.
 487  *   New targets are enabled with blank stream; no memory read.
 488  */
 489 bool dc_commit_targets(
 490                 struct dc *dc,
 491                 struct dc_target *targets[],
 492                 uint8_t target_count);
 493
 494 /*******************************************************************************
 495  * Stream Interfaces
 496  ******************************************************************************/
 497 struct dc_stream {
 498         const struct dc_sink *sink;
 499         struct dc_crtc_timing timing;
 500
 501         enum dc_color_space output_color_space;
 502
 503         struct rect src; /* viewport in target space*/
 504         struct rect dst; /* stream addressable area */
 505
 506         struct audio_info audio_info;
 507
 508         bool ignore_msa_timing_param;
 509
 510         struct freesync_context freesync_ctx;
 511
 512         const struct dc_transfer_func *out_transfer_func;
 513         struct colorspace_transform gamut_remap_matrix;
 514         struct csc_transform csc_color_matrix;
 515
 516         /* TODO: dithering */
 517         /* TODO: custom INFO packets */
 518         /* TODO: ABM info (DMCU) */
 519         /* TODO: PSR info */
 520         /* TODO: CEA VIC */
 521 };
 522
 523 /**
 524  * Create a new default stream for the requested sink
 525  */
 526 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 527
 528 void dc_stream_retain(const struct dc_stream *dc_stream);
 529 void dc_stream_release(const struct dc_stream *dc_stream);
 530
 531 struct dc_stream_status {
 532         /*
 533          * link this stream passes through
 534          */
 535         const struct dc_link *link;
 536 };
 537
 538 const struct dc_stream_status *dc_stream_get_status(
 539         const struct dc_stream *dc_stream);
 540
 541 /*******************************************************************************
 542  * Link Interfaces
 543  ******************************************************************************/
 544
 545 /*
 546  * A link contains one or more sinks and their connected status.
 547  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 548  */
 549 struct dc_link {
 550         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 551         unsigned int sink_count;
 552         const struct dc_sink *local_sink;
 553         unsigned int link_index;
 554         enum dc_connection_type type;
 555         enum signal_type connector_signal;
 556         enum dc_irq_source irq_source_hpd;
 557         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 558         /* caps is the same as reported_link_cap. link_traing use
 559          * reported_link_cap. Will clean up.  TODO
 560          */
 561         struct dc_link_settings reported_link_cap;
 562         struct dc_link_settings verified_link_cap;
 563         struct dc_link_settings max_link_setting;
 564         struct dc_link_settings cur_link_settings;
 565         struct dc_lane_settings cur_lane_setting;
 566
 567         uint8_t ddc_hw_inst;
 568         uint8_t link_enc_hw_inst;
 569
 570         struct psr_caps psr_caps;
 571         bool test_pattern_enabled;
 572         union compliance_test_state compliance_test_state;
 573 };
 574
 575 struct dpcd_caps {
 576         union dpcd_rev dpcd_rev;
 577         union max_lane_count max_ln_count;
 578         union max_down_spread max_down_spread;
 579
 580         /* dongle type (DP converter, CV smart dongle) */
 581         enum display_dongle_type dongle_type;
 582         /* Dongle's downstream count. */
 583         union sink_count sink_count;
 584         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 585         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 586         bool is_dp_hdmi_s3d_converter;
 587
 588         bool allow_invalid_MSA_timing_param;
 589         bool panel_mode_edp;
 590         uint32_t sink_dev_id;
 591         uint32_t branch_dev_id;
 592         int8_t branch_dev_name[6];
 593         int8_t branch_hw_revision;
 594 };
 595
 596 struct dc_link_status {
 597         struct dpcd_caps *dpcd_caps;
 598 };
 599
 600 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 601
 602 /*
 603  * Return an enumerated dc_link.  dc_link order is constant and determined at
 604  * boot time.  They cannot be created or destroyed.
 605  * Use dc_get_caps() to get number of links.
 606  */
 607 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 608
 609 /* Return id of physical connector represented by a dc_link at link_index.*/
 610 const struct graphics_object_id dc_get_link_id_at_index(
 611                 struct dc *dc, uint32_t link_index);
 612
 613 /* Set backlight level of an embedded panel (eDP, LVDS). */
 614 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 615                 uint32_t frame_ramp, const struct dc_stream *stream);
 616
 617 bool dc_link_init_dmcu_backlight_settings(const struct dc_link *dc_link);
 618
 619 bool dc_link_set_abm_level(const struct dc_link *dc_link, uint32_t level);
 620
 621 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 622
 623 bool dc_link_setup_psr(const struct dc_link *dc_link,
 624                 const struct dc_stream *stream);
 625
 626 /* Request DC to detect if there is a Panel connected.
 627  * boot - If this call is during initial boot.
 628  * Return false for any type of detection failure or MST detection
 629  * true otherwise. True meaning further action is required (status update
 630  * and OS notification).
 631  */
 632 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 633
 634 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 635  * Return:
 636  * true - Downstream port status changed. DM should call DC to do the
 637  * detection.
 638  * false - no change in Downstream port status. No further action required
 639  * from DM. */
 640 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 641
 642 struct dc_sink_init_data;
 643
 644 struct dc_sink *dc_link_add_remote_sink(
 645                 const struct dc_link *dc_link,
 646                 const uint8_t *edid,
 647                 int len,
 648                 struct dc_sink_init_data *init_data);
 649
 650 void dc_link_remove_remote_sink(
 651         const struct dc_link *link,
 652         const struct dc_sink *sink);
 653
 654 /* Used by diagnostics for virtual link at the moment */
 655 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 656
 657 void dc_link_dp_set_drive_settings(
 658         struct dc_link *link,
 659         struct link_training_settings *lt_settings);
 660
 661 bool dc_link_dp_perform_link_training(
 662         struct dc_link *link,
 663         const struct dc_link_settings *link_setting,
 664         bool skip_video_pattern);
 665
 666 void dc_link_dp_enable_hpd(const struct dc_link *link);
 667
 668 void dc_link_dp_disable_hpd(const struct dc_link *link);
 669
 670 bool dc_link_dp_set_test_pattern(
 671         const struct dc_link *link,
 672         enum dp_test_pattern test_pattern,
 673         const struct link_training_settings *p_link_settings,
 674         const unsigned char *p_custom_pattern,
 675         unsigned int cust_pattern_size);
 676
 677 /*******************************************************************************
 678  * Sink Interfaces - A sink corresponds to a display output device
 679  ******************************************************************************/
 680
 681 /*
 682  * The sink structure contains EDID and other display device properties
 683  */
 684 struct dc_sink {
 685         enum signal_type sink_signal;
 686         struct dc_edid dc_edid; /* raw edid */
 687         struct dc_edid_caps edid_caps; /* parse display caps */
 688 };
 689
 690 void dc_sink_retain(const struct dc_sink *sink);
 691 void dc_sink_release(const struct dc_sink *sink);
 692
 693 const struct audio **dc_get_audios(struct dc *dc);
 694
 695 struct dc_sink_init_data {
 696         enum signal_type sink_signal;
 697         const struct dc_link *link;
 698         uint32_t dongle_max_pix_clk;
 699         bool converter_disable_audio;
 700 };
 701
 702 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 703
 704 /*******************************************************************************
 705  * Cursor interfaces - To manages the cursor within a target
 706  ******************************************************************************/
 707 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 708 bool dc_target_set_cursor_attributes(
 709         struct dc_target *dc_target,
 710         const struct dc_cursor_attributes *attributes);
 711
 712 bool dc_target_set_cursor_position(
 713         struct dc_target *dc_target,
 714         const struct dc_cursor_position *position);
 715
 716 /* Newer interfaces  */
 717 struct dc_cursor {
 718         struct dc_plane_address address;
 719         struct dc_cursor_attributes attributes;
 720 };
 721
 722 /*
 723  * Create a new cursor with default values for a given target.
 724  */
 725 struct dc_cursor *dc_create_cursor_for_target(
 726                 const struct dc *dc,
 727                 struct dc_target *dc_target);
 728
 729 /**
 730  * Commit cursor attribute changes such as pixel format and dimensions and
 731  * surface address.
 732  *
 733  * After this call:
 734  *   Cursor address and format is programmed to the new values.
 735  *   Cursor position is unmodified.
 736  */
 737 bool dc_commit_cursor(
 738                 const struct dc *dc,
 739                 struct dc_cursor *cursor);
 740
 741 /*
 742  * Optimized cursor position update
 743  *
 744  * After this call:
 745  *   Cursor position will be programmed as well as enable/disable bit.
 746  */
 747 bool dc_set_cursor_position(
 748                 const struct dc *dc,
 749                 struct dc_cursor *cursor,
 750                 struct dc_cursor_position *pos);
 751
 752 /*******************************************************************************
 753  * Interrupt interfaces
 754  ******************************************************************************/
 755 enum dc_irq_source dc_interrupt_to_irq_source(
 756                 struct dc *dc,
 757                 uint32_t src_id,
 758                 uint32_t ext_id);
 759 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 760 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 761 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 762                 struct dc *dc, uint32_t link_index);
 763
 764 /*******************************************************************************
 765  * Power Interfaces
 766  ******************************************************************************/
 767
 768 void dc_set_power_state(
 769                 struct dc *dc,
 770                 enum dc_acpi_cm_power_state power_state,
 771                 enum dc_video_power_state video_power_state);
 772 void dc_resume(const struct dc *dc);
 773
 774 /*******************************************************************************
 775  * DDC Interfaces
 776  ******************************************************************************/
 777
 778 const struct ddc_service *dc_get_ddc_at_index(
 779                 struct dc *dc, uint32_t link_index);
 780
 781 /*
 782  * DPCD access interfaces
 783  */
 784
 785 bool dc_read_dpcd(
 786                 struct dc *dc,
 787                 uint32_t link_index,
 788                 uint32_t address,
 789                 uint8_t *data,
 790                 uint32_t size);
 791
 792 bool dc_write_dpcd(
 793                 struct dc *dc,
 794                 uint32_t link_index,
 795                 uint32_t address,
 796                 const uint8_t *data,
 797         uint32_t size);
 798
 799 bool dc_submit_i2c(
 800                 struct dc *dc,
 801                 uint32_t link_index,
 802                 struct i2c_command *cmd);
 803
 804 #endif /* DC_INTERFACE_H_ */