drivers/gpu/drm/amd/display/dc/dc.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_INTERFACE_H_
  27 #define DC_INTERFACE_H_
  28
  29 #include "dc_types.h"
  30 #include "grph_object_defs.h"
  31 #include "logger_types.h"
  32 #include "gpio_types.h"
  33 #include "link_service_types.h"
  34
  35 #define MAX_SURFACES 3
  36 #define MAX_STREAMS 6
  37 #define MAX_SINKS_PER_LINK 4
  38
  39 /*******************************************************************************
  40  * Display Core Interfaces
  41  ******************************************************************************/
  42
  43 struct dc_caps {
  44         uint32_t max_streams;
  45         uint32_t max_links;
  46         uint32_t max_audios;
  47         uint32_t max_slave_planes;
  48         uint32_t max_downscale_ratio;
  49         uint32_t i2c_speed_in_khz;
  50 };
  51
  52
  53 struct dc_dcc_surface_param {
  54         enum surface_pixel_format format;
  55         struct dc_size surface_size;
  56         enum dc_scan_direction scan;
  57 };
  58
  59 struct dc_dcc_setting {
  60         unsigned int max_compressed_blk_size;
  61         unsigned int max_uncompressed_blk_size;
  62         bool independent_64b_blks;
  63 };
  64
  65 struct dc_surface_dcc_cap {
  66         bool capable;
  67         bool const_color_support;
  68
  69         union {
  70                 struct {
  71                         struct dc_dcc_setting rgb;
  72                 } grph;
  73
  74                 struct {
  75                         struct dc_dcc_setting luma;
  76                         struct dc_dcc_setting chroma;
  77                 } video;
  78         };
  79 };
  80
  81 /* Forward declaration*/
  82 struct dc;
  83 struct dc_surface;
  84 struct validate_context;
  85
  86 struct dc_cap_funcs {
  87         int i;
  88 };
  89
  90 struct dc_stream_funcs {
  91         bool (*adjust_vmin_vmax)(struct dc *dc,
  92                         const struct dc_stream **stream,
  93                         int num_streams,
  94                         int vmin,
  95                         int vmax);
  96
  97         void (*stream_update_scaling)(const struct dc *dc,
  98                         const struct dc_stream *dc_stream,
  99                         const struct rect *src,
 100                         const struct rect *dst);
 101         bool (*set_gamut_remap)(struct dc *dc,
 102                         const struct dc_stream **stream, int num_streams);
 103         bool (*set_backlight)(struct dc *dc, unsigned int backlight_level,
 104                 unsigned int frame_ramp, const struct dc_stream *stream);
 105         bool (*init_dmcu_backlight_settings)(struct dc *dc);
 106         bool (*set_abm_level)(struct dc *dc, unsigned int abm_level);
 107         bool (*set_psr_enable)(struct dc *dc, bool enable);
 108         bool (*setup_psr)(struct dc *dc, const struct dc_stream *stream);
 109 };
 110
 111 struct link_training_settings;
 112
 113 struct dc_link_funcs {
 114         void (*set_drive_settings)(struct dc *dc,
 115                         struct link_training_settings *lt_settings,
 116                         const struct dc_link *link);
 117         void (*perform_link_training)(struct dc *dc,
 118                         struct dc_link_settings *link_setting,
 119                         bool skip_video_pattern);
 120         void (*set_preferred_link_settings)(struct dc *dc,
 121                         struct dc_link_settings *link_setting,
 122                         const struct dc_link *link);
 123         void (*enable_hpd)(const struct dc_link *link);
 124         void (*disable_hpd)(const struct dc_link *link);
 125         void (*set_test_pattern)(
 126                         const struct dc_link *link,
 127                         enum dp_test_pattern test_pattern,
 128                         const struct link_training_settings *p_link_settings,
 129                         const unsigned char *p_custom_pattern,
 130                         unsigned int cust_pattern_size);
 131 };
 132
 133 /* Structure to hold configuration flags set by dm at dc creation. */
 134 struct dc_config {
 135         bool gpu_vm_support;
 136         bool disable_disp_pll_sharing;
 137 };
 138
 139 struct dc_debug {
 140         bool surface_visual_confirm;
 141         bool max_disp_clk;
 142         bool surface_trace;
 143         bool timing_trace;
 144         bool validation_trace;
 145         bool disable_stutter;
 146         bool disable_dcc;
 147         bool disable_dfs_bypass;
 148         bool disable_power_gate;
 149         bool disable_clock_gate;
 150         bool disable_dmcu;
 151         bool disable_color_module;
 152 };
 153
 154 struct dc {
 155         struct dc_caps caps;
 156         struct dc_cap_funcs cap_funcs;
 157         struct dc_stream_funcs stream_funcs;
 158         struct dc_link_funcs link_funcs;
 159         struct dc_config config;
 160         struct dc_debug debug;
 161 };
 162
 163 struct dc_init_data {
 164         struct hw_asic_id asic_id;
 165         void *driver; /* ctx */
 166         struct cgs_device *cgs_device;
 167
 168         int num_virtual_links;
 169         /*
 170          * If 'vbios_override' not NULL, it will be called instead
 171          * of the real VBIOS. Intended use is Diagnostics on FPGA.
 172          */
 173         struct dc_bios *vbios_override;
 174         enum dce_environment dce_environment;
 175
 176         struct dc_config flags;
 177 };
 178
 179 struct dc *dc_create(const struct dc_init_data *init_params);
 180
 181 void dc_destroy(struct dc **dc);
 182
 183 /*******************************************************************************
 184  * Surface Interfaces
 185  ******************************************************************************/
 186
 187 enum {
 188         TRANSFER_FUNC_POINTS = 1025
 189 };
 190
 191 struct dc_hdr_static_metadata {
 192         bool is_hdr;
 193
 194         /* display chromaticities and white point in units of 0.00001 */
 195         unsigned int chromaticity_green_x;
 196         unsigned int chromaticity_green_y;
 197         unsigned int chromaticity_blue_x;
 198         unsigned int chromaticity_blue_y;
 199         unsigned int chromaticity_red_x;
 200         unsigned int chromaticity_red_y;
 201         unsigned int chromaticity_white_point_x;
 202         unsigned int chromaticity_white_point_y;
 203
 204         uint32_t min_luminance;
 205         uint32_t max_luminance;
 206         uint32_t maximum_content_light_level;
 207         uint32_t maximum_frame_average_light_level;
 208 };
 209
 210 enum dc_transfer_func_type {
 211         TF_TYPE_PREDEFINED,
 212         TF_TYPE_DISTRIBUTED_POINTS,
 213 };
 214
 215 struct dc_transfer_func_distributed_points {
 216         struct fixed31_32 red[TRANSFER_FUNC_POINTS];
 217         struct fixed31_32 green[TRANSFER_FUNC_POINTS];
 218         struct fixed31_32 blue[TRANSFER_FUNC_POINTS];
 219
 220         uint16_t end_exponent;
 221         uint16_t x_point_at_y1_red;
 222         uint16_t x_point_at_y1_green;
 223         uint16_t x_point_at_y1_blue;
 224 };
 225
 226 enum dc_transfer_func_predefined {
 227         TRANSFER_FUNCTION_SRGB,
 228         TRANSFER_FUNCTION_BT709,
 229         TRANSFER_FUNCTION_PQ,
 230         TRANSFER_FUNCTION_LINEAR,
 231 };
 232
 233 struct dc_transfer_func {
 234         enum dc_transfer_func_type type;
 235         enum dc_transfer_func_predefined tf;
 236         struct dc_transfer_func_distributed_points tf_pts;
 237 };
 238
 239 struct dc_surface {
 240         bool visible;
 241         bool flip_immediate;
 242         struct dc_plane_address address;
 243
 244         struct scaling_taps scaling_quality;
 245         struct rect src_rect;
 246         struct rect dst_rect;
 247         struct rect clip_rect;
 248
 249         union plane_size plane_size;
 250         union dc_tiling_info tiling_info;
 251         struct dc_plane_dcc_param dcc;
 252         enum dc_color_space color_space;
 253
 254         enum surface_pixel_format format;
 255         enum dc_rotation_angle rotation;
 256         bool horizontal_mirror;
 257         enum plane_stereo_format stereo_format;
 258
 259         struct dc_hdr_static_metadata hdr_static_ctx;
 260
 261         const struct dc_gamma *gamma_correction;
 262         const struct dc_transfer_func *in_transfer_func;
 263 };
 264
 265 struct dc_plane_info {
 266         union plane_size plane_size;
 267         union dc_tiling_info tiling_info;
 268         struct dc_plane_dcc_param dcc;
 269         enum surface_pixel_format format;
 270         enum dc_rotation_angle rotation;
 271         bool horizontal_mirror;
 272         enum plane_stereo_format stereo_format;
 273         enum dc_color_space color_space; /*todo: wrong place, fits in scaling info*/
 274         bool visible;
 275 };
 276
 277 struct dc_scaling_info {
 278                 struct rect src_rect;
 279                 struct rect dst_rect;
 280                 struct rect clip_rect;
 281                 struct scaling_taps scaling_quality;
 282 };
 283
 284 struct dc_surface_update {
 285         const struct dc_surface *surface;
 286
 287         /* isr safe update parameters.  null means no updates */
 288         struct dc_flip_addrs *flip_addr;
 289         struct dc_plane_info *plane_info;
 290         struct dc_scaling_info *scaling_info;
 291         /* following updates require alloc/sleep/spin that is not isr safe,
 292          * null means no updates
 293          */
 294         /* gamma TO BE REMOVED */
 295         struct dc_gamma *gamma;
 296         struct dc_hdr_static_metadata *hdr_static_metadata;
 297         struct dc_transfer_func *in_transfer_func;
 298         struct dc_transfer_func *out_transfer_func;
 299
 300
 301 };
 302 /*
 303  * This structure is filled in by dc_surface_get_status and contains
 304  * the last requested address and the currently active address so the called
 305  * can determine if there are any outstanding flips
 306  */
 307 struct dc_surface_status {
 308         struct dc_plane_address requested_address;
 309         struct dc_plane_address current_address;
 310         bool is_flip_pending;
 311 };
 312
 313 /*
 314  * Create a new surface with default parameters;
 315  */
 316 struct dc_surface *dc_create_surface(const struct dc *dc);
 317 const struct dc_surface_status *dc_surface_get_status(
 318                 const struct dc_surface *dc_surface);
 319
 320 void dc_surface_retain(const struct dc_surface *dc_surface);
 321 void dc_surface_release(const struct dc_surface *dc_surface);
 322
 323 void dc_gamma_retain(const struct dc_gamma *dc_gamma);
 324 void dc_gamma_release(const struct dc_gamma **dc_gamma);
 325 struct dc_gamma *dc_create_gamma(void);
 326
 327 void dc_transfer_func_retain(const struct dc_transfer_func *dc_tf);
 328 void dc_transfer_func_release(const struct dc_transfer_func *dc_tf);
 329 struct dc_transfer_func *dc_create_transfer_func(void);
 330
 331 /*
 332  * This structure holds a surface address.  There could be multiple addresses
 333  * in cases such as Stereo 3D, Planar YUV, etc.  Other per-flip attributes such
 334  * as frame durations and DCC format can also be set.
 335  */
 336 struct dc_flip_addrs {
 337         struct dc_plane_address address;
 338         bool flip_immediate;
 339         /* TODO: DCC format info */
 340         /* TODO: add flip duration for FreeSync */
 341 };
 342
 343 /*
 344  * Optimized flip address update function.
 345  *
 346  * After this call:
 347  *   Surface addresses and flip attributes are programmed.
 348  *   Surface flip occur at next configured time (h_sync or v_sync flip)
 349  */
 350 void dc_flip_surface_addrs(struct dc *dc,
 351                 const struct dc_surface *const surfaces[],
 352                 struct dc_flip_addrs flip_addrs[],
 353                 uint32_t count);
 354
 355 /*
 356  * Set up surface attributes and associate to a stream
 357  * The surfaces parameter is an absolute set of all surface active for the stream.
 358  * If no surfaces are provided, the stream will be blanked; no memory read.
 359  * Any flip related attribute changes must be done through this interface.
 360  *
 361  * After this call:
 362  *   Surfaces attributes are programmed and configured to be composed into stream.
 363  *   This does not trigger a flip.  No surface address is programmed.
 364  */
 365
 366 bool dc_commit_surfaces_to_stream(
 367                 struct dc *dc,
 368                 const struct dc_surface **dc_surfaces,
 369                 uint8_t surface_count,
 370                 const struct dc_stream *stream);
 371
 372 bool dc_pre_update_surfaces_to_stream(
 373                 struct dc *dc,
 374                 const struct dc_surface *const *new_surfaces,
 375                 uint8_t new_surface_count,
 376                 const struct dc_stream *stream);
 377
 378 bool dc_post_update_surfaces_to_stream(
 379                 struct dc *dc);
 380
 381 void dc_update_surfaces_for_stream(struct dc *dc, struct dc_surface_update *updates,
 382                 int surface_count, const struct dc_stream *stream);
 383
 384 /*******************************************************************************
 385  * Stream Interfaces
 386  ******************************************************************************/
 387 struct dc_stream {
 388         const struct dc_sink *sink;
 389         struct dc_crtc_timing timing;
 390
 391         enum dc_color_space output_color_space;
 392
 393         struct rect src; /* composition area */
 394         struct rect dst; /* stream addressable area */
 395
 396         struct audio_info audio_info;
 397
 398         bool ignore_msa_timing_param;
 399
 400         struct freesync_context freesync_ctx;
 401
 402         const struct dc_transfer_func *out_transfer_func;
 403         struct colorspace_transform gamut_remap_matrix;
 404         struct csc_transform csc_color_matrix;
 405
 406         /* TODO: dithering */
 407         /* TODO: custom INFO packets */
 408         /* TODO: ABM info (DMCU) */
 409         /* TODO: PSR info */
 410         /* TODO: CEA VIC */
 411 };
 412
 413 /*
 414  * Log the current stream state.
 415  */
 416 void dc_stream_log(
 417         const struct dc_stream *stream,
 418         struct dal_logger *dc_logger,
 419         enum dc_log_type log_type);
 420
 421 uint8_t dc_get_current_stream_count(const struct dc *dc);
 422 struct dc_stream *dc_get_stream_at_index(const struct dc *dc, uint8_t i);
 423
 424 /*
 425  * Return the current frame counter.
 426  */
 427 uint32_t dc_stream_get_vblank_counter(const struct dc_stream *stream);
 428
 429 /* TODO: Return parsed values rather than direct register read
 430  * This has a dependency on the caller (amdgpu_get_crtc_scanoutpos)
 431  * being refactored properly to be dce-specific
 432  */
 433 uint32_t dc_stream_get_scanoutpos(
 434                 const struct dc_stream *stream, uint32_t *vbl, uint32_t *position);
 435
 436 /*
 437  * Structure to store surface/stream associations for validation
 438  */
 439 struct dc_validation_set {
 440         const struct dc_stream *stream;
 441         const struct dc_surface *surfaces[MAX_SURFACES];
 442         uint8_t surface_count;
 443 };
 444
 445 /*
 446  * This function takes a set of resources and checks that they are cofunctional.
 447  *
 448  * After this call:
 449  *   No hardware is programmed for call.  Only validation is done.
 450  */
 451 bool dc_validate_resources(
 452                 const struct dc *dc,
 453                 const struct dc_validation_set set[],
 454                 uint8_t set_count);
 455
 456 /*
 457  * This function takes a stream and checks if it is guaranteed to be supported.
 458  * Guaranteed means that MAX_COFUNC similar streams are supported.
 459  *
 460  * After this call:
 461  *   No hardware is programmed for call.  Only validation is done.
 462  */
 463
 464 bool dc_validate_guaranteed(
 465                 const struct dc *dc,
 466                 const struct dc_stream *stream);
 467
 468 /*
 469  * Set up streams and links associated to drive sinks
 470  * The streams parameter is an absolute set of all active streams.
 471  *
 472  * After this call:
 473  *   Phy, Encoder, Timing Generator are programmed and enabled.
 474  *   New streams are enabled with blank stream; no memory read.
 475  */
 476 bool dc_commit_streams(
 477                 struct dc *dc,
 478                 const struct dc_stream *streams[],
 479                 uint8_t stream_count);
 480
 481 /**
 482  * Create a new default stream for the requested sink
 483  */
 484 struct dc_stream *dc_create_stream_for_sink(const struct dc_sink *dc_sink);
 485
 486 void dc_stream_retain(const struct dc_stream *dc_stream);
 487 void dc_stream_release(const struct dc_stream *dc_stream);
 488
 489 struct dc_stream_status {
 490         int primary_otg_inst;
 491         int surface_count;
 492         const struct dc_surface *surfaces[MAX_SURFACE_NUM];
 493
 494         /*
 495          * link this stream passes through
 496          */
 497         const struct dc_link *link;
 498 };
 499
 500 const struct dc_stream_status *dc_stream_get_status(
 501         const struct dc_stream *dc_stream);
 502
 503 /*******************************************************************************
 504  * Link Interfaces
 505  ******************************************************************************/
 506
 507 /*
 508  * A link contains one or more sinks and their connected status.
 509  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 510  */
 511 struct dc_link {
 512         const struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
 513         unsigned int sink_count;
 514         const struct dc_sink *local_sink;
 515         unsigned int link_index;
 516         enum dc_connection_type type;
 517         enum signal_type connector_signal;
 518         enum dc_irq_source irq_source_hpd;
 519         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
 520         /* caps is the same as reported_link_cap. link_traing use
 521          * reported_link_cap. Will clean up.  TODO
 522          */
 523         struct dc_link_settings reported_link_cap;
 524         struct dc_link_settings verified_link_cap;
 525         struct dc_link_settings max_link_setting;
 526         struct dc_link_settings cur_link_settings;
 527         struct dc_lane_settings cur_lane_setting;
 528
 529         uint8_t ddc_hw_inst;
 530         uint8_t link_enc_hw_inst;
 531
 532         struct psr_caps psr_caps;
 533         bool test_pattern_enabled;
 534         union compliance_test_state compliance_test_state;
 535 };
 536
 537 struct dpcd_caps {
 538         union dpcd_rev dpcd_rev;
 539         union max_lane_count max_ln_count;
 540         union max_down_spread max_down_spread;
 541
 542         /* dongle type (DP converter, CV smart dongle) */
 543         enum display_dongle_type dongle_type;
 544         /* Dongle's downstream count. */
 545         union sink_count sink_count;
 546         /* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
 547         indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
 548         bool is_dp_hdmi_s3d_converter;
 549
 550         bool allow_invalid_MSA_timing_param;
 551         bool panel_mode_edp;
 552         uint32_t sink_dev_id;
 553         uint32_t branch_dev_id;
 554         int8_t branch_dev_name[6];
 555         int8_t branch_hw_revision;
 556 };
 557
 558 struct dc_link_status {
 559         struct dpcd_caps *dpcd_caps;
 560 };
 561
 562 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 563
 564 /*
 565  * Return an enumerated dc_link.  dc_link order is constant and determined at
 566  * boot time.  They cannot be created or destroyed.
 567  * Use dc_get_caps() to get number of links.
 568  */
 569 const struct dc_link *dc_get_link_at_index(const struct dc *dc, uint32_t link_index);
 570
 571 /* Return id of physical connector represented by a dc_link at link_index.*/
 572 const struct graphics_object_id dc_get_link_id_at_index(
 573                 struct dc *dc, uint32_t link_index);
 574
 575 /* Set backlight level of an embedded panel (eDP, LVDS). */
 576 bool dc_link_set_backlight_level(const struct dc_link *dc_link, uint32_t level,
 577                 uint32_t frame_ramp, const struct dc_stream *stream);
 578
 579 bool dc_link_init_dmcu_backlight_settings(const struct dc_link *dc_link);
 580
 581 bool dc_link_set_abm_level(const struct dc_link *dc_link, uint32_t level);
 582
 583 bool dc_link_set_psr_enable(const struct dc_link *dc_link, bool enable);
 584
 585 bool dc_link_setup_psr(const struct dc_link *dc_link,
 586                 const struct dc_stream *stream);
 587
 588 /* Request DC to detect if there is a Panel connected.
 589  * boot - If this call is during initial boot.
 590  * Return false for any type of detection failure or MST detection
 591  * true otherwise. True meaning further action is required (status update
 592  * and OS notification).
 593  */
 594 bool dc_link_detect(const struct dc_link *dc_link, bool boot);
 595
 596 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 597  * Return:
 598  * true - Downstream port status changed. DM should call DC to do the
 599  * detection.
 600  * false - no change in Downstream port status. No further action required
 601  * from DM. */
 602 bool dc_link_handle_hpd_rx_irq(const struct dc_link *dc_link);
 603
 604 struct dc_sink_init_data;
 605
 606 struct dc_sink *dc_link_add_remote_sink(
 607                 const struct dc_link *dc_link,
 608                 const uint8_t *edid,
 609                 int len,
 610                 struct dc_sink_init_data *init_data);
 611
 612 void dc_link_remove_remote_sink(
 613         const struct dc_link *link,
 614         const struct dc_sink *sink);
 615
 616 /* Used by diagnostics for virtual link at the moment */
 617 void dc_link_set_sink(const struct dc_link *link, struct dc_sink *sink);
 618
 619 void dc_link_dp_set_drive_settings(
 620         struct dc_link *link,
 621         struct link_training_settings *lt_settings);
 622
 623 bool dc_link_dp_perform_link_training(
 624         struct dc_link *link,
 625         const struct dc_link_settings *link_setting,
 626         bool skip_video_pattern);
 627
 628 void dc_link_dp_enable_hpd(const struct dc_link *link);
 629
 630 void dc_link_dp_disable_hpd(const struct dc_link *link);
 631
 632 bool dc_link_dp_set_test_pattern(
 633         const struct dc_link *link,
 634         enum dp_test_pattern test_pattern,
 635         const struct link_training_settings *p_link_settings,
 636         const unsigned char *p_custom_pattern,
 637         unsigned int cust_pattern_size);
 638
 639 /*******************************************************************************
 640  * Sink Interfaces - A sink corresponds to a display output device
 641  ******************************************************************************/
 642
 643 /*
 644  * The sink structure contains EDID and other display device properties
 645  */
 646 struct dc_sink {
 647         enum signal_type sink_signal;
 648         struct dc_edid dc_edid; /* raw edid */
 649         struct dc_edid_caps edid_caps; /* parse display caps */
 650 };
 651
 652 void dc_sink_retain(const struct dc_sink *sink);
 653 void dc_sink_release(const struct dc_sink *sink);
 654
 655 const struct audio **dc_get_audios(struct dc *dc);
 656
 657 struct dc_sink_init_data {
 658         enum signal_type sink_signal;
 659         const struct dc_link *link;
 660         uint32_t dongle_max_pix_clk;
 661         bool converter_disable_audio;
 662 };
 663
 664 struct dc_sink *dc_sink_create(const struct dc_sink_init_data *init_params);
 665
 666 /*******************************************************************************
 667  * Cursor interfaces - To manages the cursor within a stream
 668  ******************************************************************************/
 669 /* TODO: Deprecated once we switch to dc_set_cursor_position */
 670 bool dc_stream_set_cursor_attributes(
 671         const struct dc_stream *stream,
 672         const struct dc_cursor_attributes *attributes);
 673
 674 bool dc_stream_set_cursor_position(
 675         const struct dc_stream *stream,
 676         const struct dc_cursor_position *position);
 677
 678 /* Newer interfaces  */
 679 struct dc_cursor {
 680         struct dc_plane_address address;
 681         struct dc_cursor_attributes attributes;
 682 };
 683
 684 /*******************************************************************************
 685  * Interrupt interfaces
 686  ******************************************************************************/
 687 enum dc_irq_source dc_interrupt_to_irq_source(
 688                 struct dc *dc,
 689                 uint32_t src_id,
 690                 uint32_t ext_id);
 691 void dc_interrupt_set(const struct dc *dc, enum dc_irq_source src, bool enable);
 692 void dc_interrupt_ack(struct dc *dc, enum dc_irq_source src);
 693 enum dc_irq_source dc_get_hpd_irq_source_at_index(
 694                 struct dc *dc, uint32_t link_index);
 695
 696 /*******************************************************************************
 697  * Power Interfaces
 698  ******************************************************************************/
 699
 700 void dc_set_power_state(
 701                 struct dc *dc,
 702                 enum dc_acpi_cm_power_state power_state,
 703                 enum dc_video_power_state video_power_state);
 704 void dc_resume(const struct dc *dc);
 705
 706 /*******************************************************************************
 707  * DDC Interfaces
 708  ******************************************************************************/
 709
 710 const struct ddc_service *dc_get_ddc_at_index(
 711                 struct dc *dc, uint32_t link_index);
 712
 713 /*
 714  * DPCD access interfaces
 715  */
 716
 717 bool dc_read_dpcd(
 718                 struct dc *dc,
 719                 uint32_t link_index,
 720                 uint32_t address,
 721                 uint8_t *data,
 722                 uint32_t size);
 723
 724 bool dc_write_dpcd(
 725                 struct dc *dc,
 726                 uint32_t link_index,
 727                 uint32_t address,
 728                 const uint8_t *data,
 729         uint32_t size);
 730
 731 bool dc_submit_i2c(
 732                 struct dc *dc,
 733                 uint32_t link_index,
 734                 struct i2c_command *cmd);
 735
 736 #endif /* DC_INTERFACE_H_ */