drivers/gpu/drm/amd/display/dc/dc_link.h

   1 /*
   2  * Copyright 2012-14 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef DC_LINK_H_
  27 #define DC_LINK_H_
  28
  29 #include "dc.h"
  30 #include "dc_types.h"
  31 #include "grph_object_defs.h"
  32
  33 enum dc_link_fec_state {
  34         dc_link_fec_not_ready,
  35         dc_link_fec_ready,
  36         dc_link_fec_enabled
  37 };
  38
  39 struct dc_link_status {
  40         bool link_active;
  41         struct dpcd_caps *dpcd_caps;
  42 };
  43
  44 /* DP MST stream allocation (payload bandwidth number) */
  45 struct link_mst_stream_allocation {
  46         /* DIG front */
  47         const struct stream_encoder *stream_enc;
  48         /* associate DRM payload table with DC stream encoder */
  49         uint8_t vcp_id;
  50         /* number of slots required for the DP stream in transport packet */
  51         uint8_t slot_count;
  52 };
  53
  54 /* DP MST stream allocation table */
  55 struct link_mst_stream_allocation_table {
  56         /* number of DP video streams */
  57         int stream_count;
  58         /* array of stream allocations */
  59         struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
  60 };
  61
  62 struct time_stamp {
  63         uint64_t edp_poweroff;
  64         uint64_t edp_poweron;
  65 };
  66
  67 struct link_trace {
  68         struct time_stamp time_stamp;
  69 };
  70
  71 /* PSR feature flags */
  72 struct psr_settings {
  73         bool psr_feature_enabled;               // PSR is supported by sink
  74         bool psr_allow_active;                  // PSR is currently active
  75         enum dc_psr_version psr_version;                // Internal PSR version, determined based on DPCD
  76
  77         /* These parameters are calculated in Driver,
  78          * based on display timing and Sink capabilities.
  79          * If VBLANK region is too small and Sink takes a long time
  80          * to set up RFB, it may take an extra frame to enter PSR state.
  81          */
  82         bool psr_frame_capture_indication_req;
  83         unsigned int psr_sdp_transmit_line_num_deadline;
  84 };
  85
  86 /*
  87  * A link contains one or more sinks and their connected status.
  88  * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
  89  */
  90 struct dc_link {
  91         struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
  92         unsigned int sink_count;
  93         struct dc_sink *local_sink;
  94         unsigned int link_index;
  95         enum dc_connection_type type;
  96         enum signal_type connector_signal;
  97         enum dc_irq_source irq_source_hpd;
  98         enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
  99         bool is_hpd_filter_disabled;
 100         bool dp_ss_off;
 101         bool link_state_valid;
 102         bool aux_access_disabled;
 103         bool sync_lt_in_progress;
 104         enum lttpr_mode lttpr_mode;
 105         bool is_internal_display;
 106
 107         /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
 108          * DIG encoder. */
 109         bool is_dig_mapping_flexible;
 110         bool hpd_status; /* HPD status of link without physical HPD pin. */
 111
 112         bool edp_sink_present;
 113
 114         /* caps is the same as reported_link_cap. link_traing use
 115          * reported_link_cap. Will clean up.  TODO
 116          */
 117         struct dc_link_settings reported_link_cap;
 118         struct dc_link_settings verified_link_cap;
 119         struct dc_link_settings cur_link_settings;
 120         struct dc_lane_settings cur_lane_setting;
 121         struct dc_link_settings preferred_link_setting;
 122         struct dc_link_training_overrides preferred_training_settings;
 123         struct dp_audio_test_data audio_test_data;
 124
 125         uint8_t ddc_hw_inst;
 126
 127         uint8_t hpd_src;
 128
 129         uint8_t link_enc_hw_inst;
 130         /* DIG link encoder ID. Used as index in link encoder resource pool.
 131          * For links with fixed mapping to DIG, this is not changed after dc_link
 132          * object creation.
 133          */
 134         enum engine_id eng_id;
 135
 136         bool test_pattern_enabled;
 137         union compliance_test_state compliance_test_state;
 138
 139         void *priv;
 140
 141         struct ddc_service *ddc;
 142
 143         bool aux_mode;
 144
 145         /* Private to DC core */
 146
 147         const struct dc *dc;
 148
 149         struct dc_context *ctx;
 150
 151         struct panel_cntl *panel_cntl;
 152         struct link_encoder *link_enc;
 153         struct graphics_object_id link_id;
 154         /* Endpoint type distinguishes display endpoints which do not have entries
 155          * in the BIOS connector table from those that do. Helps when tracking link
 156          * encoder to display endpoint assignments.
 157          */
 158         enum display_endpoint_type ep_type;
 159         union ddi_channel_mapping ddi_channel_mapping;
 160         struct connector_device_tag_info device_tag;
 161         struct dpcd_caps dpcd_caps;
 162         uint32_t dongle_max_pix_clk;
 163         unsigned short chip_caps;
 164         unsigned int dpcd_sink_count;
 165 #if defined(CONFIG_DRM_AMD_DC_HDCP)
 166         struct hdcp_caps hdcp_caps;
 167 #endif
 168         enum edp_revision edp_revision;
 169         union dpcd_sink_ext_caps dpcd_sink_ext_caps;
 170
 171         struct psr_settings psr_settings;
 172
 173         /* MST record stream using this link */
 174         struct link_flags {
 175                 bool dp_keep_receiver_powered;
 176                 bool dp_skip_DID2;
 177                 bool dp_skip_reset_segment;
 178         } wa_flags;
 179         struct link_mst_stream_allocation_table mst_stream_alloc_table;
 180
 181         struct dc_link_status link_status;
 182
 183         struct link_trace link_trace;
 184         struct gpio *hpd_gpio;
 185         enum dc_link_fec_state fec_state;
 186 };
 187
 188 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
 189
 190 /**
 191  * dc_get_link_at_index() - Return an enumerated dc_link.
 192  *
 193  * dc_link order is constant and determined at
 194  * boot time.  They cannot be created or destroyed.
 195  * Use dc_get_caps() to get number of links.
 196  */
 197 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
 198 {
 199         return dc->links[link_index];
 200 }
 201
 202 static inline void get_edp_links(const struct dc *dc,
 203                 struct dc_link **edp_links,
 204                 int *edp_num)
 205 {
 206         int i;
 207
 208         *edp_num = 0;
 209         for (i = 0; i < dc->link_count; i++) {
 210                 // report any eDP links, even unconnected DDI's
 211                 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
 212                         edp_links[*edp_num] = dc->links[i];
 213                         if (++(*edp_num) == MAX_NUM_EDP)
 214                                 return;
 215                 }
 216         }
 217 }
 218
 219 /* Set backlight level of an embedded panel (eDP, LVDS).
 220  * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
 221  * and 16 bit fractional, where 1.0 is max backlight value.
 222  */
 223 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
 224                 uint32_t backlight_pwm_u16_16,
 225                 uint32_t frame_ramp);
 226
 227 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
 228 bool dc_link_set_backlight_level_nits(struct dc_link *link,
 229                 bool isHDR,
 230                 uint32_t backlight_millinits,
 231                 uint32_t transition_time_in_ms);
 232
 233 bool dc_link_get_backlight_level_nits(struct dc_link *link,
 234                 uint32_t *backlight_millinits,
 235                 uint32_t *backlight_millinits_peak);
 236
 237 bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
 238
 239 bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
 240 bool dc_link_set_default_brightness_aux(struct dc_link *link);
 241
 242 int dc_link_get_backlight_level(const struct dc_link *dc_link);
 243
 244 int dc_link_get_target_backlight_pwm(const struct dc_link *link);
 245
 246 bool dc_link_set_psr_allow_active(struct dc_link *dc_link, bool enable,
 247                 bool wait, bool force_static);
 248
 249 bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
 250
 251 bool dc_link_setup_psr(struct dc_link *dc_link,
 252                 const struct dc_stream_state *stream, struct psr_config *psr_config,
 253                 struct psr_context *psr_context);
 254
 255 void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
 256
 257 /* Request DC to detect if there is a Panel connected.
 258  * boot - If this call is during initial boot.
 259  * Return false for any type of detection failure or MST detection
 260  * true otherwise. True meaning further action is required (status update
 261  * and OS notification).
 262  */
 263 enum dc_detect_reason {
 264         DETECT_REASON_BOOT,
 265         DETECT_REASON_HPD,
 266         DETECT_REASON_HPDRX,
 267         DETECT_REASON_FALLBACK,
 268         DETECT_REASON_RETRAIN
 269 };
 270
 271 bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
 272 bool dc_link_get_hpd_state(struct dc_link *dc_link);
 273 enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
 274
 275 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 276  * Return:
 277  * true - Downstream port status changed. DM should call DC to do the
 278  * detection.
 279  * false - no change in Downstream port status. No further action required
 280  * from DM. */
 281 bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
 282                 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss);
 283
 284 /*
 285  * On eDP links this function call will stall until T12 has elapsed.
 286  * If the panel is not in power off state, this function will return
 287  * immediately.
 288  */
 289 bool dc_link_wait_for_t12(struct dc_link *link);
 290
 291 enum dc_status read_hpd_rx_irq_data(
 292         struct dc_link *link,
 293         union hpd_irq_data *irq_data);
 294
 295 struct dc_sink_init_data;
 296
 297 struct dc_sink *dc_link_add_remote_sink(
 298                 struct dc_link *dc_link,
 299                 const uint8_t *edid,
 300                 int len,
 301                 struct dc_sink_init_data *init_data);
 302
 303 void dc_link_remove_remote_sink(
 304         struct dc_link *link,
 305         struct dc_sink *sink);
 306
 307 /* Used by diagnostics for virtual link at the moment */
 308
 309 void dc_link_dp_set_drive_settings(
 310         struct dc_link *link,
 311         struct link_training_settings *lt_settings);
 312
 313 bool dc_link_dp_perform_link_training_skip_aux(
 314         struct dc_link *link,
 315         const struct dc_link_settings *link_setting);
 316
 317 enum link_training_result dc_link_dp_perform_link_training(
 318         struct dc_link *link,
 319         const struct dc_link_settings *link_setting,
 320         bool skip_video_pattern);
 321
 322 bool dc_link_dp_sync_lt_begin(struct dc_link *link);
 323
 324 enum link_training_result dc_link_dp_sync_lt_attempt(
 325         struct dc_link *link,
 326         struct dc_link_settings *link_setting,
 327         struct dc_link_training_overrides *lt_settings);
 328
 329 bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
 330
 331 void dc_link_dp_enable_hpd(const struct dc_link *link);
 332
 333 void dc_link_dp_disable_hpd(const struct dc_link *link);
 334
 335 bool dc_link_dp_set_test_pattern(
 336         struct dc_link *link,
 337         enum dp_test_pattern test_pattern,
 338         enum dp_test_pattern_color_space test_pattern_color_space,
 339         const struct link_training_settings *p_link_settings,
 340         const unsigned char *p_custom_pattern,
 341         unsigned int cust_pattern_size);
 342
 343 bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
 344
 345 void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
 346
 347 bool dc_link_is_dp_sink_present(struct dc_link *link);
 348
 349 bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
 350 /*
 351  * DPCD access interfaces
 352  */
 353
 354 #ifdef CONFIG_DRM_AMD_DC_HDCP
 355 bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
 356 bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
 357 #endif
 358 void dc_link_set_drive_settings(struct dc *dc,
 359                                 struct link_training_settings *lt_settings,
 360                                 const struct dc_link *link);
 361 void dc_link_set_preferred_link_settings(struct dc *dc,
 362                                          struct dc_link_settings *link_setting,
 363                                          struct dc_link *link);
 364 void dc_link_set_preferred_training_settings(struct dc *dc,
 365                                         struct dc_link_settings *link_setting,
 366                                         struct dc_link_training_overrides *lt_overrides,
 367                                         struct dc_link *link,
 368                                         bool skip_immediate_retrain);
 369 void dc_link_enable_hpd(const struct dc_link *link);
 370 void dc_link_disable_hpd(const struct dc_link *link);
 371 void dc_link_set_test_pattern(struct dc_link *link,
 372                         enum dp_test_pattern test_pattern,
 373                         enum dp_test_pattern_color_space test_pattern_color_space,
 374                         const struct link_training_settings *p_link_settings,
 375                         const unsigned char *p_custom_pattern,
 376                         unsigned int cust_pattern_size);
 377 uint32_t dc_link_bandwidth_kbps(
 378         const struct dc_link *link,
 379         const struct dc_link_settings *link_setting);
 380
 381 const struct dc_link_settings *dc_link_get_link_cap(
 382                 const struct dc_link *link);
 383
 384 void dc_link_overwrite_extended_receiver_cap(
 385                 struct dc_link *link);
 386
 387 bool dc_submit_i2c(
 388                 struct dc *dc,
 389                 uint32_t link_index,
 390                 struct i2c_command *cmd);
 391
 392 bool dc_submit_i2c_oem(
 393                 struct dc *dc,
 394                 struct i2c_command *cmd);
 395
 396 uint32_t dc_bandwidth_in_kbps_from_timing(
 397         const struct dc_crtc_timing *timing);
 398
 399 bool dc_link_is_fec_supported(const struct dc_link *link);
 400 bool dc_link_should_enable_fec(const struct dc_link *link);
 401
 402 #endif /* DC_LINK_H_ */