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drm/amd/display: audio bug fix part 1: Add missing audio ACR
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / amd / display / dc / dce / dce_audio.h
1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25 #ifndef __DAL_AUDIO_DCE_110_H__
26 #define __DAL_AUDIO_DCE_110_H__
27
28 #include "audio.h"
29
30 #define AUD_COMMON_REG_LIST(id)\
31 SRI(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZF0ENDPOINT, id),\
32 SRI(AZALIA_F0_CODEC_ENDPOINT_DATA, AZF0ENDPOINT, id),\
33 SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS),\
34 SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES),\
35 SR(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES),\
36 SR(DCCG_AUDIO_DTO_SOURCE),\
37 SR(DCCG_AUDIO_DTO0_MODULE),\
38 SR(DCCG_AUDIO_DTO0_PHASE),\
39 SR(DCCG_AUDIO_DTO1_MODULE),\
40 SR(DCCG_AUDIO_DTO1_PHASE)
41
42
43 /* set field name */
44 #define SF(reg_name, field_name, post_fix)\
45 .field_name = reg_name ## __ ## field_name ## post_fix
46
47
48 #define AUD_COMMON_MASK_SH_LIST_BASE(mask_sh)\
49 SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
50 SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
51 SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
52 SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
53 SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
54 SF(DCCG_AUDIO_DTO1_PHASE, DCCG_AUDIO_DTO1_PHASE, mask_sh),\
55 SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES, AUDIO_RATE_CAPABILITIES, mask_sh),\
56 SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, CLKSTOP, mask_sh),\
57 SF(AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES, EPSS, mask_sh)
58
59 #define AUD_COMMON_MASK_SH_LIST(mask_sh)\
60 AUD_COMMON_MASK_SH_LIST_BASE(mask_sh),\
61 SF(AZALIA_F0_CODEC_ENDPOINT_INDEX, AZALIA_ENDPOINT_REG_INDEX, mask_sh),\
62 SF(AZALIA_F0_CODEC_ENDPOINT_DATA, AZALIA_ENDPOINT_REG_DATA, mask_sh)
63
64
65 struct dce_audio_registers {
66 uint32_t AZALIA_F0_CODEC_ENDPOINT_INDEX;
67 uint32_t AZALIA_F0_CODEC_ENDPOINT_DATA;
68
69 uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS;
70 uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES;
71 uint32_t AZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES;
72
73 uint32_t DCCG_AUDIO_DTO_SOURCE;
74 uint32_t DCCG_AUDIO_DTO0_MODULE;
75 uint32_t DCCG_AUDIO_DTO0_PHASE;
76 uint32_t DCCG_AUDIO_DTO1_MODULE;
77 uint32_t DCCG_AUDIO_DTO1_PHASE;
78
79 uint32_t AUDIO_RATE_CAPABILITIES;
80 };
81
82 struct dce_audio_shift {
83 uint8_t AZALIA_ENDPOINT_REG_INDEX;
84 uint8_t AZALIA_ENDPOINT_REG_DATA;
85
86 uint8_t AUDIO_RATE_CAPABILITIES;
87 uint8_t CLKSTOP;
88 uint8_t EPSS;
89
90 uint8_t DCCG_AUDIO_DTO0_SOURCE_SEL;
91 uint8_t DCCG_AUDIO_DTO_SEL;
92 uint8_t DCCG_AUDIO_DTO0_MODULE;
93 uint8_t DCCG_AUDIO_DTO0_PHASE;
94 uint8_t DCCG_AUDIO_DTO1_MODULE;
95 uint8_t DCCG_AUDIO_DTO1_PHASE;
96 uint8_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
97 };
98
99 struct dce_aduio_mask {
100 uint32_t AZALIA_ENDPOINT_REG_INDEX;
101 uint32_t AZALIA_ENDPOINT_REG_DATA;
102
103 uint32_t AUDIO_RATE_CAPABILITIES;
104 uint32_t CLKSTOP;
105 uint32_t EPSS;
106
107 uint32_t DCCG_AUDIO_DTO0_SOURCE_SEL;
108 uint32_t DCCG_AUDIO_DTO_SEL;
109 uint32_t DCCG_AUDIO_DTO0_MODULE;
110 uint32_t DCCG_AUDIO_DTO0_PHASE;
111 uint32_t DCCG_AUDIO_DTO1_MODULE;
112 uint32_t DCCG_AUDIO_DTO1_PHASE;
113 uint32_t DCCG_AUDIO_DTO2_USE_512FBR_DTO;
114 };
115
116 struct dce_audio {
117 struct audio base;
118 const struct dce_audio_registers *regs;
119 const struct dce_audio_shift *shifts;
120 const struct dce_aduio_mask *masks;
121 };
122
123 struct audio *dce_audio_create(
124 struct dc_context *ctx,
125 unsigned int inst,
126 const struct dce_audio_registers *reg,
127 const struct dce_audio_shift *shifts,
128 const struct dce_aduio_mask *masks);
129
130 void dce_aud_destroy(struct audio **audio);
131
132 void dce_aud_hw_init(struct audio *audio);
133
134 void dce_aud_az_enable(struct audio *audio);
135 void dce_aud_az_disable(struct audio *audio);
136
137 void dce_aud_az_configure(struct audio *audio,
138 enum signal_type signal,
139 const struct audio_crtc_info *crtc_info,
140 const struct audio_info *audio_info);
141
142 void dce_aud_wall_dto_setup(struct audio *audio,
143 enum signal_type signal,
144 const struct audio_crtc_info *crtc_info,
145 const struct audio_pll_info *pll_info);
146
147 #endif /*__DAL_AUDIO_DCE_110_H__*/