drivers/gpu/drm/amd/display/dc/inc/core_status.h

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef _CORE_STATUS_H_
  27 #define _CORE_STATUS_H_
  28
  29 enum dc_status {
  30         DC_OK = 1,
  31
  32         DC_NO_CONTROLLER_RESOURCE = 2,
  33         DC_NO_STREAM_ENG_RESOURCE = 3,
  34         DC_NO_CLOCK_SOURCE_RESOURCE = 4,
  35         DC_FAIL_CONTROLLER_VALIDATE = 5,
  36         DC_FAIL_ENC_VALIDATE = 6,
  37         DC_FAIL_ATTACH_SURFACES = 7,
  38         DC_FAIL_DETACH_SURFACES = 8,
  39         DC_FAIL_SURFACE_VALIDATE = 9,
  40         DC_NO_DP_LINK_BANDWIDTH = 10,
  41         DC_EXCEED_DONGLE_MAX_CLK = 11,
  42         DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED = 12,
  43         DC_FAIL_BANDWIDTH_VALIDATE = 13, /* BW and Watermark validation */
  44         DC_FAIL_SCALING = 14,
  45         DC_FAIL_DP_LINK_TRAINING = 15,
  46
  47         DC_ERROR_UNEXPECTED = -1
  48 };
  49
  50 #endif /* _CORE_STATUS_H_ */