2 * Copyright 2012-15 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #ifndef __DAL_HW_SEQUENCER_TYPES_H__
27 #define __DAL_HW_SEQUENCER_TYPES_H__
29 #include "signal_types.h"
30 #include "grph_object_defs.h"
31 #include "link_service_types.h"
33 /* define the structure of Dynamic Refresh Mode */
35 /* defines the minimum possible vertical dimension of display timing
36 * for CRTC as supported by the panel */
37 uint32_t vertical_total_min
;
38 /* defines the maximum possible vertical dimension of display timing
39 * for CRTC as supported by the panel */
40 uint32_t vertical_total_max
;
43 /* CRTC timing structure */
44 struct hw_crtc_timing
{
46 uint32_t h_addressable
;
47 uint32_t h_overscan_left
;
48 uint32_t h_overscan_right
;
49 uint32_t h_sync_start
;
50 uint32_t h_sync_width
;
53 uint32_t v_addressable
;
54 uint32_t v_overscan_top
;
55 uint32_t v_overscan_bottom
;
56 uint32_t v_sync_start
;
57 uint32_t v_sync_width
;
63 uint32_t INTERLACED
:1;
64 uint32_t DOUBLESCAN
:1;
65 uint32_t PIXEL_REPETITION
:4; /* 1...10 */
66 uint32_t HSYNC_POSITIVE_POLARITY
:1;
67 uint32_t VSYNC_POSITIVE_POLARITY
:1;
68 /* frame should be packed for 3D
69 * (currently this refers to HDMI 1.4a FramePacking format */
70 uint32_t HORZ_COUNT_BY_TWO
:1;
71 uint32_t PACK_3D_FRAME
:1;
72 /* 0 - left eye polarity, 1 - right eye polarity */
73 uint32_t RIGHT_EYE_3D_POLARITY
:1;
74 /* DVI-DL High-Color mode */
75 uint32_t HIGH_COLOR_DL_MODE
:1;
77 /* HDMI 2.0 - Support scrambling for TMDS character
78 * rates less than or equal to 340Mcsc */
79 uint32_t LTE_340MCSC_SCRAMBLE
:1;
83 /* TODO hw_info_frame and hw_info_packet structures are same as in encoder
85 struct hw_info_packet
{
94 struct hw_info_frame
{
95 /* Auxiliary Video Information */
96 struct hw_info_packet avi_info_packet
;
97 struct hw_info_packet gamut_packet
;
98 struct hw_info_packet vendor_info_packet
;
99 /* Source Product Description */
100 struct hw_info_packet spd_packet
;
101 /* Video Stream Configuration */
102 struct hw_info_packet vsc_packet
;