2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/gfp.h>
26 #include <linux/slab.h>
27 #include "amd_shared.h"
28 #include "amd_powerplay.h"
29 #include "pp_instance.h"
30 #include "power_state.h"
31 #include "eventmanager.h"
34 #define PP_CHECK(handle) \
36 if ((handle) == NULL || (handle)->pp_valid != PP_VALID) \
40 #define PP_CHECK_HW(hwmgr) \
42 if ((hwmgr) == NULL || (hwmgr)->hwmgr_func == NULL) \
46 static int pp_early_init(void *handle
)
51 static int pp_sw_init(void *handle
)
53 struct pp_instance
*pp_handle
;
54 struct pp_hwmgr
*hwmgr
;
60 pp_handle
= (struct pp_instance
*)handle
;
61 hwmgr
= pp_handle
->hwmgr
;
65 if (hwmgr
->pptable_func
== NULL
||
66 hwmgr
->pptable_func
->pptable_init
== NULL
||
67 hwmgr
->hwmgr_func
->backend_init
== NULL
)
70 ret
= hwmgr
->pptable_func
->pptable_init(hwmgr
);
74 ret
= hwmgr
->hwmgr_func
->backend_init(hwmgr
);
78 pr_info("amdgpu: powerplay initialized\n");
82 if (hwmgr
->pptable_func
->pptable_fini
)
83 hwmgr
->pptable_func
->pptable_fini(hwmgr
);
85 pr_err("amdgpu: powerplay initialization failed\n");
89 static int pp_sw_fini(void *handle
)
91 struct pp_instance
*pp_handle
;
92 struct pp_hwmgr
*hwmgr
;
98 pp_handle
= (struct pp_instance
*)handle
;
99 hwmgr
= pp_handle
->hwmgr
;
103 if (hwmgr
->hwmgr_func
->backend_fini
!= NULL
)
104 ret
= hwmgr
->hwmgr_func
->backend_fini(hwmgr
);
106 if (hwmgr
->pptable_func
->pptable_fini
)
107 hwmgr
->pptable_func
->pptable_fini(hwmgr
);
112 static int pp_hw_init(void *handle
)
114 struct pp_instance
*pp_handle
;
115 struct pp_smumgr
*smumgr
;
116 struct pp_eventmgr
*eventmgr
;
122 pp_handle
= (struct pp_instance
*)handle
;
123 smumgr
= pp_handle
->smu_mgr
;
125 if (smumgr
== NULL
|| smumgr
->smumgr_funcs
== NULL
||
126 smumgr
->smumgr_funcs
->smu_init
== NULL
||
127 smumgr
->smumgr_funcs
->start_smu
== NULL
)
130 ret
= smumgr
->smumgr_funcs
->smu_init(smumgr
);
132 printk(KERN_ERR
"[ powerplay ] smc initialization failed\n");
136 ret
= smumgr
->smumgr_funcs
->start_smu(smumgr
);
138 printk(KERN_ERR
"[ powerplay ] smc start failed\n");
139 smumgr
->smumgr_funcs
->smu_fini(smumgr
);
143 hw_init_power_state_table(pp_handle
->hwmgr
);
144 eventmgr
= pp_handle
->eventmgr
;
146 if (eventmgr
== NULL
|| eventmgr
->pp_eventmgr_init
== NULL
)
149 ret
= eventmgr
->pp_eventmgr_init(eventmgr
);
153 static int pp_hw_fini(void *handle
)
155 struct pp_instance
*pp_handle
;
156 struct pp_smumgr
*smumgr
;
157 struct pp_eventmgr
*eventmgr
;
162 pp_handle
= (struct pp_instance
*)handle
;
163 eventmgr
= pp_handle
->eventmgr
;
165 if (eventmgr
!= NULL
|| eventmgr
->pp_eventmgr_fini
!= NULL
)
166 eventmgr
->pp_eventmgr_fini(eventmgr
);
168 smumgr
= pp_handle
->smu_mgr
;
170 if (smumgr
!= NULL
|| smumgr
->smumgr_funcs
!= NULL
||
171 smumgr
->smumgr_funcs
->smu_fini
!= NULL
)
172 smumgr
->smumgr_funcs
->smu_fini(smumgr
);
177 static bool pp_is_idle(void *handle
)
182 static int pp_wait_for_idle(void *handle
)
187 static int pp_sw_reset(void *handle
)
193 static int pp_set_clockgating_state(void *handle
,
194 enum amd_clockgating_state state
)
196 struct pp_hwmgr
*hwmgr
;
197 uint32_t msg_id
, pp_state
;
202 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
206 if (hwmgr
->hwmgr_func
->update_clock_gatings
== NULL
) {
207 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
211 if (state
== AMD_CG_STATE_UNGATE
)
214 pp_state
= PP_STATE_CG
| PP_STATE_LS
;
216 /* Enable/disable GFX blocks clock gating through SMU */
217 msg_id
= PP_CG_MSG_ID(PP_GROUP_GFX
,
219 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
221 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
222 msg_id
= PP_CG_MSG_ID(PP_GROUP_GFX
,
224 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
226 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
227 msg_id
= PP_CG_MSG_ID(PP_GROUP_GFX
,
229 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
231 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
232 msg_id
= PP_CG_MSG_ID(PP_GROUP_GFX
,
234 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
236 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
237 msg_id
= PP_CG_MSG_ID(PP_GROUP_GFX
,
239 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
241 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
243 /* Enable/disable System blocks clock gating through SMU */
244 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
246 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
248 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
249 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
251 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
253 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
254 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
256 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
258 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
259 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
261 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
263 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
264 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
266 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
268 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
269 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
271 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
273 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
274 msg_id
= PP_CG_MSG_ID(PP_GROUP_SYS
,
276 PP_STATE_SUPPORT_CG
| PP_STATE_SUPPORT_LS
,
278 hwmgr
->hwmgr_func
->update_clock_gatings(hwmgr
, &msg_id
);
283 static int pp_set_powergating_state(void *handle
,
284 enum amd_powergating_state state
)
286 struct pp_hwmgr
*hwmgr
;
291 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
295 if (hwmgr
->hwmgr_func
->enable_per_cu_power_gating
== NULL
) {
296 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
300 /* Enable/disable GFX per cu powergating through SMU */
301 return hwmgr
->hwmgr_func
->enable_per_cu_power_gating(hwmgr
,
302 state
== AMD_PG_STATE_GATE
? true : false);
305 static int pp_suspend(void *handle
)
307 struct pp_instance
*pp_handle
;
308 struct pp_eventmgr
*eventmgr
;
309 struct pem_event_data event_data
= { {0} };
314 pp_handle
= (struct pp_instance
*)handle
;
315 eventmgr
= pp_handle
->eventmgr
;
316 pem_handle_event(eventmgr
, AMD_PP_EVENT_SUSPEND
, &event_data
);
320 static int pp_resume(void *handle
)
322 struct pp_instance
*pp_handle
;
323 struct pp_eventmgr
*eventmgr
;
324 struct pem_event_data event_data
= { {0} };
325 struct pp_smumgr
*smumgr
;
331 pp_handle
= (struct pp_instance
*)handle
;
332 smumgr
= pp_handle
->smu_mgr
;
334 if (smumgr
== NULL
|| smumgr
->smumgr_funcs
== NULL
||
335 smumgr
->smumgr_funcs
->start_smu
== NULL
)
338 ret
= smumgr
->smumgr_funcs
->start_smu(smumgr
);
340 printk(KERN_ERR
"[ powerplay ] smc start failed\n");
341 smumgr
->smumgr_funcs
->smu_fini(smumgr
);
345 eventmgr
= pp_handle
->eventmgr
;
346 pem_handle_event(eventmgr
, AMD_PP_EVENT_RESUME
, &event_data
);
351 const struct amd_ip_funcs pp_ip_funcs
= {
353 .early_init
= pp_early_init
,
355 .sw_init
= pp_sw_init
,
356 .sw_fini
= pp_sw_fini
,
357 .hw_init
= pp_hw_init
,
358 .hw_fini
= pp_hw_fini
,
359 .suspend
= pp_suspend
,
361 .is_idle
= pp_is_idle
,
362 .wait_for_idle
= pp_wait_for_idle
,
363 .soft_reset
= pp_sw_reset
,
364 .set_clockgating_state
= pp_set_clockgating_state
,
365 .set_powergating_state
= pp_set_powergating_state
,
368 static int pp_dpm_load_fw(void *handle
)
373 static int pp_dpm_fw_loading_complete(void *handle
)
378 static int pp_dpm_force_performance_level(void *handle
,
379 enum amd_dpm_forced_level level
)
381 struct pp_instance
*pp_handle
;
382 struct pp_hwmgr
*hwmgr
;
387 pp_handle
= (struct pp_instance
*)handle
;
389 hwmgr
= pp_handle
->hwmgr
;
393 if (hwmgr
->hwmgr_func
->force_dpm_level
== NULL
) {
394 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
398 hwmgr
->hwmgr_func
->force_dpm_level(hwmgr
, level
);
403 static enum amd_dpm_forced_level
pp_dpm_get_performance_level(
406 struct pp_hwmgr
*hwmgr
;
411 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
416 return (((struct pp_instance
*)handle
)->hwmgr
->dpm_level
);
419 static int pp_dpm_get_sclk(void *handle
, bool low
)
421 struct pp_hwmgr
*hwmgr
;
426 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
430 if (hwmgr
->hwmgr_func
->get_sclk
== NULL
) {
431 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
435 return hwmgr
->hwmgr_func
->get_sclk(hwmgr
, low
);
438 static int pp_dpm_get_mclk(void *handle
, bool low
)
440 struct pp_hwmgr
*hwmgr
;
445 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
449 if (hwmgr
->hwmgr_func
->get_mclk
== NULL
) {
450 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
454 return hwmgr
->hwmgr_func
->get_mclk(hwmgr
, low
);
457 static int pp_dpm_powergate_vce(void *handle
, bool gate
)
459 struct pp_hwmgr
*hwmgr
;
464 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
468 if (hwmgr
->hwmgr_func
->powergate_vce
== NULL
) {
469 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
473 return hwmgr
->hwmgr_func
->powergate_vce(hwmgr
, gate
);
476 static int pp_dpm_powergate_uvd(void *handle
, bool gate
)
478 struct pp_hwmgr
*hwmgr
;
483 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
487 if (hwmgr
->hwmgr_func
->powergate_uvd
== NULL
) {
488 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
492 return hwmgr
->hwmgr_func
->powergate_uvd(hwmgr
, gate
);
495 static enum PP_StateUILabel
power_state_convert(enum amd_pm_state_type state
)
498 case POWER_STATE_TYPE_BATTERY
:
499 return PP_StateUILabel_Battery
;
500 case POWER_STATE_TYPE_BALANCED
:
501 return PP_StateUILabel_Balanced
;
502 case POWER_STATE_TYPE_PERFORMANCE
:
503 return PP_StateUILabel_Performance
;
505 return PP_StateUILabel_None
;
509 int pp_dpm_dispatch_tasks(void *handle
, enum amd_pp_event event_id
, void *input
, void *output
)
512 struct pp_instance
*pp_handle
;
513 struct pem_event_data data
= { {0} };
515 pp_handle
= (struct pp_instance
*)handle
;
517 if (pp_handle
== NULL
)
521 case AMD_PP_EVENT_DISPLAY_CONFIG_CHANGE
:
522 ret
= pem_handle_event(pp_handle
->eventmgr
, event_id
, &data
);
524 case AMD_PP_EVENT_ENABLE_USER_STATE
:
526 enum amd_pm_state_type ps
;
530 ps
= *(unsigned long *)input
;
532 data
.requested_ui_label
= power_state_convert(ps
);
533 ret
= pem_handle_event(pp_handle
->eventmgr
, event_id
, &data
);
536 case AMD_PP_EVENT_COMPLETE_INIT
:
537 ret
= pem_handle_event(pp_handle
->eventmgr
, event_id
, &data
);
545 enum amd_pm_state_type
pp_dpm_get_current_power_state(void *handle
)
547 struct pp_hwmgr
*hwmgr
;
548 struct pp_power_state
*state
;
553 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
555 if (hwmgr
== NULL
|| hwmgr
->current_ps
== NULL
)
558 state
= hwmgr
->current_ps
;
560 switch (state
->classification
.ui_label
) {
561 case PP_StateUILabel_Battery
:
562 return POWER_STATE_TYPE_BATTERY
;
563 case PP_StateUILabel_Balanced
:
564 return POWER_STATE_TYPE_BALANCED
;
565 case PP_StateUILabel_Performance
:
566 return POWER_STATE_TYPE_PERFORMANCE
;
568 if (state
->classification
.flags
& PP_StateClassificationFlag_Boot
)
569 return POWER_STATE_TYPE_INTERNAL_BOOT
;
571 return POWER_STATE_TYPE_DEFAULT
;
576 pp_debugfs_print_current_performance_level(void *handle
,
579 struct pp_hwmgr
*hwmgr
;
584 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
586 if (hwmgr
== NULL
|| hwmgr
->hwmgr_func
== NULL
)
589 if (hwmgr
->hwmgr_func
->print_current_perforce_level
== NULL
) {
590 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
594 hwmgr
->hwmgr_func
->print_current_perforce_level(hwmgr
, m
);
597 static int pp_dpm_set_fan_control_mode(void *handle
, uint32_t mode
)
599 struct pp_hwmgr
*hwmgr
;
604 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
608 if (hwmgr
->hwmgr_func
->set_fan_control_mode
== NULL
) {
609 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
613 return hwmgr
->hwmgr_func
->set_fan_control_mode(hwmgr
, mode
);
616 static int pp_dpm_get_fan_control_mode(void *handle
)
618 struct pp_hwmgr
*hwmgr
;
623 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
627 if (hwmgr
->hwmgr_func
->get_fan_control_mode
== NULL
) {
628 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
632 return hwmgr
->hwmgr_func
->get_fan_control_mode(hwmgr
);
635 static int pp_dpm_set_fan_speed_percent(void *handle
, uint32_t percent
)
637 struct pp_hwmgr
*hwmgr
;
642 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
646 if (hwmgr
->hwmgr_func
->set_fan_speed_percent
== NULL
) {
647 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
651 return hwmgr
->hwmgr_func
->set_fan_speed_percent(hwmgr
, percent
);
654 static int pp_dpm_get_fan_speed_percent(void *handle
, uint32_t *speed
)
656 struct pp_hwmgr
*hwmgr
;
661 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
665 if (hwmgr
->hwmgr_func
->get_fan_speed_percent
== NULL
) {
666 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
670 return hwmgr
->hwmgr_func
->get_fan_speed_percent(hwmgr
, speed
);
673 static int pp_dpm_get_temperature(void *handle
)
675 struct pp_hwmgr
*hwmgr
;
680 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
684 if (hwmgr
->hwmgr_func
->get_temperature
== NULL
) {
685 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
689 return hwmgr
->hwmgr_func
->get_temperature(hwmgr
);
692 static int pp_dpm_get_pp_num_states(void *handle
,
693 struct pp_states_info
*data
)
695 struct pp_hwmgr
*hwmgr
;
701 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
703 if (hwmgr
== NULL
|| hwmgr
->ps
== NULL
)
706 data
->nums
= hwmgr
->num_ps
;
708 for (i
= 0; i
< hwmgr
->num_ps
; i
++) {
709 struct pp_power_state
*state
= (struct pp_power_state
*)
710 ((unsigned long)hwmgr
->ps
+ i
* hwmgr
->ps_size
);
711 switch (state
->classification
.ui_label
) {
712 case PP_StateUILabel_Battery
:
713 data
->states
[i
] = POWER_STATE_TYPE_BATTERY
;
715 case PP_StateUILabel_Balanced
:
716 data
->states
[i
] = POWER_STATE_TYPE_BALANCED
;
718 case PP_StateUILabel_Performance
:
719 data
->states
[i
] = POWER_STATE_TYPE_PERFORMANCE
;
722 if (state
->classification
.flags
& PP_StateClassificationFlag_Boot
)
723 data
->states
[i
] = POWER_STATE_TYPE_INTERNAL_BOOT
;
725 data
->states
[i
] = POWER_STATE_TYPE_DEFAULT
;
732 static int pp_dpm_get_pp_table(void *handle
, char **table
)
734 struct pp_hwmgr
*hwmgr
;
739 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
743 if (hwmgr
->hwmgr_func
->get_pp_table
== NULL
) {
744 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
748 return hwmgr
->hwmgr_func
->get_pp_table(hwmgr
, table
);
751 static int pp_dpm_set_pp_table(void *handle
, const char *buf
, size_t size
)
753 struct pp_hwmgr
*hwmgr
;
758 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
762 if (hwmgr
->hwmgr_func
->set_pp_table
== NULL
) {
763 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
767 return hwmgr
->hwmgr_func
->set_pp_table(hwmgr
, buf
, size
);
770 static int pp_dpm_force_clock_level(void *handle
,
771 enum pp_clock_type type
, uint32_t mask
)
773 struct pp_hwmgr
*hwmgr
;
778 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
782 if (hwmgr
->hwmgr_func
->force_clock_level
== NULL
) {
783 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
787 return hwmgr
->hwmgr_func
->force_clock_level(hwmgr
, type
, mask
);
790 static int pp_dpm_print_clock_levels(void *handle
,
791 enum pp_clock_type type
, char *buf
)
793 struct pp_hwmgr
*hwmgr
;
798 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
802 if (hwmgr
->hwmgr_func
->print_clock_levels
== NULL
) {
803 printk(KERN_INFO
"%s was not implemented.\n", __func__
);
806 return hwmgr
->hwmgr_func
->print_clock_levels(hwmgr
, type
, buf
);
809 const struct amd_powerplay_funcs pp_dpm_funcs
= {
810 .get_temperature
= pp_dpm_get_temperature
,
811 .load_firmware
= pp_dpm_load_fw
,
812 .wait_for_fw_loading_complete
= pp_dpm_fw_loading_complete
,
813 .force_performance_level
= pp_dpm_force_performance_level
,
814 .get_performance_level
= pp_dpm_get_performance_level
,
815 .get_current_power_state
= pp_dpm_get_current_power_state
,
816 .get_sclk
= pp_dpm_get_sclk
,
817 .get_mclk
= pp_dpm_get_mclk
,
818 .powergate_vce
= pp_dpm_powergate_vce
,
819 .powergate_uvd
= pp_dpm_powergate_uvd
,
820 .dispatch_tasks
= pp_dpm_dispatch_tasks
,
821 .print_current_performance_level
= pp_debugfs_print_current_performance_level
,
822 .set_fan_control_mode
= pp_dpm_set_fan_control_mode
,
823 .get_fan_control_mode
= pp_dpm_get_fan_control_mode
,
824 .set_fan_speed_percent
= pp_dpm_set_fan_speed_percent
,
825 .get_fan_speed_percent
= pp_dpm_get_fan_speed_percent
,
826 .get_pp_num_states
= pp_dpm_get_pp_num_states
,
827 .get_pp_table
= pp_dpm_get_pp_table
,
828 .set_pp_table
= pp_dpm_set_pp_table
,
829 .force_clock_level
= pp_dpm_force_clock_level
,
830 .print_clock_levels
= pp_dpm_print_clock_levels
,
833 static int amd_pp_instance_init(struct amd_pp_init
*pp_init
,
834 struct amd_powerplay
*amd_pp
)
837 struct pp_instance
*handle
;
839 handle
= kzalloc(sizeof(struct pp_instance
), GFP_KERNEL
);
843 handle
->pp_valid
= PP_VALID
;
845 ret
= smum_init(pp_init
, handle
);
849 ret
= hwmgr_init(pp_init
, handle
);
853 ret
= eventmgr_init(handle
);
857 amd_pp
->pp_handle
= handle
;
861 hwmgr_fini(handle
->hwmgr
);
863 smum_fini(handle
->smu_mgr
);
869 static int amd_pp_instance_fini(void *handle
)
871 struct pp_instance
*instance
= (struct pp_instance
*)handle
;
873 if (instance
== NULL
)
876 eventmgr_fini(instance
->eventmgr
);
878 hwmgr_fini(instance
->hwmgr
);
880 smum_fini(instance
->smu_mgr
);
886 int amd_powerplay_init(struct amd_pp_init
*pp_init
,
887 struct amd_powerplay
*amd_pp
)
891 if (pp_init
== NULL
|| amd_pp
== NULL
)
894 ret
= amd_pp_instance_init(pp_init
, amd_pp
);
899 amd_pp
->ip_funcs
= &pp_ip_funcs
;
900 amd_pp
->pp_funcs
= &pp_dpm_funcs
;
905 int amd_powerplay_fini(void *handle
)
907 amd_pp_instance_fini(handle
);
912 /* export this function to DAL */
914 int amd_powerplay_display_configuration_change(void *handle
,
915 const struct amd_pp_display_configuration
*display_config
)
917 struct pp_hwmgr
*hwmgr
;
919 PP_CHECK((struct pp_instance
*)handle
);
921 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
923 phm_store_dal_configuration_data(hwmgr
, display_config
);
928 int amd_powerplay_get_display_power_level(void *handle
,
929 struct amd_pp_simple_clock_info
*output
)
931 struct pp_hwmgr
*hwmgr
;
933 PP_CHECK((struct pp_instance
*)handle
);
938 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
940 return phm_get_dal_power_level(hwmgr
, output
);
943 int amd_powerplay_get_current_clocks(void *handle
,
944 struct amd_pp_clock_info
*clocks
)
946 struct pp_hwmgr
*hwmgr
;
947 struct amd_pp_simple_clock_info simple_clocks
;
948 struct pp_clock_info hw_clocks
;
950 PP_CHECK((struct pp_instance
*)handle
);
955 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
957 phm_get_dal_power_level(hwmgr
, &simple_clocks
);
959 if (phm_cap_enabled(hwmgr
->platform_descriptor
.platformCaps
, PHM_PlatformCaps_PowerContainment
)) {
960 if (0 != phm_get_clock_info(hwmgr
, &hwmgr
->current_ps
->hardware
, &hw_clocks
, PHM_PerformanceLevelDesignation_PowerContainment
))
961 PP_ASSERT_WITH_CODE(0, "Error in PHM_GetPowerContainmentClockInfo", return -1);
963 if (0 != phm_get_clock_info(hwmgr
, &hwmgr
->current_ps
->hardware
, &hw_clocks
, PHM_PerformanceLevelDesignation_Activity
))
964 PP_ASSERT_WITH_CODE(0, "Error in PHM_GetClockInfo", return -1);
967 clocks
->min_engine_clock
= hw_clocks
.min_eng_clk
;
968 clocks
->max_engine_clock
= hw_clocks
.max_eng_clk
;
969 clocks
->min_memory_clock
= hw_clocks
.min_mem_clk
;
970 clocks
->max_memory_clock
= hw_clocks
.max_mem_clk
;
971 clocks
->min_bus_bandwidth
= hw_clocks
.min_bus_bandwidth
;
972 clocks
->max_bus_bandwidth
= hw_clocks
.max_bus_bandwidth
;
974 clocks
->max_engine_clock_in_sr
= hw_clocks
.max_eng_clk
;
975 clocks
->min_engine_clock_in_sr
= hw_clocks
.min_eng_clk
;
977 clocks
->max_clocks_state
= simple_clocks
.level
;
979 if (0 == phm_get_current_shallow_sleep_clocks(hwmgr
, &hwmgr
->current_ps
->hardware
, &hw_clocks
)) {
980 clocks
->max_engine_clock_in_sr
= hw_clocks
.max_eng_clk
;
981 clocks
->min_engine_clock_in_sr
= hw_clocks
.min_eng_clk
;
988 int amd_powerplay_get_clock_by_type(void *handle
, enum amd_pp_clock_type type
, struct amd_pp_clocks
*clocks
)
992 struct pp_hwmgr
*hwmgr
;
994 PP_CHECK((struct pp_instance
*)handle
);
999 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
1001 result
= phm_get_clock_by_type(hwmgr
, type
, clocks
);
1006 int amd_powerplay_get_display_mode_validation_clocks(void *handle
,
1007 struct amd_pp_simple_clock_info
*clocks
)
1010 struct pp_hwmgr
*hwmgr
;
1012 PP_CHECK((struct pp_instance
*)handle
);
1017 hwmgr
= ((struct pp_instance
*)handle
)->hwmgr
;
1019 if (phm_cap_enabled(hwmgr
->platform_descriptor
.platformCaps
, PHM_PlatformCaps_DynamicPatchPowerState
))
1020 result
= phm_get_max_high_clocks(hwmgr
, clocks
);