drivers/gpu/drm/amd/powerplay/hwmgr/fiji_clockpowergating.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include "hwmgr.h"
  25 #include "fiji_clockpowergating.h"
  26 #include "fiji_ppsmc.h"
  27 #include "fiji_hwmgr.h"
  28
  29 int fiji_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr)
  30 {
  31         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
  32
  33         data->uvd_power_gated = false;
  34         data->vce_power_gated = false;
  35         data->samu_power_gated = false;
  36         data->acp_power_gated = false;
  37
  38         return 0;
  39 }
  40
  41 int fiji_phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
  42 {
  43         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
  44
  45         if (data->uvd_power_gated == bgate)
  46                 return 0;
  47
  48         data->uvd_power_gated = bgate;
  49
  50         if (bgate)
  51                 fiji_update_uvd_dpm(hwmgr, true);
  52         else
  53                 fiji_update_uvd_dpm(hwmgr, false);
  54
  55         return 0;
  56 }
  57
  58 int fiji_phm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
  59 {
  60         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
  61         struct phm_set_power_state_input states;
  62         const struct pp_power_state  *pcurrent;
  63         struct pp_power_state  *requested;
  64
  65         if (data->vce_power_gated == bgate)
  66                 return 0;
  67
  68         data->vce_power_gated = bgate;
  69
  70         pcurrent = hwmgr->current_ps;
  71         requested = hwmgr->request_ps;
  72
  73         states.pcurrent_state = &(pcurrent->hardware);
  74         states.pnew_state = &(requested->hardware);
  75
  76         fiji_update_vce_dpm(hwmgr, &states);
  77         fiji_enable_disable_vce_dpm(hwmgr, !bgate);
  78
  79         return 0;
  80 }
  81
  82 int fiji_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate)
  83 {
  84         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
  85
  86         if (data->samu_power_gated == bgate)
  87                 return 0;
  88
  89         data->samu_power_gated = bgate;
  90
  91         if (bgate)
  92                 fiji_update_samu_dpm(hwmgr, true);
  93         else
  94                 fiji_update_samu_dpm(hwmgr, false);
  95
  96         return 0;
  97 }
  98
  99 int fiji_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate)
 100 {
 101         struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
 102
 103         if (data->acp_power_gated == bgate)
 104                 return 0;
 105
 106         data->acp_power_gated = bgate;
 107
 108         if (bgate)
 109                 fiji_update_acp_dpm(hwmgr, true);
 110         else
 111                 fiji_update_acp_dpm(hwmgr, false);
 112
 113         return 0;
 114 }