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drm/amdkfd: Improve multiple SDMA queues support per process
[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / amd / powerplay / smumgr / fiji_smc.h
1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23 #ifndef FIJI_SMC_H
24 #define FIJI_SMC_H
25
26 #include "smumgr.h"
27 #include "smu73.h"
28
29 struct fiji_pt_defaults {
30 uint8_t SviLoadLineEn;
31 uint8_t SviLoadLineVddC;
32 uint8_t TDC_VDDC_ThrottleReleaseLimitPerc;
33 uint8_t TDC_MAWt;
34 uint8_t TdcWaterfallCtl;
35 uint8_t DTEAmbientTempBase;
36 };
37
38 int fiji_populate_all_graphic_levels(struct pp_hwmgr *hwmgr);
39 int fiji_populate_all_memory_levels(struct pp_hwmgr *hwmgr);
40 int fiji_init_smc_table(struct pp_hwmgr *hwmgr);
41 int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr);
42 int fiji_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type);
43 int fiji_update_sclk_threshold(struct pp_hwmgr *hwmgr);
44 uint32_t fiji_get_offsetof(uint32_t type, uint32_t member);
45 uint32_t fiji_get_mac_definition(uint32_t value);
46 int fiji_process_firmware_header(struct pp_hwmgr *hwmgr);
47 int fiji_initialize_mc_reg_table(struct pp_hwmgr *hwmgr);
48 bool fiji_is_dpm_running(struct pp_hwmgr *hwmgr);
49 int fiji_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
50 struct amd_pp_profile *request);
51 int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr);
52 #endif
53