drivers/gpu/drm/ast/ast_mode.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  * Parts based on xf86-video-ast
   4  * Copyright (c) 2005 ASPEED Technology Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  */
  27 /*
  28  * Authors: Dave Airlie <airlied@redhat.com>
  29  */
  30 #include <linux/export.h>
  31 #include <drm/drmP.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_crtc_helper.h>
  34 #include <drm/drm_plane_helper.h>
  35 #include "ast_drv.h"
  36
  37 #include "ast_tables.h"
  38
  39 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
  40 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
  41 static int ast_cursor_set(struct drm_crtc *crtc,
  42                           struct drm_file *file_priv,
  43                           uint32_t handle,
  44                           uint32_t width,
  45                           uint32_t height);
  46 static int ast_cursor_move(struct drm_crtc *crtc,
  47                            int x, int y);
  48
  49 static inline void ast_load_palette_index(struct ast_private *ast,
  50                                      u8 index, u8 red, u8 green,
  51                                      u8 blue)
  52 {
  53         ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
  54         ast_io_read8(ast, AST_IO_SEQ_PORT);
  55         ast_io_write8(ast, AST_IO_DAC_DATA, red);
  56         ast_io_read8(ast, AST_IO_SEQ_PORT);
  57         ast_io_write8(ast, AST_IO_DAC_DATA, green);
  58         ast_io_read8(ast, AST_IO_SEQ_PORT);
  59         ast_io_write8(ast, AST_IO_DAC_DATA, blue);
  60         ast_io_read8(ast, AST_IO_SEQ_PORT);
  61 }
  62
  63 static void ast_crtc_load_lut(struct drm_crtc *crtc)
  64 {
  65         struct ast_private *ast = crtc->dev->dev_private;
  66         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
  67         int i;
  68
  69         if (!crtc->enabled)
  70                 return;
  71
  72         for (i = 0; i < 256; i++)
  73                 ast_load_palette_index(ast, i, ast_crtc->lut_r[i],
  74                                        ast_crtc->lut_g[i], ast_crtc->lut_b[i]);
  75 }
  76
  77 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
  78                                     struct drm_display_mode *adjusted_mode,
  79                                     struct ast_vbios_mode_info *vbios_mode)
  80 {
  81         struct ast_private *ast = crtc->dev->dev_private;
  82         u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
  83         u32 hborder, vborder;
  84         bool check_sync;
  85         struct ast_vbios_enhtable *best = NULL;
  86
  87         switch (crtc->primary->fb->bits_per_pixel) {
  88         case 8:
  89                 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
  90                 color_index = VGAModeIndex - 1;
  91                 break;
  92         case 16:
  93                 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
  94                 color_index = HiCModeIndex;
  95                 break;
  96         case 24:
  97         case 32:
  98                 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
  99                 color_index = TrueCModeIndex;
 100                 break;
 101         default:
 102                 return false;
 103         }
 104
 105         switch (crtc->mode.crtc_hdisplay) {
 106         case 640:
 107                 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
 108                 break;
 109         case 800:
 110                 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
 111                 break;
 112         case 1024:
 113                 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
 114                 break;
 115         case 1280:
 116                 if (crtc->mode.crtc_vdisplay == 800)
 117                         vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
 118                 else
 119                         vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
 120                 break;
 121         case 1360:
 122                 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
 123                 break;
 124         case 1440:
 125                 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
 126                 break;
 127         case 1600:
 128                 if (crtc->mode.crtc_vdisplay == 900)
 129                         vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
 130                 else
 131                         vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
 132                 break;
 133         case 1680:
 134                 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
 135                 break;
 136         case 1920:
 137                 if (crtc->mode.crtc_vdisplay == 1080)
 138                         vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
 139                 else
 140                         vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
 141                 break;
 142         default:
 143                 return false;
 144         }
 145
 146         refresh_rate = drm_mode_vrefresh(mode);
 147         check_sync = vbios_mode->enh_table->flags & WideScreenMode;
 148         do {
 149                 struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
 150
 151                 while (loop->refresh_rate != 0xff) {
 152                         if ((check_sync) &&
 153                             (((mode->flags & DRM_MODE_FLAG_NVSYNC)  &&
 154                               (loop->flags & PVSync))  ||
 155                              ((mode->flags & DRM_MODE_FLAG_PVSYNC)  &&
 156                               (loop->flags & NVSync))  ||
 157                              ((mode->flags & DRM_MODE_FLAG_NHSYNC)  &&
 158                               (loop->flags & PHSync))  ||
 159                              ((mode->flags & DRM_MODE_FLAG_PHSYNC)  &&
 160                               (loop->flags & NHSync)))) {
 161                                 loop++;
 162                                 continue;
 163                         }
 164                         if (loop->refresh_rate <= refresh_rate
 165                             && (!best || loop->refresh_rate > best->refresh_rate))
 166                                 best = loop;
 167                         loop++;
 168                 }
 169                 if (best || !check_sync)
 170                         break;
 171                 check_sync = 0;
 172         } while (1);
 173         if (best)
 174                 vbios_mode->enh_table = best;
 175
 176         hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
 177         vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
 178
 179         adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
 180         adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
 181         adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
 182         adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
 183                 vbios_mode->enh_table->hfp;
 184         adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
 185                                          vbios_mode->enh_table->hfp +
 186                                          vbios_mode->enh_table->hsync);
 187
 188         adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
 189         adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
 190         adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
 191         adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
 192                 vbios_mode->enh_table->vfp;
 193         adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
 194                                          vbios_mode->enh_table->vfp +
 195                                          vbios_mode->enh_table->vsync);
 196
 197         refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
 198         mode_id = vbios_mode->enh_table->mode_id;
 199
 200         if (ast->chip == AST1180) {
 201                 /* TODO 1180 */
 202         } else {
 203                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
 204                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
 205                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
 206
 207                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 208                 if (vbios_mode->enh_table->flags & NewModeInfo) {
 209                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 210                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->primary->fb->bits_per_pixel);
 211                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
 212                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
 213                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
 214
 215                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
 216                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
 217                 }
 218         }
 219
 220         return true;
 221
 222
 223 }
 224 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 225                             struct ast_vbios_mode_info *vbios_mode)
 226 {
 227         struct ast_private *ast = crtc->dev->dev_private;
 228         struct ast_vbios_stdtable *stdtable;
 229         u32 i;
 230         u8 jreg;
 231
 232         stdtable = vbios_mode->std_table;
 233
 234         jreg = stdtable->misc;
 235         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 236
 237         /* Set SEQ */
 238         ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
 239         for (i = 0; i < 4; i++) {
 240                 jreg = stdtable->seq[i];
 241                 if (!i)
 242                         jreg |= 0x20;
 243                 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
 244         }
 245
 246         /* Set CRTC */
 247         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 248         for (i = 0; i < 25; i++)
 249                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 250
 251         /* set AR */
 252         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 253         for (i = 0; i < 20; i++) {
 254                 jreg = stdtable->ar[i];
 255                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
 256                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
 257         }
 258         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
 259         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
 260
 261         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 262         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
 263
 264         /* Set GR */
 265         for (i = 0; i < 9; i++)
 266                 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
 267 }
 268
 269 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 270                              struct ast_vbios_mode_info *vbios_mode)
 271 {
 272         struct ast_private *ast = crtc->dev->dev_private;
 273         u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
 274         u16 temp;
 275
 276         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 277
 278         temp = (mode->crtc_htotal >> 3) - 5;
 279         if (temp & 0x100)
 280                 jregAC |= 0x01; /* HT D[8] */
 281         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
 282
 283         temp = (mode->crtc_hdisplay >> 3) - 1;
 284         if (temp & 0x100)
 285                 jregAC |= 0x04; /* HDE D[8] */
 286         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
 287
 288         temp = (mode->crtc_hblank_start >> 3) - 1;
 289         if (temp & 0x100)
 290                 jregAC |= 0x10; /* HBS D[8] */
 291         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
 292
 293         temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
 294         if (temp & 0x20)
 295                 jreg05 |= 0x80;  /* HBE D[5] */
 296         if (temp & 0x40)
 297                 jregAD |= 0x01;  /* HBE D[5] */
 298         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
 299
 300         temp = (mode->crtc_hsync_start >> 3) - 1;
 301         if (temp & 0x100)
 302                 jregAC |= 0x40; /* HRS D[5] */
 303         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
 304
 305         temp = ((mode->crtc_hsync_end >> 3) - 1) & 0x3f;
 306         if (temp & 0x20)
 307                 jregAD |= 0x04; /* HRE D[5] */
 308         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
 309
 310         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
 311         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
 312
 313         /* vert timings */
 314         temp = (mode->crtc_vtotal) - 2;
 315         if (temp & 0x100)
 316                 jreg07 |= 0x01;
 317         if (temp & 0x200)
 318                 jreg07 |= 0x20;
 319         if (temp & 0x400)
 320                 jregAE |= 0x01;
 321         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
 322
 323         temp = (mode->crtc_vsync_start) - 1;
 324         if (temp & 0x100)
 325                 jreg07 |= 0x04;
 326         if (temp & 0x200)
 327                 jreg07 |= 0x80;
 328         if (temp & 0x400)
 329                 jregAE |= 0x08;
 330         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
 331
 332         temp = (mode->crtc_vsync_end - 1) & 0x3f;
 333         if (temp & 0x10)
 334                 jregAE |= 0x20;
 335         if (temp & 0x20)
 336                 jregAE |= 0x40;
 337         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
 338
 339         temp = mode->crtc_vdisplay - 1;
 340         if (temp & 0x100)
 341                 jreg07 |= 0x02;
 342         if (temp & 0x200)
 343                 jreg07 |= 0x40;
 344         if (temp & 0x400)
 345                 jregAE |= 0x02;
 346         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
 347
 348         temp = mode->crtc_vblank_start - 1;
 349         if (temp & 0x100)
 350                 jreg07 |= 0x08;
 351         if (temp & 0x200)
 352                 jreg09 |= 0x20;
 353         if (temp & 0x400)
 354                 jregAE |= 0x04;
 355         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
 356
 357         temp = mode->crtc_vblank_end - 1;
 358         if (temp & 0x100)
 359                 jregAE |= 0x10;
 360         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
 361
 362         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
 363         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
 364         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
 365
 366         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
 367 }
 368
 369 static void ast_set_offset_reg(struct drm_crtc *crtc)
 370 {
 371         struct ast_private *ast = crtc->dev->dev_private;
 372
 373         u16 offset;
 374
 375         offset = crtc->primary->fb->pitches[0] >> 3;
 376         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
 377         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
 378 }
 379
 380 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
 381                              struct ast_vbios_mode_info *vbios_mode)
 382 {
 383         struct ast_private *ast = dev->dev_private;
 384         struct ast_vbios_dclk_info *clk_info;
 385
 386         clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
 387
 388         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
 389         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
 390         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
 391                                (clk_info->param3 & 0x80) | ((clk_info->param3 & 0x3) << 4));
 392 }
 393
 394 static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 395                              struct ast_vbios_mode_info *vbios_mode)
 396 {
 397         struct ast_private *ast = crtc->dev->dev_private;
 398         u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
 399
 400         switch (crtc->primary->fb->bits_per_pixel) {
 401         case 8:
 402                 jregA0 = 0x70;
 403                 jregA3 = 0x01;
 404                 jregA8 = 0x00;
 405                 break;
 406         case 15:
 407         case 16:
 408                 jregA0 = 0x70;
 409                 jregA3 = 0x04;
 410                 jregA8 = 0x02;
 411                 break;
 412         case 32:
 413                 jregA0 = 0x70;
 414                 jregA3 = 0x08;
 415                 jregA8 = 0x02;
 416                 break;
 417         }
 418
 419         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
 420         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
 421         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
 422
 423         /* Set Threshold */
 424         if (ast->chip == AST2300 || ast->chip == AST2400) {
 425                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
 426                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
 427         } else if (ast->chip == AST2100 ||
 428                    ast->chip == AST1100 ||
 429                    ast->chip == AST2200 ||
 430                    ast->chip == AST2150) {
 431                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
 432                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
 433         } else {
 434                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
 435                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
 436         }
 437 }
 438
 439 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
 440                       struct ast_vbios_mode_info *vbios_mode)
 441 {
 442         struct ast_private *ast = dev->dev_private;
 443         u8 jreg;
 444
 445         jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
 446         jreg &= ~0xC0;
 447         if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
 448         if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
 449         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 450 }
 451
 452 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 453                      struct ast_vbios_mode_info *vbios_mode)
 454 {
 455         switch (crtc->primary->fb->bits_per_pixel) {
 456         case 8:
 457                 break;
 458         default:
 459                 return false;
 460         }
 461         return true;
 462 }
 463
 464 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
 465 {
 466         struct ast_private *ast = crtc->dev->dev_private;
 467         u32 addr;
 468
 469         addr = offset >> 2;
 470         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
 471         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
 472         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
 473
 474 }
 475
 476 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
 477 {
 478         struct ast_private *ast = crtc->dev->dev_private;
 479
 480         if (ast->chip == AST1180)
 481                 return;
 482
 483         switch (mode) {
 484         case DRM_MODE_DPMS_ON:
 485         case DRM_MODE_DPMS_STANDBY:
 486         case DRM_MODE_DPMS_SUSPEND:
 487                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
 488                 if (ast->tx_chip_type == AST_TX_DP501)
 489                         ast_set_dp501_video_output(crtc->dev, 1);
 490                 ast_crtc_load_lut(crtc);
 491                 break;
 492         case DRM_MODE_DPMS_OFF:
 493                 if (ast->tx_chip_type == AST_TX_DP501)
 494                         ast_set_dp501_video_output(crtc->dev, 0);
 495                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
 496                 break;
 497         }
 498 }
 499
 500 /* ast is different - we will force move buffers out of VRAM */
 501 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
 502                                 struct drm_framebuffer *fb,
 503                                 int x, int y, int atomic)
 504 {
 505         struct ast_private *ast = crtc->dev->dev_private;
 506         struct drm_gem_object *obj;
 507         struct ast_framebuffer *ast_fb;
 508         struct ast_bo *bo;
 509         int ret;
 510         u64 gpu_addr;
 511
 512         /* push the previous fb to system ram */
 513         if (!atomic && fb) {
 514                 ast_fb = to_ast_framebuffer(fb);
 515                 obj = ast_fb->obj;
 516                 bo = gem_to_ast_bo(obj);
 517                 ret = ast_bo_reserve(bo, false);
 518                 if (ret)
 519                         return ret;
 520                 ast_bo_push_sysram(bo);
 521                 ast_bo_unreserve(bo);
 522         }
 523
 524         ast_fb = to_ast_framebuffer(crtc->primary->fb);
 525         obj = ast_fb->obj;
 526         bo = gem_to_ast_bo(obj);
 527
 528         ret = ast_bo_reserve(bo, false);
 529         if (ret)
 530                 return ret;
 531
 532         ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
 533         if (ret) {
 534                 ast_bo_unreserve(bo);
 535                 return ret;
 536         }
 537
 538         if (&ast->fbdev->afb == ast_fb) {
 539                 /* if pushing console in kmap it */
 540                 ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &bo->kmap);
 541                 if (ret)
 542                         DRM_ERROR("failed to kmap fbcon\n");
 543                 else
 544                         ast_fbdev_set_base(ast, gpu_addr);
 545         }
 546         ast_bo_unreserve(bo);
 547
 548         ast_set_start_address_crt1(crtc, (u32)gpu_addr);
 549
 550         return 0;
 551 }
 552
 553 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
 554                              struct drm_framebuffer *old_fb)
 555 {
 556         return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
 557 }
 558
 559 static int ast_crtc_mode_set(struct drm_crtc *crtc,
 560                              struct drm_display_mode *mode,
 561                              struct drm_display_mode *adjusted_mode,
 562                              int x, int y,
 563                              struct drm_framebuffer *old_fb)
 564 {
 565         struct drm_device *dev = crtc->dev;
 566         struct ast_private *ast = crtc->dev->dev_private;
 567         struct ast_vbios_mode_info vbios_mode;
 568         bool ret;
 569         if (ast->chip == AST1180) {
 570                 DRM_ERROR("AST 1180 modesetting not supported\n");
 571                 return -EINVAL;
 572         }
 573
 574         ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
 575         if (ret == false)
 576                 return -EINVAL;
 577         ast_open_key(ast);
 578
 579         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x04);
 580
 581         ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
 582         ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
 583         ast_set_offset_reg(crtc);
 584         ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
 585         ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
 586         ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
 587         ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
 588
 589         ast_crtc_mode_set_base(crtc, x, y, old_fb);
 590
 591         return 0;
 592 }
 593
 594 static void ast_crtc_disable(struct drm_crtc *crtc)
 595 {
 596
 597 }
 598
 599 static void ast_crtc_prepare(struct drm_crtc *crtc)
 600 {
 601
 602 }
 603
 604 static void ast_crtc_commit(struct drm_crtc *crtc)
 605 {
 606         struct ast_private *ast = crtc->dev->dev_private;
 607         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
 608 }
 609
 610
 611 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
 612         .dpms = ast_crtc_dpms,
 613         .mode_set = ast_crtc_mode_set,
 614         .mode_set_base = ast_crtc_mode_set_base,
 615         .disable = ast_crtc_disable,
 616         .load_lut = ast_crtc_load_lut,
 617         .prepare = ast_crtc_prepare,
 618         .commit = ast_crtc_commit,
 619
 620 };
 621
 622 static void ast_crtc_reset(struct drm_crtc *crtc)
 623 {
 624
 625 }
 626
 627 static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 628                               u16 *blue, uint32_t size)
 629 {
 630         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
 631         int i;
 632
 633         /* userspace palettes are always correct as is */
 634         for (i = 0; i < size; i++) {
 635                 ast_crtc->lut_r[i] = red[i] >> 8;
 636                 ast_crtc->lut_g[i] = green[i] >> 8;
 637                 ast_crtc->lut_b[i] = blue[i] >> 8;
 638         }
 639         ast_crtc_load_lut(crtc);
 640
 641         return 0;
 642 }
 643
 644
 645 static void ast_crtc_destroy(struct drm_crtc *crtc)
 646 {
 647         drm_crtc_cleanup(crtc);
 648         kfree(crtc);
 649 }
 650
 651 static const struct drm_crtc_funcs ast_crtc_funcs = {
 652         .cursor_set = ast_cursor_set,
 653         .cursor_move = ast_cursor_move,
 654         .reset = ast_crtc_reset,
 655         .set_config = drm_crtc_helper_set_config,
 656         .gamma_set = ast_crtc_gamma_set,
 657         .destroy = ast_crtc_destroy,
 658 };
 659
 660 static int ast_crtc_init(struct drm_device *dev)
 661 {
 662         struct ast_crtc *crtc;
 663         int i;
 664
 665         crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
 666         if (!crtc)
 667                 return -ENOMEM;
 668
 669         drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
 670         drm_mode_crtc_set_gamma_size(&crtc->base, 256);
 671         drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
 672
 673         for (i = 0; i < 256; i++) {
 674                 crtc->lut_r[i] = i;
 675                 crtc->lut_g[i] = i;
 676                 crtc->lut_b[i] = i;
 677         }
 678         return 0;
 679 }
 680
 681 static void ast_encoder_destroy(struct drm_encoder *encoder)
 682 {
 683         drm_encoder_cleanup(encoder);
 684         kfree(encoder);
 685 }
 686
 687
 688 static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector)
 689 {
 690         int enc_id = connector->encoder_ids[0];
 691         /* pick the encoder ids */
 692         if (enc_id)
 693                 return drm_encoder_find(connector->dev, enc_id);
 694         return NULL;
 695 }
 696
 697
 698 static const struct drm_encoder_funcs ast_enc_funcs = {
 699         .destroy = ast_encoder_destroy,
 700 };
 701
 702 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
 703 {
 704
 705 }
 706
 707 static void ast_encoder_mode_set(struct drm_encoder *encoder,
 708                                struct drm_display_mode *mode,
 709                                struct drm_display_mode *adjusted_mode)
 710 {
 711 }
 712
 713 static void ast_encoder_prepare(struct drm_encoder *encoder)
 714 {
 715
 716 }
 717
 718 static void ast_encoder_commit(struct drm_encoder *encoder)
 719 {
 720
 721 }
 722
 723
 724 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
 725         .dpms = ast_encoder_dpms,
 726         .prepare = ast_encoder_prepare,
 727         .commit = ast_encoder_commit,
 728         .mode_set = ast_encoder_mode_set,
 729 };
 730
 731 static int ast_encoder_init(struct drm_device *dev)
 732 {
 733         struct ast_encoder *ast_encoder;
 734
 735         ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
 736         if (!ast_encoder)
 737                 return -ENOMEM;
 738
 739         drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
 740                          DRM_MODE_ENCODER_DAC, NULL);
 741         drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
 742
 743         ast_encoder->base.possible_crtcs = 1;
 744         return 0;
 745 }
 746
 747 static int ast_get_modes(struct drm_connector *connector)
 748 {
 749         struct ast_connector *ast_connector = to_ast_connector(connector);
 750         struct ast_private *ast = connector->dev->dev_private;
 751         struct edid *edid;
 752         int ret;
 753         bool flags = false;
 754         if (ast->tx_chip_type == AST_TX_DP501) {
 755                 ast->dp501_maxclk = 0xff;
 756                 edid = kmalloc(128, GFP_KERNEL);
 757                 if (!edid)
 758                         return -ENOMEM;
 759
 760                 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
 761                 if (flags)
 762                         ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
 763                 else
 764                         kfree(edid);
 765         }
 766         if (!flags)
 767                 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
 768         if (edid) {
 769                 drm_mode_connector_update_edid_property(&ast_connector->base, edid);
 770                 ret = drm_add_edid_modes(connector, edid);
 771                 kfree(edid);
 772                 return ret;
 773         } else
 774                 drm_mode_connector_update_edid_property(&ast_connector->base, NULL);
 775         return 0;
 776 }
 777
 778 static int ast_mode_valid(struct drm_connector *connector,
 779                           struct drm_display_mode *mode)
 780 {
 781         struct ast_private *ast = connector->dev->dev_private;
 782         int flags = MODE_NOMODE;
 783         uint32_t jtemp;
 784
 785         if (ast->support_wide_screen) {
 786                 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
 787                         return MODE_OK;
 788                 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
 789                         return MODE_OK;
 790                 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
 791                         return MODE_OK;
 792                 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
 793                         return MODE_OK;
 794                 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
 795                         return MODE_OK;
 796
 797                 if ((ast->chip == AST2100) || (ast->chip == AST2200) || (ast->chip == AST2300) || (ast->chip == AST2400) || (ast->chip == AST1180)) {
 798                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
 799                                 return MODE_OK;
 800
 801                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
 802                                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
 803                                 if (jtemp & 0x01)
 804                                         return MODE_NOMODE;
 805                                 else
 806                                         return MODE_OK;
 807                         }
 808                 }
 809         }
 810         switch (mode->hdisplay) {
 811         case 640:
 812                 if (mode->vdisplay == 480) flags = MODE_OK;
 813                 break;
 814         case 800:
 815                 if (mode->vdisplay == 600) flags = MODE_OK;
 816                 break;
 817         case 1024:
 818                 if (mode->vdisplay == 768) flags = MODE_OK;
 819                 break;
 820         case 1280:
 821                 if (mode->vdisplay == 1024) flags = MODE_OK;
 822                 break;
 823         case 1600:
 824                 if (mode->vdisplay == 1200) flags = MODE_OK;
 825                 break;
 826         default:
 827                 return flags;
 828         }
 829
 830         return flags;
 831 }
 832
 833 static void ast_connector_destroy(struct drm_connector *connector)
 834 {
 835         struct ast_connector *ast_connector = to_ast_connector(connector);
 836         ast_i2c_destroy(ast_connector->i2c);
 837         drm_connector_unregister(connector);
 838         drm_connector_cleanup(connector);
 839         kfree(connector);
 840 }
 841
 842 static enum drm_connector_status
 843 ast_connector_detect(struct drm_connector *connector, bool force)
 844 {
 845         return connector_status_connected;
 846 }
 847
 848 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
 849         .mode_valid = ast_mode_valid,
 850         .get_modes = ast_get_modes,
 851         .best_encoder = ast_best_single_encoder,
 852 };
 853
 854 static const struct drm_connector_funcs ast_connector_funcs = {
 855         .dpms = drm_helper_connector_dpms,
 856         .detect = ast_connector_detect,
 857         .fill_modes = drm_helper_probe_single_connector_modes,
 858         .destroy = ast_connector_destroy,
 859 };
 860
 861 static int ast_connector_init(struct drm_device *dev)
 862 {
 863         struct ast_connector *ast_connector;
 864         struct drm_connector *connector;
 865         struct drm_encoder *encoder;
 866
 867         ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
 868         if (!ast_connector)
 869                 return -ENOMEM;
 870
 871         connector = &ast_connector->base;
 872         drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 873
 874         drm_connector_helper_add(connector, &ast_connector_helper_funcs);
 875
 876         connector->interlace_allowed = 0;
 877         connector->doublescan_allowed = 0;
 878
 879         drm_connector_register(connector);
 880
 881         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 882
 883         encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
 884         drm_mode_connector_attach_encoder(connector, encoder);
 885
 886         ast_connector->i2c = ast_i2c_create(dev);
 887         if (!ast_connector->i2c)
 888                 DRM_ERROR("failed to add ddc bus for connector\n");
 889
 890         return 0;
 891 }
 892
 893 /* allocate cursor cache and pin at start of VRAM */
 894 static int ast_cursor_init(struct drm_device *dev)
 895 {
 896         struct ast_private *ast = dev->dev_private;
 897         int size;
 898         int ret;
 899         struct drm_gem_object *obj;
 900         struct ast_bo *bo;
 901         uint64_t gpu_addr;
 902
 903         size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM;
 904
 905         ret = ast_gem_create(dev, size, true, &obj);
 906         if (ret)
 907                 return ret;
 908         bo = gem_to_ast_bo(obj);
 909         ret = ast_bo_reserve(bo, false);
 910         if (unlikely(ret != 0))
 911                 goto fail;
 912
 913         ret = ast_bo_pin(bo, TTM_PL_FLAG_VRAM, &gpu_addr);
 914         ast_bo_unreserve(bo);
 915         if (ret)
 916                 goto fail;
 917
 918         /* kmap the object */
 919         ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &ast->cache_kmap);
 920         if (ret)
 921                 goto fail;
 922
 923         ast->cursor_cache = obj;
 924         ast->cursor_cache_gpu_addr = gpu_addr;
 925         DRM_DEBUG_KMS("pinned cursor cache at %llx\n", ast->cursor_cache_gpu_addr);
 926         return 0;
 927 fail:
 928         return ret;
 929 }
 930
 931 static void ast_cursor_fini(struct drm_device *dev)
 932 {
 933         struct ast_private *ast = dev->dev_private;
 934         ttm_bo_kunmap(&ast->cache_kmap);
 935         drm_gem_object_unreference_unlocked(ast->cursor_cache);
 936 }
 937
 938 int ast_mode_init(struct drm_device *dev)
 939 {
 940         ast_cursor_init(dev);
 941         ast_crtc_init(dev);
 942         ast_encoder_init(dev);
 943         ast_connector_init(dev);
 944         return 0;
 945 }
 946
 947 void ast_mode_fini(struct drm_device *dev)
 948 {
 949         ast_cursor_fini(dev);
 950 }
 951
 952 static int get_clock(void *i2c_priv)
 953 {
 954         struct ast_i2c_chan *i2c = i2c_priv;
 955         struct ast_private *ast = i2c->dev->dev_private;
 956         uint32_t val;
 957
 958         val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4;
 959         return val & 1 ? 1 : 0;
 960 }
 961
 962 static int get_data(void *i2c_priv)
 963 {
 964         struct ast_i2c_chan *i2c = i2c_priv;
 965         struct ast_private *ast = i2c->dev->dev_private;
 966         uint32_t val;
 967
 968         val = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5;
 969         return val & 1 ? 1 : 0;
 970 }
 971
 972 static void set_clock(void *i2c_priv, int clock)
 973 {
 974         struct ast_i2c_chan *i2c = i2c_priv;
 975         struct ast_private *ast = i2c->dev->dev_private;
 976         int i;
 977         u8 ujcrb7, jtemp;
 978
 979         for (i = 0; i < 0x10000; i++) {
 980                 ujcrb7 = ((clock & 0x01) ? 0 : 1);
 981                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfe, ujcrb7);
 982                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
 983                 if (ujcrb7 == jtemp)
 984                         break;
 985         }
 986 }
 987
 988 static void set_data(void *i2c_priv, int data)
 989 {
 990         struct ast_i2c_chan *i2c = i2c_priv;
 991         struct ast_private *ast = i2c->dev->dev_private;
 992         int i;
 993         u8 ujcrb7, jtemp;
 994
 995         for (i = 0; i < 0x10000; i++) {
 996                 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
 997                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xfb, ujcrb7);
 998                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
 999                 if (ujcrb7 == jtemp)
1000                         break;
1001         }
1002 }
1003
1004 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
1005 {
1006         struct ast_i2c_chan *i2c;
1007         int ret;
1008
1009         i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
1010         if (!i2c)
1011                 return NULL;
1012
1013         i2c->adapter.owner = THIS_MODULE;
1014         i2c->adapter.class = I2C_CLASS_DDC;
1015         i2c->adapter.dev.parent = &dev->pdev->dev;
1016         i2c->dev = dev;
1017         i2c_set_adapdata(&i2c->adapter, i2c);
1018         snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
1019                  "AST i2c bit bus");
1020         i2c->adapter.algo_data = &i2c->bit;
1021
1022         i2c->bit.udelay = 20;
1023         i2c->bit.timeout = 2;
1024         i2c->bit.data = i2c;
1025         i2c->bit.setsda = set_data;
1026         i2c->bit.setscl = set_clock;
1027         i2c->bit.getsda = get_data;
1028         i2c->bit.getscl = get_clock;
1029         ret = i2c_bit_add_bus(&i2c->adapter);
1030         if (ret) {
1031                 DRM_ERROR("Failed to register bit i2c\n");
1032                 goto out_free;
1033         }
1034
1035         return i2c;
1036 out_free:
1037         kfree(i2c);
1038         return NULL;
1039 }
1040
1041 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1042 {
1043         if (!i2c)
1044                 return;
1045         i2c_del_adapter(&i2c->adapter);
1046         kfree(i2c);
1047 }
1048
1049 static void ast_show_cursor(struct drm_crtc *crtc)
1050 {
1051         struct ast_private *ast = crtc->dev->dev_private;
1052         u8 jreg;
1053
1054         jreg = 0x2;
1055         /* enable ARGB cursor */
1056         jreg |= 1;
1057         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1058 }
1059
1060 static void ast_hide_cursor(struct drm_crtc *crtc)
1061 {
1062         struct ast_private *ast = crtc->dev->dev_private;
1063         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1064 }
1065
1066 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1067 {
1068         union {
1069                 u32 ul;
1070                 u8 b[4];
1071         } srcdata32[2], data32;
1072         union {
1073                 u16 us;
1074                 u8 b[2];
1075         } data16;
1076         u32 csum = 0;
1077         s32 alpha_dst_delta, last_alpha_dst_delta;
1078         u8 *srcxor, *dstxor;
1079         int i, j;
1080         u32 per_pixel_copy, two_pixel_copy;
1081
1082         alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1083         last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1084
1085         srcxor = src;
1086         dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1087         per_pixel_copy = width & 1;
1088         two_pixel_copy = width >> 1;
1089
1090         for (j = 0; j < height; j++) {
1091                 for (i = 0; i < two_pixel_copy; i++) {
1092                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1093                         srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1094                         data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1095                         data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1096                         data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1097                         data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1098
1099                         writel(data32.ul, dstxor);
1100                         csum += data32.ul;
1101
1102                         dstxor += 4;
1103                         srcxor += 8;
1104
1105                 }
1106
1107                 for (i = 0; i < per_pixel_copy; i++) {
1108                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1109                         data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1110                         data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1111                         writew(data16.us, dstxor);
1112                         csum += (u32)data16.us;
1113
1114                         dstxor += 2;
1115                         srcxor += 4;
1116                 }
1117                 dstxor += last_alpha_dst_delta;
1118         }
1119         return csum;
1120 }
1121
1122 static int ast_cursor_set(struct drm_crtc *crtc,
1123                           struct drm_file *file_priv,
1124                           uint32_t handle,
1125                           uint32_t width,
1126                           uint32_t height)
1127 {
1128         struct ast_private *ast = crtc->dev->dev_private;
1129         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1130         struct drm_gem_object *obj;
1131         struct ast_bo *bo;
1132         uint64_t gpu_addr;
1133         u32 csum;
1134         int ret;
1135         struct ttm_bo_kmap_obj uobj_map;
1136         u8 *src, *dst;
1137         bool src_isiomem, dst_isiomem;
1138         if (!handle) {
1139                 ast_hide_cursor(crtc);
1140                 return 0;
1141         }
1142
1143         if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1144                 return -EINVAL;
1145
1146         obj = drm_gem_object_lookup(file_priv, handle);
1147         if (!obj) {
1148                 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1149                 return -ENOENT;
1150         }
1151         bo = gem_to_ast_bo(obj);
1152
1153         ret = ast_bo_reserve(bo, false);
1154         if (ret)
1155                 goto fail;
1156
1157         ret = ttm_bo_kmap(&bo->bo, 0, bo->bo.num_pages, &uobj_map);
1158
1159         src = ttm_kmap_obj_virtual(&uobj_map, &src_isiomem);
1160         dst = ttm_kmap_obj_virtual(&ast->cache_kmap, &dst_isiomem);
1161
1162         if (src_isiomem == true)
1163                 DRM_ERROR("src cursor bo should be in main memory\n");
1164         if (dst_isiomem == false)
1165                 DRM_ERROR("dst bo should be in VRAM\n");
1166
1167         dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1168
1169         /* do data transfer to cursor cache */
1170         csum = copy_cursor_image(src, dst, width, height);
1171
1172         /* write checksum + signature */
1173         ttm_bo_kunmap(&uobj_map);
1174         ast_bo_unreserve(bo);
1175         {
1176                 u8 *dst = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1177                 writel(csum, dst);
1178                 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1179                 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1180                 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1181                 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1182
1183                 /* set pattern offset */
1184                 gpu_addr = ast->cursor_cache_gpu_addr;
1185                 gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1186                 gpu_addr >>= 3;
1187                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);
1188                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);
1189                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);
1190         }
1191         ast_crtc->cursor_width = width;
1192         ast_crtc->cursor_height = height;
1193         ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1194         ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1195
1196         ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM;
1197
1198         ast_show_cursor(crtc);
1199
1200         drm_gem_object_unreference_unlocked(obj);
1201         return 0;
1202 fail:
1203         drm_gem_object_unreference_unlocked(obj);
1204         return ret;
1205 }
1206
1207 static int ast_cursor_move(struct drm_crtc *crtc,
1208                            int x, int y)
1209 {
1210         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1211         struct ast_private *ast = crtc->dev->dev_private;
1212         int x_offset, y_offset;
1213         u8 *sig;
1214
1215         sig = (u8 *)ast->cache_kmap.virtual + (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1216         writel(x, sig + AST_HWC_SIGNATURE_X);
1217         writel(y, sig + AST_HWC_SIGNATURE_Y);
1218
1219         x_offset = ast_crtc->offset_x;
1220         y_offset = ast_crtc->offset_y;
1221         if (x < 0) {
1222                 x_offset = (-x) + ast_crtc->offset_x;
1223                 x = 0;
1224         }
1225
1226         if (y < 0) {
1227                 y_offset = (-y) + ast_crtc->offset_y;
1228                 y = 0;
1229         }
1230         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1231         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1232         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1233         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1234         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1235         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1236
1237         /* dummy write to fire HWC */
1238         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xCB, 0xFF, 0x00);
1239
1240         return 0;
1241 }