2 * Copyright © 2009 Keith Packard
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that copyright
7 * notice and this permission notice appear in supporting documentation, and
8 * that the name of the copyright holders not be used in advertising or
9 * publicity pertaining to distribution of the software without specific,
10 * written prior permission. The copyright holders make no representations
11 * about the suitability of this software for any purpose. It is provided "as
12 * is" without express or implied warranty.
14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/i2c.h>
30 #include <linux/seq_file.h>
31 #include <drm/drm_dp_helper.h>
34 #include "drm_crtc_helper_internal.h"
39 * These functions contain some common logic and helpers at various abstraction
40 * levels to deal with Display Port sink devices and related things like DP aux
41 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
45 /* Helpers for DP link training */
46 static u8
dp_link_status(const u8 link_status
[DP_LINK_STATUS_SIZE
], int r
)
48 return link_status
[r
- DP_LANE0_1_STATUS
];
51 static u8
dp_get_lane_status(const u8 link_status
[DP_LINK_STATUS_SIZE
],
54 int i
= DP_LANE0_1_STATUS
+ (lane
>> 1);
55 int s
= (lane
& 1) * 4;
56 u8 l
= dp_link_status(link_status
, i
);
57 return (l
>> s
) & 0xf;
60 bool drm_dp_channel_eq_ok(const u8 link_status
[DP_LINK_STATUS_SIZE
],
67 lane_align
= dp_link_status(link_status
,
68 DP_LANE_ALIGN_STATUS_UPDATED
);
69 if ((lane_align
& DP_INTERLANE_ALIGN_DONE
) == 0)
71 for (lane
= 0; lane
< lane_count
; lane
++) {
72 lane_status
= dp_get_lane_status(link_status
, lane
);
73 if ((lane_status
& DP_CHANNEL_EQ_BITS
) != DP_CHANNEL_EQ_BITS
)
78 EXPORT_SYMBOL(drm_dp_channel_eq_ok
);
80 bool drm_dp_clock_recovery_ok(const u8 link_status
[DP_LINK_STATUS_SIZE
],
86 for (lane
= 0; lane
< lane_count
; lane
++) {
87 lane_status
= dp_get_lane_status(link_status
, lane
);
88 if ((lane_status
& DP_LANE_CR_DONE
) == 0)
93 EXPORT_SYMBOL(drm_dp_clock_recovery_ok
);
95 u8
drm_dp_get_adjust_request_voltage(const u8 link_status
[DP_LINK_STATUS_SIZE
],
98 int i
= DP_ADJUST_REQUEST_LANE0_1
+ (lane
>> 1);
100 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT
:
101 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT
);
102 u8 l
= dp_link_status(link_status
, i
);
104 return ((l
>> s
) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT
;
106 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage
);
108 u8
drm_dp_get_adjust_request_pre_emphasis(const u8 link_status
[DP_LINK_STATUS_SIZE
],
111 int i
= DP_ADJUST_REQUEST_LANE0_1
+ (lane
>> 1);
112 int s
= ((lane
& 1) ?
113 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT
:
114 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT
);
115 u8 l
= dp_link_status(link_status
, i
);
117 return ((l
>> s
) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT
;
119 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis
);
121 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
]) {
122 if (dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] == 0)
125 mdelay(dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] * 4);
127 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay
);
129 void drm_dp_link_train_channel_eq_delay(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
]) {
130 if (dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] == 0)
133 mdelay(dpcd
[DP_TRAINING_AUX_RD_INTERVAL
] * 4);
135 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay
);
137 u8
drm_dp_link_rate_to_bw_code(int link_rate
)
142 return DP_LINK_BW_1_62
;
144 return DP_LINK_BW_2_7
;
146 return DP_LINK_BW_5_4
;
149 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code
);
151 int drm_dp_bw_code_to_link_rate(u8 link_bw
)
154 case DP_LINK_BW_1_62
:
163 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate
);
165 #define AUX_RETRY_INTERVAL 500 /* us */
170 * The DisplayPort AUX channel is an abstraction to allow generic, driver-
171 * independent access to AUX functionality. Drivers can take advantage of
172 * this by filling in the fields of the drm_dp_aux structure.
174 * Transactions are described using a hardware-independent drm_dp_aux_msg
175 * structure, which is passed into a driver's .transfer() implementation.
176 * Both native and I2C-over-AUX transactions are supported.
179 static int drm_dp_dpcd_access(struct drm_dp_aux
*aux
, u8 request
,
180 unsigned int offset
, void *buffer
, size_t size
)
182 struct drm_dp_aux_msg msg
;
183 unsigned int retry
, native_reply
;
184 int err
= 0, ret
= 0;
186 memset(&msg
, 0, sizeof(msg
));
187 msg
.address
= offset
;
188 msg
.request
= request
;
192 mutex_lock(&aux
->hw_mutex
);
195 * The specification doesn't give any recommendation on how often to
196 * retry native transactions. We used to retry 7 times like for
197 * aux i2c transactions but real world devices this wasn't
198 * sufficient, bump to 32 which makes Dell 4k monitors happier.
200 for (retry
= 0; retry
< 32; retry
++) {
201 if (ret
!= 0 && ret
!= -ETIMEDOUT
) {
202 usleep_range(AUX_RETRY_INTERVAL
,
203 AUX_RETRY_INTERVAL
+ 100);
206 ret
= aux
->transfer(aux
, &msg
);
209 native_reply
= msg
.reply
& DP_AUX_NATIVE_REPLY_MASK
;
210 if (native_reply
== DP_AUX_NATIVE_REPLY_ACK
) {
220 * We want the error we return to be the error we received on
221 * the first transaction, since we may get a different error the
228 DRM_DEBUG_KMS("Too many retries, giving up. First error: %d\n", err
);
232 mutex_unlock(&aux
->hw_mutex
);
237 * drm_dp_dpcd_read() - read a series of bytes from the DPCD
238 * @aux: DisplayPort AUX channel
239 * @offset: address of the (first) register to read
240 * @buffer: buffer to store the register values
241 * @size: number of bytes in @buffer
243 * Returns the number of bytes transferred on success, or a negative error
244 * code on failure. -EIO is returned if the request was NAKed by the sink or
245 * if the retry count was exceeded. If not all bytes were transferred, this
246 * function returns -EPROTO. Errors from the underlying AUX channel transfer
247 * function, with the exception of -EBUSY (which causes the transaction to
248 * be retried), are propagated to the caller.
250 ssize_t
drm_dp_dpcd_read(struct drm_dp_aux
*aux
, unsigned int offset
,
251 void *buffer
, size_t size
)
256 * HP ZR24w corrupts the first DPCD access after entering power save
257 * mode. Eg. on a read, the entire buffer will be filled with the same
258 * byte. Do a throw away read to avoid corrupting anything we care
259 * about. Afterwards things will work correctly until the monitor
260 * gets woken up and subsequently re-enters power save mode.
262 * The user pressing any button on the monitor is enough to wake it
263 * up, so there is no particularly good place to do the workaround.
264 * We just have to do it before any DPCD access and hope that the
265 * monitor doesn't power down exactly after the throw away read.
267 ret
= drm_dp_dpcd_access(aux
, DP_AUX_NATIVE_READ
, DP_DPCD_REV
, buffer
,
272 return drm_dp_dpcd_access(aux
, DP_AUX_NATIVE_READ
, offset
, buffer
,
275 EXPORT_SYMBOL(drm_dp_dpcd_read
);
278 * drm_dp_dpcd_write() - write a series of bytes to the DPCD
279 * @aux: DisplayPort AUX channel
280 * @offset: address of the (first) register to write
281 * @buffer: buffer containing the values to write
282 * @size: number of bytes in @buffer
284 * Returns the number of bytes transferred on success, or a negative error
285 * code on failure. -EIO is returned if the request was NAKed by the sink or
286 * if the retry count was exceeded. If not all bytes were transferred, this
287 * function returns -EPROTO. Errors from the underlying AUX channel transfer
288 * function, with the exception of -EBUSY (which causes the transaction to
289 * be retried), are propagated to the caller.
291 ssize_t
drm_dp_dpcd_write(struct drm_dp_aux
*aux
, unsigned int offset
,
292 void *buffer
, size_t size
)
294 return drm_dp_dpcd_access(aux
, DP_AUX_NATIVE_WRITE
, offset
, buffer
,
297 EXPORT_SYMBOL(drm_dp_dpcd_write
);
300 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
301 * @aux: DisplayPort AUX channel
302 * @status: buffer to store the link status in (must be at least 6 bytes)
304 * Returns the number of bytes transferred on success or a negative error
307 int drm_dp_dpcd_read_link_status(struct drm_dp_aux
*aux
,
308 u8 status
[DP_LINK_STATUS_SIZE
])
310 return drm_dp_dpcd_read(aux
, DP_LANE0_1_STATUS
, status
,
311 DP_LINK_STATUS_SIZE
);
313 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status
);
316 * drm_dp_link_probe() - probe a DisplayPort link for capabilities
317 * @aux: DisplayPort AUX channel
318 * @link: pointer to structure in which to return link capabilities
320 * The structure filled in by this function can usually be passed directly
321 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
322 * configure the link based on the link's capabilities.
324 * Returns 0 on success or a negative error code on failure.
326 int drm_dp_link_probe(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
331 memset(link
, 0, sizeof(*link
));
333 err
= drm_dp_dpcd_read(aux
, DP_DPCD_REV
, values
, sizeof(values
));
337 link
->revision
= values
[0];
338 link
->rate
= drm_dp_bw_code_to_link_rate(values
[1]);
339 link
->num_lanes
= values
[2] & DP_MAX_LANE_COUNT_MASK
;
341 if (values
[2] & DP_ENHANCED_FRAME_CAP
)
342 link
->capabilities
|= DP_LINK_CAP_ENHANCED_FRAMING
;
346 EXPORT_SYMBOL(drm_dp_link_probe
);
349 * drm_dp_link_power_up() - power up a DisplayPort link
350 * @aux: DisplayPort AUX channel
351 * @link: pointer to a structure containing the link configuration
353 * Returns 0 on success or a negative error code on failure.
355 int drm_dp_link_power_up(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
360 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
361 if (link
->revision
< 0x11)
364 err
= drm_dp_dpcd_readb(aux
, DP_SET_POWER
, &value
);
368 value
&= ~DP_SET_POWER_MASK
;
369 value
|= DP_SET_POWER_D0
;
371 err
= drm_dp_dpcd_writeb(aux
, DP_SET_POWER
, value
);
376 * According to the DP 1.1 specification, a "Sink Device must exit the
377 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
378 * Control Field" (register 0x600).
380 usleep_range(1000, 2000);
384 EXPORT_SYMBOL(drm_dp_link_power_up
);
387 * drm_dp_link_power_down() - power down a DisplayPort link
388 * @aux: DisplayPort AUX channel
389 * @link: pointer to a structure containing the link configuration
391 * Returns 0 on success or a negative error code on failure.
393 int drm_dp_link_power_down(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
398 /* DP_SET_POWER register is only available on DPCD v1.1 and later */
399 if (link
->revision
< 0x11)
402 err
= drm_dp_dpcd_readb(aux
, DP_SET_POWER
, &value
);
406 value
&= ~DP_SET_POWER_MASK
;
407 value
|= DP_SET_POWER_D3
;
409 err
= drm_dp_dpcd_writeb(aux
, DP_SET_POWER
, value
);
415 EXPORT_SYMBOL(drm_dp_link_power_down
);
418 * drm_dp_link_configure() - configure a DisplayPort link
419 * @aux: DisplayPort AUX channel
420 * @link: pointer to a structure containing the link configuration
422 * Returns 0 on success or a negative error code on failure.
424 int drm_dp_link_configure(struct drm_dp_aux
*aux
, struct drm_dp_link
*link
)
429 values
[0] = drm_dp_link_rate_to_bw_code(link
->rate
);
430 values
[1] = link
->num_lanes
;
432 if (link
->capabilities
& DP_LINK_CAP_ENHANCED_FRAMING
)
433 values
[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN
;
435 err
= drm_dp_dpcd_write(aux
, DP_LINK_BW_SET
, values
, sizeof(values
));
441 EXPORT_SYMBOL(drm_dp_link_configure
);
444 * drm_dp_downstream_max_clock() - extract branch device max
445 * pixel rate for legacy VGA
446 * converter or max TMDS clock
448 * @dpcd: DisplayPort configuration data
449 * @port_cap: port capabilities
451 * Returns max clock in kHz on success or 0 if max clock not defined
453 int drm_dp_downstream_max_clock(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
],
454 const u8 port_cap
[4])
456 int type
= port_cap
[0] & DP_DS_PORT_TYPE_MASK
;
457 bool detailed_cap_info
= dpcd
[DP_DOWNSTREAMPORT_PRESENT
] &
458 DP_DETAILED_CAP_INFO_AVAILABLE
;
460 if (!detailed_cap_info
)
464 case DP_DS_PORT_TYPE_VGA
:
465 return port_cap
[1] * 8 * 1000;
466 case DP_DS_PORT_TYPE_DVI
:
467 case DP_DS_PORT_TYPE_HDMI
:
468 case DP_DS_PORT_TYPE_DP_DUALMODE
:
469 return port_cap
[1] * 2500;
474 EXPORT_SYMBOL(drm_dp_downstream_max_clock
);
477 * drm_dp_downstream_max_bpc() - extract branch device max
479 * @dpcd: DisplayPort configuration data
480 * @port_cap: port capabilities
482 * Returns max bpc on success or 0 if max bpc not defined
484 int drm_dp_downstream_max_bpc(const u8 dpcd
[DP_RECEIVER_CAP_SIZE
],
485 const u8 port_cap
[4])
487 int type
= port_cap
[0] & DP_DS_PORT_TYPE_MASK
;
488 bool detailed_cap_info
= dpcd
[DP_DOWNSTREAMPORT_PRESENT
] &
489 DP_DETAILED_CAP_INFO_AVAILABLE
;
492 if (!detailed_cap_info
)
496 case DP_DS_PORT_TYPE_VGA
:
497 case DP_DS_PORT_TYPE_DVI
:
498 case DP_DS_PORT_TYPE_HDMI
:
499 case DP_DS_PORT_TYPE_DP_DUALMODE
:
500 bpc
= port_cap
[2] & DP_DS_MAX_BPC_MASK
;
516 EXPORT_SYMBOL(drm_dp_downstream_max_bpc
);
519 * drm_dp_downstream_id() - identify branch device
520 * @aux: DisplayPort AUX channel
521 * @id: DisplayPort branch device id
523 * Returns branch device id on success or NULL on failure
525 int drm_dp_downstream_id(struct drm_dp_aux
*aux
, char id
[6])
527 return drm_dp_dpcd_read(aux
, DP_BRANCH_ID
, id
, 6);
529 EXPORT_SYMBOL(drm_dp_downstream_id
);
532 * drm_dp_downstream_debug() - debug DP branch devices
533 * @m: pointer for debugfs file
534 * @dpcd: DisplayPort configuration data
535 * @port_cap: port capabilities
536 * @aux: DisplayPort AUX channel
539 void drm_dp_downstream_debug(struct seq_file
*m
,
540 const u8 dpcd
[DP_RECEIVER_CAP_SIZE
],
541 const u8 port_cap
[4], struct drm_dp_aux
*aux
)
543 bool detailed_cap_info
= dpcd
[DP_DOWNSTREAMPORT_PRESENT
] &
544 DP_DETAILED_CAP_INFO_AVAILABLE
;
550 int type
= port_cap
[0] & DP_DS_PORT_TYPE_MASK
;
551 bool branch_device
= dpcd
[DP_DOWNSTREAMPORT_PRESENT
] &
552 DP_DWN_STRM_PORT_PRESENT
;
554 seq_printf(m
, "\tDP branch device present: %s\n",
555 branch_device
? "yes" : "no");
561 case DP_DS_PORT_TYPE_DP
:
562 seq_puts(m
, "\t\tType: DisplayPort\n");
564 case DP_DS_PORT_TYPE_VGA
:
565 seq_puts(m
, "\t\tType: VGA\n");
567 case DP_DS_PORT_TYPE_DVI
:
568 seq_puts(m
, "\t\tType: DVI\n");
570 case DP_DS_PORT_TYPE_HDMI
:
571 seq_puts(m
, "\t\tType: HDMI\n");
573 case DP_DS_PORT_TYPE_NON_EDID
:
574 seq_puts(m
, "\t\tType: others without EDID support\n");
576 case DP_DS_PORT_TYPE_DP_DUALMODE
:
577 seq_puts(m
, "\t\tType: DP++\n");
579 case DP_DS_PORT_TYPE_WIRELESS
:
580 seq_puts(m
, "\t\tType: Wireless\n");
583 seq_puts(m
, "\t\tType: N/A\n");
586 memset(id
, 0, sizeof(id
));
587 drm_dp_downstream_id(aux
, id
);
588 seq_printf(m
, "\t\tID: %s\n", id
);
590 len
= drm_dp_dpcd_read(aux
, DP_BRANCH_HW_REV
, &rev
[0], 1);
592 seq_printf(m
, "\t\tHW: %d.%d\n",
593 (rev
[0] & 0xf0) >> 4, rev
[0] & 0xf);
595 len
= drm_dp_dpcd_read(aux
, DP_BRANCH_SW_REV
, rev
, 2);
597 seq_printf(m
, "\t\tSW: %d.%d\n", rev
[0], rev
[1]);
599 if (detailed_cap_info
) {
600 clk
= drm_dp_downstream_max_clock(dpcd
, port_cap
);
603 if (type
== DP_DS_PORT_TYPE_VGA
)
604 seq_printf(m
, "\t\tMax dot clock: %d kHz\n", clk
);
606 seq_printf(m
, "\t\tMax TMDS clock: %d kHz\n", clk
);
609 bpc
= drm_dp_downstream_max_bpc(dpcd
, port_cap
);
612 seq_printf(m
, "\t\tMax bpc: %d\n", bpc
);
615 EXPORT_SYMBOL(drm_dp_downstream_debug
);
618 * I2C-over-AUX implementation
621 static u32
drm_dp_i2c_functionality(struct i2c_adapter
*adapter
)
623 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
|
624 I2C_FUNC_SMBUS_READ_BLOCK_DATA
|
625 I2C_FUNC_SMBUS_BLOCK_PROC_CALL
|
629 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg
*msg
)
632 * In case of i2c defer or short i2c ack reply to a write,
633 * we need to switch to WRITE_STATUS_UPDATE to drain the
634 * rest of the message
636 if ((msg
->request
& ~DP_AUX_I2C_MOT
) == DP_AUX_I2C_WRITE
) {
637 msg
->request
&= DP_AUX_I2C_MOT
;
638 msg
->request
|= DP_AUX_I2C_WRITE_STATUS_UPDATE
;
642 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
643 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
644 #define AUX_STOP_LEN 4
645 #define AUX_CMD_LEN 4
646 #define AUX_ADDRESS_LEN 20
647 #define AUX_REPLY_PAD_LEN 4
648 #define AUX_LENGTH_LEN 8
651 * Calculate the duration of the AUX request/reply in usec. Gives the
652 * "best" case estimate, ie. successful while as short as possible.
654 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg
*msg
)
656 int len
= AUX_PRECHARGE_LEN
+ AUX_SYNC_LEN
+ AUX_STOP_LEN
+
657 AUX_CMD_LEN
+ AUX_ADDRESS_LEN
+ AUX_LENGTH_LEN
;
659 if ((msg
->request
& DP_AUX_I2C_READ
) == 0)
660 len
+= msg
->size
* 8;
665 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg
*msg
)
667 int len
= AUX_PRECHARGE_LEN
+ AUX_SYNC_LEN
+ AUX_STOP_LEN
+
668 AUX_CMD_LEN
+ AUX_REPLY_PAD_LEN
;
671 * For read we expect what was asked. For writes there will
672 * be 0 or 1 data bytes. Assume 0 for the "best" case.
674 if (msg
->request
& DP_AUX_I2C_READ
)
675 len
+= msg
->size
* 8;
680 #define I2C_START_LEN 1
681 #define I2C_STOP_LEN 1
682 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
683 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
686 * Calculate the length of the i2c transfer in usec, assuming
687 * the i2c bus speed is as specified. Gives the the "worst"
688 * case estimate, ie. successful while as long as possible.
689 * Doesn't account the the "MOT" bit, and instead assumes each
690 * message includes a START, ADDRESS and STOP. Neither does it
691 * account for additional random variables such as clock stretching.
693 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg
*msg
,
696 /* AUX bitrate is 1MHz, i2c bitrate as specified */
697 return DIV_ROUND_UP((I2C_START_LEN
+ I2C_ADDR_LEN
+
698 msg
->size
* I2C_DATA_LEN
+
699 I2C_STOP_LEN
) * 1000, i2c_speed_khz
);
703 * Deterine how many retries should be attempted to successfully transfer
704 * the specified message, based on the estimated durations of the
705 * i2c and AUX transfers.
707 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg
*msg
,
710 int aux_time_us
= drm_dp_aux_req_duration(msg
) +
711 drm_dp_aux_reply_duration(msg
);
712 int i2c_time_us
= drm_dp_i2c_msg_duration(msg
, i2c_speed_khz
);
714 return DIV_ROUND_UP(i2c_time_us
, aux_time_us
+ AUX_RETRY_INTERVAL
);
718 * FIXME currently assumes 10 kHz as some real world devices seem
719 * to require it. We should query/set the speed via DPCD if supported.
721 static int dp_aux_i2c_speed_khz __read_mostly
= 10;
722 module_param_unsafe(dp_aux_i2c_speed_khz
, int, 0644);
723 MODULE_PARM_DESC(dp_aux_i2c_speed_khz
,
724 "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
727 * Transfer a single I2C-over-AUX message and handle various error conditions,
728 * retrying the transaction as appropriate. It is assumed that the
729 * &drm_dp_aux.transfer function does not modify anything in the msg other than the
732 * Returns bytes transferred on success, or a negative error code on failure.
734 static int drm_dp_i2c_do_msg(struct drm_dp_aux
*aux
, struct drm_dp_aux_msg
*msg
)
736 unsigned int retry
, defer_i2c
;
739 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
740 * is required to retry at least seven times upon receiving AUX_DEFER
741 * before giving up the AUX transaction.
743 * We also try to account for the i2c bus speed.
745 int max_retries
= max(7, drm_dp_i2c_retry_count(msg
, dp_aux_i2c_speed_khz
));
747 for (retry
= 0, defer_i2c
= 0; retry
< (max_retries
+ defer_i2c
); retry
++) {
748 ret
= aux
->transfer(aux
, msg
);
754 * While timeouts can be errors, they're usually normal
755 * behavior (for instance, when a driver tries to
756 * communicate with a non-existant DisplayPort device).
757 * Avoid spamming the kernel log with timeout errors.
759 if (ret
== -ETIMEDOUT
)
760 DRM_DEBUG_KMS_RATELIMITED("transaction timed out\n");
762 DRM_DEBUG_KMS("transaction failed: %d\n", ret
);
768 switch (msg
->reply
& DP_AUX_NATIVE_REPLY_MASK
) {
769 case DP_AUX_NATIVE_REPLY_ACK
:
771 * For I2C-over-AUX transactions this isn't enough, we
772 * need to check for the I2C ACK reply.
776 case DP_AUX_NATIVE_REPLY_NACK
:
777 DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret
, msg
->size
);
780 case DP_AUX_NATIVE_REPLY_DEFER
:
781 DRM_DEBUG_KMS("native defer\n");
783 * We could check for I2C bit rate capabilities and if
784 * available adjust this interval. We could also be
785 * more careful with DP-to-legacy adapters where a
786 * long legacy cable may force very low I2C bit rates.
788 * For now just defer for long enough to hopefully be
789 * safe for all use-cases.
791 usleep_range(AUX_RETRY_INTERVAL
, AUX_RETRY_INTERVAL
+ 100);
795 DRM_ERROR("invalid native reply %#04x\n", msg
->reply
);
799 switch (msg
->reply
& DP_AUX_I2C_REPLY_MASK
) {
800 case DP_AUX_I2C_REPLY_ACK
:
802 * Both native ACK and I2C ACK replies received. We
803 * can assume the transfer was successful.
805 if (ret
!= msg
->size
)
806 drm_dp_i2c_msg_write_status_update(msg
);
809 case DP_AUX_I2C_REPLY_NACK
:
810 DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret
, msg
->size
);
811 aux
->i2c_nack_count
++;
814 case DP_AUX_I2C_REPLY_DEFER
:
815 DRM_DEBUG_KMS("I2C defer\n");
816 /* DP Compliance Test 4.2.2.5 Requirement:
817 * Must have at least 7 retries for I2C defers on the
818 * transaction to pass this test
820 aux
->i2c_defer_count
++;
823 usleep_range(AUX_RETRY_INTERVAL
, AUX_RETRY_INTERVAL
+ 100);
824 drm_dp_i2c_msg_write_status_update(msg
);
829 DRM_ERROR("invalid I2C reply %#04x\n", msg
->reply
);
834 DRM_DEBUG_KMS("too many retries, giving up\n");
838 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg
*msg
,
839 const struct i2c_msg
*i2c_msg
)
841 msg
->request
= (i2c_msg
->flags
& I2C_M_RD
) ?
842 DP_AUX_I2C_READ
: DP_AUX_I2C_WRITE
;
843 msg
->request
|= DP_AUX_I2C_MOT
;
847 * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
849 * Returns an error code on failure, or a recommended transfer size on success.
851 static int drm_dp_i2c_drain_msg(struct drm_dp_aux
*aux
, struct drm_dp_aux_msg
*orig_msg
)
853 int err
, ret
= orig_msg
->size
;
854 struct drm_dp_aux_msg msg
= *orig_msg
;
856 while (msg
.size
> 0) {
857 err
= drm_dp_i2c_do_msg(aux
, &msg
);
859 return err
== 0 ? -EPROTO
: err
;
861 if (err
< msg
.size
&& err
< ret
) {
862 DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
875 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
876 * packets to be as large as possible. If not, the I2C transactions never
877 * succeed. Hence the default is maximum.
879 static int dp_aux_i2c_transfer_size __read_mostly
= DP_AUX_MAX_PAYLOAD_BYTES
;
880 module_param_unsafe(dp_aux_i2c_transfer_size
, int, 0644);
881 MODULE_PARM_DESC(dp_aux_i2c_transfer_size
,
882 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
884 static int drm_dp_i2c_xfer(struct i2c_adapter
*adapter
, struct i2c_msg
*msgs
,
887 struct drm_dp_aux
*aux
= adapter
->algo_data
;
889 unsigned transfer_size
;
890 struct drm_dp_aux_msg msg
;
893 dp_aux_i2c_transfer_size
= clamp(dp_aux_i2c_transfer_size
, 1, DP_AUX_MAX_PAYLOAD_BYTES
);
895 memset(&msg
, 0, sizeof(msg
));
897 for (i
= 0; i
< num
; i
++) {
898 msg
.address
= msgs
[i
].addr
;
899 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
900 /* Send a bare address packet to start the transaction.
901 * Zero sized messages specify an address only (bare
902 * address) transaction.
906 err
= drm_dp_i2c_do_msg(aux
, &msg
);
909 * Reset msg.request in case in case it got
910 * changed into a WRITE_STATUS_UPDATE.
912 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
916 /* We want each transaction to be as large as possible, but
917 * we'll go to smaller sizes if the hardware gives us a
920 transfer_size
= dp_aux_i2c_transfer_size
;
921 for (j
= 0; j
< msgs
[i
].len
; j
+= msg
.size
) {
922 msg
.buffer
= msgs
[i
].buf
+ j
;
923 msg
.size
= min(transfer_size
, msgs
[i
].len
- j
);
925 err
= drm_dp_i2c_drain_msg(aux
, &msg
);
928 * Reset msg.request in case in case it got
929 * changed into a WRITE_STATUS_UPDATE.
931 drm_dp_i2c_msg_set_request(&msg
, &msgs
[i
]);
942 /* Send a bare address packet to close out the transaction.
943 * Zero sized messages specify an address only (bare
944 * address) transaction.
946 msg
.request
&= ~DP_AUX_I2C_MOT
;
949 (void)drm_dp_i2c_do_msg(aux
, &msg
);
954 static const struct i2c_algorithm drm_dp_i2c_algo
= {
955 .functionality
= drm_dp_i2c_functionality
,
956 .master_xfer
= drm_dp_i2c_xfer
,
959 static struct drm_dp_aux
*i2c_to_aux(struct i2c_adapter
*i2c
)
961 return container_of(i2c
, struct drm_dp_aux
, ddc
);
964 static void lock_bus(struct i2c_adapter
*i2c
, unsigned int flags
)
966 mutex_lock(&i2c_to_aux(i2c
)->hw_mutex
);
969 static int trylock_bus(struct i2c_adapter
*i2c
, unsigned int flags
)
971 return mutex_trylock(&i2c_to_aux(i2c
)->hw_mutex
);
974 static void unlock_bus(struct i2c_adapter
*i2c
, unsigned int flags
)
976 mutex_unlock(&i2c_to_aux(i2c
)->hw_mutex
);
979 static const struct i2c_lock_operations drm_dp_i2c_lock_ops
= {
980 .lock_bus
= lock_bus
,
981 .trylock_bus
= trylock_bus
,
982 .unlock_bus
= unlock_bus
,
985 static int drm_dp_aux_get_crc(struct drm_dp_aux
*aux
, u8
*crc
)
990 ret
= drm_dp_dpcd_readb(aux
, DP_TEST_SINK
, &buf
);
994 WARN_ON(!(buf
& DP_TEST_SINK_START
));
996 ret
= drm_dp_dpcd_readb(aux
, DP_TEST_SINK_MISC
, &buf
);
1000 count
= buf
& DP_TEST_COUNT_MASK
;
1001 if (count
== aux
->crc_count
)
1002 return -EAGAIN
; /* No CRC yet */
1004 aux
->crc_count
= count
;
1007 * At DP_TEST_CRC_R_CR, there's 6 bytes containing CRC data, 2 bytes
1008 * per component (RGB or CrYCb).
1010 ret
= drm_dp_dpcd_read(aux
, DP_TEST_CRC_R_CR
, crc
, 6);
1017 static void drm_dp_aux_crc_work(struct work_struct
*work
)
1019 struct drm_dp_aux
*aux
= container_of(work
, struct drm_dp_aux
,
1021 struct drm_crtc
*crtc
;
1026 if (WARN_ON(!aux
->crtc
))
1030 while (crtc
->crc
.opened
) {
1031 drm_crtc_wait_one_vblank(crtc
);
1032 if (!crtc
->crc
.opened
)
1035 ret
= drm_dp_aux_get_crc(aux
, crc_bytes
);
1036 if (ret
== -EAGAIN
) {
1037 usleep_range(1000, 2000);
1038 ret
= drm_dp_aux_get_crc(aux
, crc_bytes
);
1041 if (ret
== -EAGAIN
) {
1042 DRM_DEBUG_KMS("Get CRC failed after retrying: %d\n",
1046 DRM_DEBUG_KMS("Failed to get a CRC: %d\n", ret
);
1050 crcs
[0] = crc_bytes
[0] | crc_bytes
[1] << 8;
1051 crcs
[1] = crc_bytes
[2] | crc_bytes
[3] << 8;
1052 crcs
[2] = crc_bytes
[4] | crc_bytes
[5] << 8;
1053 drm_crtc_add_crc_entry(crtc
, false, 0, crcs
);
1058 * drm_dp_aux_init() - minimally initialise an aux channel
1059 * @aux: DisplayPort AUX channel
1061 * If you need to use the drm_dp_aux's i2c adapter prior to registering it
1062 * with the outside world, call drm_dp_aux_init() first. You must still
1063 * call drm_dp_aux_register() once the connector has been registered to
1064 * allow userspace access to the auxiliary DP channel.
1066 void drm_dp_aux_init(struct drm_dp_aux
*aux
)
1068 mutex_init(&aux
->hw_mutex
);
1069 INIT_WORK(&aux
->crc_work
, drm_dp_aux_crc_work
);
1071 aux
->ddc
.algo
= &drm_dp_i2c_algo
;
1072 aux
->ddc
.algo_data
= aux
;
1073 aux
->ddc
.retries
= 3;
1075 aux
->ddc
.lock_ops
= &drm_dp_i2c_lock_ops
;
1077 EXPORT_SYMBOL(drm_dp_aux_init
);
1080 * drm_dp_aux_register() - initialise and register aux channel
1081 * @aux: DisplayPort AUX channel
1083 * Automatically calls drm_dp_aux_init() if this hasn't been done yet.
1085 * Returns 0 on success or a negative error code on failure.
1087 int drm_dp_aux_register(struct drm_dp_aux
*aux
)
1092 drm_dp_aux_init(aux
);
1094 aux
->ddc
.class = I2C_CLASS_DDC
;
1095 aux
->ddc
.owner
= THIS_MODULE
;
1096 aux
->ddc
.dev
.parent
= aux
->dev
;
1097 aux
->ddc
.dev
.of_node
= aux
->dev
->of_node
;
1099 strlcpy(aux
->ddc
.name
, aux
->name
? aux
->name
: dev_name(aux
->dev
),
1100 sizeof(aux
->ddc
.name
));
1102 ret
= drm_dp_aux_register_devnode(aux
);
1106 ret
= i2c_add_adapter(&aux
->ddc
);
1108 drm_dp_aux_unregister_devnode(aux
);
1114 EXPORT_SYMBOL(drm_dp_aux_register
);
1117 * drm_dp_aux_unregister() - unregister an AUX adapter
1118 * @aux: DisplayPort AUX channel
1120 void drm_dp_aux_unregister(struct drm_dp_aux
*aux
)
1122 drm_dp_aux_unregister_devnode(aux
);
1123 i2c_del_adapter(&aux
->ddc
);
1125 EXPORT_SYMBOL(drm_dp_aux_unregister
);
1127 #define PSR_SETUP_TIME(x) [DP_PSR_SETUP_TIME_ ## x >> DP_PSR_SETUP_TIME_SHIFT] = (x)
1130 * drm_dp_psr_setup_time() - PSR setup in time usec
1131 * @psr_cap: PSR capabilities from DPCD
1134 * PSR setup time for the panel in microseconds, negative
1135 * error code on failure.
1137 int drm_dp_psr_setup_time(const u8 psr_cap
[EDP_PSR_RECEIVER_CAP_SIZE
])
1139 static const u16 psr_setup_time_us
[] = {
1140 PSR_SETUP_TIME(330),
1141 PSR_SETUP_TIME(275),
1142 PSR_SETUP_TIME(165),
1143 PSR_SETUP_TIME(110),
1149 i
= (psr_cap
[1] & DP_PSR_SETUP_TIME_MASK
) >> DP_PSR_SETUP_TIME_SHIFT
;
1150 if (i
>= ARRAY_SIZE(psr_setup_time_us
))
1153 return psr_setup_time_us
[i
];
1155 EXPORT_SYMBOL(drm_dp_psr_setup_time
);
1157 #undef PSR_SETUP_TIME
1160 * drm_dp_start_crc() - start capture of frame CRCs
1161 * @aux: DisplayPort AUX channel
1162 * @crtc: CRTC displaying the frames whose CRCs are to be captured
1164 * Returns 0 on success or a negative error code on failure.
1166 int drm_dp_start_crc(struct drm_dp_aux
*aux
, struct drm_crtc
*crtc
)
1171 ret
= drm_dp_dpcd_readb(aux
, DP_TEST_SINK
, &buf
);
1175 ret
= drm_dp_dpcd_writeb(aux
, DP_TEST_SINK
, buf
| DP_TEST_SINK_START
);
1181 schedule_work(&aux
->crc_work
);
1185 EXPORT_SYMBOL(drm_dp_start_crc
);
1188 * drm_dp_stop_crc() - stop capture of frame CRCs
1189 * @aux: DisplayPort AUX channel
1191 * Returns 0 on success or a negative error code on failure.
1193 int drm_dp_stop_crc(struct drm_dp_aux
*aux
)
1198 ret
= drm_dp_dpcd_readb(aux
, DP_TEST_SINK
, &buf
);
1202 ret
= drm_dp_dpcd_writeb(aux
, DP_TEST_SINK
, buf
& ~DP_TEST_SINK_START
);
1206 flush_work(&aux
->crc_work
);
1211 EXPORT_SYMBOL(drm_dp_stop_crc
);
1219 #define OUI(first, second, third) { (first), (second), (third) }
1221 static const struct dpcd_quirk dpcd_quirk_list
[] = {
1222 /* Analogix 7737 needs reduced M and N at HBR2 link rates */
1223 { OUI(0x00, 0x22, 0xb9), true, BIT(DP_DPCD_QUIRK_LIMITED_M_N
) },
1229 * Get a bit mask of DPCD quirks for the sink/branch device identified by
1230 * ident. The quirk data is shared but it's up to the drivers to act on the
1233 * For now, only the OUI (first three bytes) is used, but this may be extended
1234 * to device identification string and hardware/firmware revisions later.
1237 drm_dp_get_quirks(const struct drm_dp_dpcd_ident
*ident
, bool is_branch
)
1239 const struct dpcd_quirk
*quirk
;
1243 for (i
= 0; i
< ARRAY_SIZE(dpcd_quirk_list
); i
++) {
1244 quirk
= &dpcd_quirk_list
[i
];
1246 if (quirk
->is_branch
!= is_branch
)
1249 if (memcmp(quirk
->oui
, ident
->oui
, sizeof(ident
->oui
)) != 0)
1252 quirks
|= quirk
->quirks
;
1259 * drm_dp_read_desc - read sink/branch descriptor from DPCD
1260 * @aux: DisplayPort AUX channel
1261 * @desc: Device decriptor to fill from DPCD
1262 * @is_branch: true for branch devices, false for sink devices
1264 * Read DPCD 0x400 (sink) or 0x500 (branch) into @desc. Also debug log the
1267 * Returns 0 on success or a negative error code on failure.
1269 int drm_dp_read_desc(struct drm_dp_aux
*aux
, struct drm_dp_desc
*desc
,
1272 struct drm_dp_dpcd_ident
*ident
= &desc
->ident
;
1273 unsigned int offset
= is_branch
? DP_BRANCH_OUI
: DP_SINK_OUI
;
1274 int ret
, dev_id_len
;
1276 ret
= drm_dp_dpcd_read(aux
, offset
, ident
, sizeof(*ident
));
1280 desc
->quirks
= drm_dp_get_quirks(ident
, is_branch
);
1282 dev_id_len
= strnlen(ident
->device_id
, sizeof(ident
->device_id
));
1284 DRM_DEBUG_KMS("DP %s: OUI %*phD dev-ID %*pE HW-rev %d.%d SW-rev %d.%d quirks 0x%04x\n",
1285 is_branch
? "branch" : "sink",
1286 (int)sizeof(ident
->oui
), ident
->oui
,
1287 dev_id_len
, ident
->device_id
,
1288 ident
->hw_rev
>> 4, ident
->hw_rev
& 0xf,
1289 ident
->sw_major_rev
, ident
->sw_minor_rev
,
1294 EXPORT_SYMBOL(drm_dp_read_desc
);