2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <linux/vga_switcheroo.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_displayid.h>
40 #define version_greater(edid, maj, min) \
41 (((edid)->version > (maj)) || \
42 ((edid)->version == (maj) && (edid)->revision > (min)))
44 #define EDID_EST_TIMINGS 16
45 #define EDID_STD_TIMINGS 8
46 #define EDID_DETAILED_TIMINGS 4
49 * EDID blocks out in the wild have a variety of bugs, try to collect
50 * them here (note that userspace may work around broken monitors first,
51 * but fixes should make their way here so that the kernel "just works"
52 * on as many displays as possible).
55 /* First detailed mode wrong, use largest 60Hz mode */
56 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
57 /* Reported 135MHz pixel clock is too high, needs adjustment */
58 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
59 /* Prefer the largest mode at 75 Hz */
60 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
61 /* Detail timing is in cm not mm */
62 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
63 /* Detailed timing descriptors have bogus size values, so just take the
64 * maximum size and use that.
66 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
67 /* Monitor forgot to set the first detailed is preferred bit. */
68 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
69 /* use +hsync +vsync for detailed mode */
70 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
71 /* Force reduced-blanking timings for detailed modes */
72 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
74 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
76 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
78 #define EDID_QUIRK_FORCE_6BPC (1 << 10)
80 struct detailed_mode_closure
{
81 struct drm_connector
*connector
;
93 static const struct edid_quirk
{
97 } edid_quirk_list
[] = {
99 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60
},
101 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60
},
103 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
105 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
106 { "AEO", 0, EDID_QUIRK_FORCE_6BPC
},
108 /* Belinea 10 15 55 */
109 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60
},
110 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60
},
112 /* Envision Peripherals, Inc. EN-7100e */
113 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH
},
114 /* Envision EN2028 */
115 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60
},
117 /* Funai Electronics PM36B */
118 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75
|
119 EDID_QUIRK_DETAILED_IN_CM
},
121 /* LG Philips LCD LP154W01-A5 */
122 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
123 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
125 /* Philips 107p5 CRT */
126 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
129 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
131 /* Samsung SyncMaster 205BW. Note: irony */
132 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP
},
133 /* Samsung SyncMaster 22[5-6]BW */
134 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60
},
135 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60
},
137 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
138 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC
},
140 /* ViewSonic VA2026w */
141 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING
},
143 /* Medion MD 30217 PG */
144 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75
},
146 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
147 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC
},
149 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
150 { "ETR", 13896, EDID_QUIRK_FORCE_8BPC
},
154 * Autogenerated from the DMT spec.
155 * This table is copied from xfree86/modes/xf86EdidModes.c.
157 static const struct drm_display_mode drm_dmt_modes
[] = {
158 /* 0x01 - 640x350@85Hz */
159 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
160 736, 832, 0, 350, 382, 385, 445, 0,
161 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
162 /* 0x02 - 640x400@85Hz */
163 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
164 736, 832, 0, 400, 401, 404, 445, 0,
165 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
166 /* 0x03 - 720x400@85Hz */
167 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 756,
168 828, 936, 0, 400, 401, 404, 446, 0,
169 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
170 /* 0x04 - 640x480@60Hz */
171 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
172 752, 800, 0, 480, 490, 492, 525, 0,
173 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
174 /* 0x05 - 640x480@72Hz */
175 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
176 704, 832, 0, 480, 489, 492, 520, 0,
177 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
178 /* 0x06 - 640x480@75Hz */
179 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
180 720, 840, 0, 480, 481, 484, 500, 0,
181 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
182 /* 0x07 - 640x480@85Hz */
183 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 36000, 640, 696,
184 752, 832, 0, 480, 481, 484, 509, 0,
185 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
186 /* 0x08 - 800x600@56Hz */
187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
188 896, 1024, 0, 600, 601, 603, 625, 0,
189 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
190 /* 0x09 - 800x600@60Hz */
191 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
192 968, 1056, 0, 600, 601, 605, 628, 0,
193 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
194 /* 0x0a - 800x600@72Hz */
195 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
196 976, 1040, 0, 600, 637, 643, 666, 0,
197 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
198 /* 0x0b - 800x600@75Hz */
199 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
200 896, 1056, 0, 600, 601, 604, 625, 0,
201 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
202 /* 0x0c - 800x600@85Hz */
203 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 56250, 800, 832,
204 896, 1048, 0, 600, 601, 604, 631, 0,
205 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
206 /* 0x0d - 800x600@120Hz RB */
207 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 73250, 800, 848,
208 880, 960, 0, 600, 603, 607, 636, 0,
209 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
210 /* 0x0e - 848x480@60Hz */
211 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER
, 33750, 848, 864,
212 976, 1088, 0, 480, 486, 494, 517, 0,
213 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
214 /* 0x0f - 1024x768@43Hz, interlace */
215 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
, 44900, 1024, 1032,
216 1208, 1264, 0, 768, 768, 776, 817, 0,
217 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
218 DRM_MODE_FLAG_INTERLACE
) },
219 /* 0x10 - 1024x768@60Hz */
220 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
221 1184, 1344, 0, 768, 771, 777, 806, 0,
222 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
223 /* 0x11 - 1024x768@70Hz */
224 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
225 1184, 1328, 0, 768, 771, 777, 806, 0,
226 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
227 /* 0x12 - 1024x768@75Hz */
228 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
229 1136, 1312, 0, 768, 769, 772, 800, 0,
230 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
231 /* 0x13 - 1024x768@85Hz */
232 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 94500, 1024, 1072,
233 1168, 1376, 0, 768, 769, 772, 808, 0,
234 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
235 /* 0x14 - 1024x768@120Hz RB */
236 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 115500, 1024, 1072,
237 1104, 1184, 0, 768, 771, 775, 813, 0,
238 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
239 /* 0x15 - 1152x864@75Hz */
240 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
241 1344, 1600, 0, 864, 865, 868, 900, 0,
242 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
243 /* 0x55 - 1280x720@60Hz */
244 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1390,
245 1430, 1650, 0, 720, 725, 730, 750, 0,
246 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
247 /* 0x16 - 1280x768@60Hz RB */
248 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 68250, 1280, 1328,
249 1360, 1440, 0, 768, 771, 778, 790, 0,
250 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
251 /* 0x17 - 1280x768@60Hz */
252 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
253 1472, 1664, 0, 768, 771, 778, 798, 0,
254 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
255 /* 0x18 - 1280x768@75Hz */
256 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 102250, 1280, 1360,
257 1488, 1696, 0, 768, 771, 778, 805, 0,
258 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
259 /* 0x19 - 1280x768@85Hz */
260 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 117500, 1280, 1360,
261 1496, 1712, 0, 768, 771, 778, 809, 0,
262 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
263 /* 0x1a - 1280x768@120Hz RB */
264 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 140250, 1280, 1328,
265 1360, 1440, 0, 768, 771, 778, 813, 0,
266 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
267 /* 0x1b - 1280x800@60Hz RB */
268 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 71000, 1280, 1328,
269 1360, 1440, 0, 800, 803, 809, 823, 0,
270 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
271 /* 0x1c - 1280x800@60Hz */
272 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
273 1480, 1680, 0, 800, 803, 809, 831, 0,
274 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
275 /* 0x1d - 1280x800@75Hz */
276 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 106500, 1280, 1360,
277 1488, 1696, 0, 800, 803, 809, 838, 0,
278 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
279 /* 0x1e - 1280x800@85Hz */
280 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 122500, 1280, 1360,
281 1496, 1712, 0, 800, 803, 809, 843, 0,
282 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
283 /* 0x1f - 1280x800@120Hz RB */
284 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 146250, 1280, 1328,
285 1360, 1440, 0, 800, 803, 809, 847, 0,
286 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
287 /* 0x20 - 1280x960@60Hz */
288 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
289 1488, 1800, 0, 960, 961, 964, 1000, 0,
290 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
291 /* 0x21 - 1280x960@85Hz */
292 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1344,
293 1504, 1728, 0, 960, 961, 964, 1011, 0,
294 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
295 /* 0x22 - 1280x960@120Hz RB */
296 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 175500, 1280, 1328,
297 1360, 1440, 0, 960, 963, 967, 1017, 0,
298 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
299 /* 0x23 - 1280x1024@60Hz */
300 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
301 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
302 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
303 /* 0x24 - 1280x1024@75Hz */
304 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
305 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
306 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
307 /* 0x25 - 1280x1024@85Hz */
308 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 157500, 1280, 1344,
309 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
310 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
311 /* 0x26 - 1280x1024@120Hz RB */
312 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 187250, 1280, 1328,
313 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
314 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
315 /* 0x27 - 1360x768@60Hz */
316 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
317 1536, 1792, 0, 768, 771, 777, 795, 0,
318 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
319 /* 0x28 - 1360x768@120Hz RB */
320 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 148250, 1360, 1408,
321 1440, 1520, 0, 768, 771, 776, 813, 0,
322 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
323 /* 0x51 - 1366x768@60Hz */
324 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER
, 85500, 1366, 1436,
325 1579, 1792, 0, 768, 771, 774, 798, 0,
326 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
327 /* 0x56 - 1366x768@60Hz */
328 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER
, 72000, 1366, 1380,
329 1436, 1500, 0, 768, 769, 772, 800, 0,
330 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
331 /* 0x29 - 1400x1050@60Hz RB */
332 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 101000, 1400, 1448,
333 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
334 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
335 /* 0x2a - 1400x1050@60Hz */
336 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
337 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
338 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
339 /* 0x2b - 1400x1050@75Hz */
340 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 156000, 1400, 1504,
341 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
342 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
343 /* 0x2c - 1400x1050@85Hz */
344 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 179500, 1400, 1504,
345 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
346 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
347 /* 0x2d - 1400x1050@120Hz RB */
348 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 208000, 1400, 1448,
349 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
350 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
351 /* 0x2e - 1440x900@60Hz RB */
352 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 88750, 1440, 1488,
353 1520, 1600, 0, 900, 903, 909, 926, 0,
354 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
355 /* 0x2f - 1440x900@60Hz */
356 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
357 1672, 1904, 0, 900, 903, 909, 934, 0,
358 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
359 /* 0x30 - 1440x900@75Hz */
360 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 136750, 1440, 1536,
361 1688, 1936, 0, 900, 903, 909, 942, 0,
362 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
363 /* 0x31 - 1440x900@85Hz */
364 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 157000, 1440, 1544,
365 1696, 1952, 0, 900, 903, 909, 948, 0,
366 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
367 /* 0x32 - 1440x900@120Hz RB */
368 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 182750, 1440, 1488,
369 1520, 1600, 0, 900, 903, 909, 953, 0,
370 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
371 /* 0x53 - 1600x900@60Hz */
372 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER
, 108000, 1600, 1624,
373 1704, 1800, 0, 900, 901, 904, 1000, 0,
374 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
375 /* 0x33 - 1600x1200@60Hz */
376 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
377 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
378 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
379 /* 0x34 - 1600x1200@65Hz */
380 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 175500, 1600, 1664,
381 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
382 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
383 /* 0x35 - 1600x1200@70Hz */
384 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 189000, 1600, 1664,
385 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
386 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
387 /* 0x36 - 1600x1200@75Hz */
388 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 202500, 1600, 1664,
389 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
390 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
391 /* 0x37 - 1600x1200@85Hz */
392 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 229500, 1600, 1664,
393 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
394 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
395 /* 0x38 - 1600x1200@120Hz RB */
396 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 268250, 1600, 1648,
397 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
398 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
399 /* 0x39 - 1680x1050@60Hz RB */
400 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 119000, 1680, 1728,
401 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
402 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
403 /* 0x3a - 1680x1050@60Hz */
404 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
405 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
406 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
407 /* 0x3b - 1680x1050@75Hz */
408 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 187000, 1680, 1800,
409 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
410 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
411 /* 0x3c - 1680x1050@85Hz */
412 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 214750, 1680, 1808,
413 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
414 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
415 /* 0x3d - 1680x1050@120Hz RB */
416 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 245500, 1680, 1728,
417 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
418 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
419 /* 0x3e - 1792x1344@60Hz */
420 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
421 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
422 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
423 /* 0x3f - 1792x1344@75Hz */
424 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 261000, 1792, 1888,
425 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
426 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
427 /* 0x40 - 1792x1344@120Hz RB */
428 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 333250, 1792, 1840,
429 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
430 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
431 /* 0x41 - 1856x1392@60Hz */
432 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
433 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
434 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
435 /* 0x42 - 1856x1392@75Hz */
436 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 288000, 1856, 1984,
437 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
438 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
439 /* 0x43 - 1856x1392@120Hz RB */
440 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 356500, 1856, 1904,
441 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
442 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
443 /* 0x52 - 1920x1080@60Hz */
444 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
445 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
446 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
447 /* 0x44 - 1920x1200@60Hz RB */
448 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 154000, 1920, 1968,
449 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
450 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
451 /* 0x45 - 1920x1200@60Hz */
452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
453 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
454 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
455 /* 0x46 - 1920x1200@75Hz */
456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 245250, 1920, 2056,
457 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
458 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
459 /* 0x47 - 1920x1200@85Hz */
460 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 281250, 1920, 2064,
461 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
462 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
463 /* 0x48 - 1920x1200@120Hz RB */
464 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 317000, 1920, 1968,
465 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
466 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
467 /* 0x49 - 1920x1440@60Hz */
468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
469 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
470 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
471 /* 0x4a - 1920x1440@75Hz */
472 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2064,
473 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
474 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
475 /* 0x4b - 1920x1440@120Hz RB */
476 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 380500, 1920, 1968,
477 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
478 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
479 /* 0x54 - 2048x1152@60Hz */
480 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER
, 162000, 2048, 2074,
481 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
482 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
483 /* 0x4c - 2560x1600@60Hz RB */
484 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 268500, 2560, 2608,
485 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
486 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
487 /* 0x4d - 2560x1600@60Hz */
488 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
489 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
490 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
491 /* 0x4e - 2560x1600@75Hz */
492 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 443250, 2560, 2768,
493 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
494 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
495 /* 0x4f - 2560x1600@85Hz */
496 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 505250, 2560, 2768,
497 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
498 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
499 /* 0x50 - 2560x1600@120Hz RB */
500 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 552750, 2560, 2608,
501 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
502 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
503 /* 0x57 - 4096x2160@60Hz RB */
504 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 556744, 4096, 4104,
505 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
506 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
507 /* 0x58 - 4096x2160@59.94Hz RB */
508 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 556188, 4096, 4104,
509 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
510 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
514 * These more or less come from the DMT spec. The 720x400 modes are
515 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
516 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
517 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
520 * The DMT modes have been fact-checked; the rest are mild guesses.
522 static const struct drm_display_mode edid_est_modes
[] = {
523 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
524 968, 1056, 0, 600, 601, 605, 628, 0,
525 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@60Hz */
526 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
527 896, 1024, 0, 600, 601, 603, 625, 0,
528 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@56Hz */
529 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
530 720, 840, 0, 480, 481, 484, 500, 0,
531 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@75Hz */
532 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
533 704, 832, 0, 480, 489, 492, 520, 0,
534 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@72Hz */
535 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 30240, 640, 704,
536 768, 864, 0, 480, 483, 486, 525, 0,
537 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@67Hz */
538 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
539 752, 800, 0, 480, 490, 492, 525, 0,
540 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@60Hz */
541 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 738,
542 846, 900, 0, 400, 421, 423, 449, 0,
543 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 720x400@88Hz */
544 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 28320, 720, 738,
545 846, 900, 0, 400, 412, 414, 449, 0,
546 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 720x400@70Hz */
547 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
548 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
549 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1280x1024@75Hz */
550 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
551 1136, 1312, 0, 768, 769, 772, 800, 0,
552 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1024x768@75Hz */
553 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
554 1184, 1328, 0, 768, 771, 777, 806, 0,
555 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@70Hz */
556 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
557 1184, 1344, 0, 768, 771, 777, 806, 0,
558 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@60Hz */
559 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
,44900, 1024, 1032,
560 1208, 1264, 0, 768, 768, 776, 817, 0,
561 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
| DRM_MODE_FLAG_INTERLACE
) }, /* 1024x768@43Hz */
562 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 57284, 832, 864,
563 928, 1152, 0, 624, 625, 628, 667, 0,
564 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 832x624@75Hz */
565 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
566 896, 1056, 0, 600, 601, 604, 625, 0,
567 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@75Hz */
568 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
569 976, 1040, 0, 600, 637, 643, 666, 0,
570 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@72Hz */
571 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
572 1344, 1600, 0, 864, 865, 868, 900, 0,
573 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1152x864@75Hz */
583 static const struct minimode est3_modes
[] = {
591 { 1024, 768, 85, 0 },
592 { 1152, 864, 75, 0 },
594 { 1280, 768, 60, 1 },
595 { 1280, 768, 60, 0 },
596 { 1280, 768, 75, 0 },
597 { 1280, 768, 85, 0 },
598 { 1280, 960, 60, 0 },
599 { 1280, 960, 85, 0 },
600 { 1280, 1024, 60, 0 },
601 { 1280, 1024, 85, 0 },
603 { 1360, 768, 60, 0 },
604 { 1440, 900, 60, 1 },
605 { 1440, 900, 60, 0 },
606 { 1440, 900, 75, 0 },
607 { 1440, 900, 85, 0 },
608 { 1400, 1050, 60, 1 },
609 { 1400, 1050, 60, 0 },
610 { 1400, 1050, 75, 0 },
612 { 1400, 1050, 85, 0 },
613 { 1680, 1050, 60, 1 },
614 { 1680, 1050, 60, 0 },
615 { 1680, 1050, 75, 0 },
616 { 1680, 1050, 85, 0 },
617 { 1600, 1200, 60, 0 },
618 { 1600, 1200, 65, 0 },
619 { 1600, 1200, 70, 0 },
621 { 1600, 1200, 75, 0 },
622 { 1600, 1200, 85, 0 },
623 { 1792, 1344, 60, 0 },
624 { 1792, 1344, 75, 0 },
625 { 1856, 1392, 60, 0 },
626 { 1856, 1392, 75, 0 },
627 { 1920, 1200, 60, 1 },
628 { 1920, 1200, 60, 0 },
630 { 1920, 1200, 75, 0 },
631 { 1920, 1200, 85, 0 },
632 { 1920, 1440, 60, 0 },
633 { 1920, 1440, 75, 0 },
636 static const struct minimode extra_modes
[] = {
637 { 1024, 576, 60, 0 },
638 { 1366, 768, 60, 0 },
639 { 1600, 900, 60, 0 },
640 { 1680, 945, 60, 0 },
641 { 1920, 1080, 60, 0 },
642 { 2048, 1152, 60, 0 },
643 { 2048, 1536, 60, 0 },
647 * Probably taken from CEA-861 spec.
648 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
650 * Index using the VIC.
652 static const struct drm_display_mode edid_cea_modes
[] = {
653 /* 0 - dummy, VICs start at 1 */
655 /* 1 - 640x480@60Hz */
656 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
657 752, 800, 0, 480, 490, 492, 525, 0,
658 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
659 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
660 /* 2 - 720x480@60Hz */
661 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
662 798, 858, 0, 480, 489, 495, 525, 0,
663 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
664 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
665 /* 3 - 720x480@60Hz */
666 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
667 798, 858, 0, 480, 489, 495, 525, 0,
668 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
669 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
670 /* 4 - 1280x720@60Hz */
671 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1390,
672 1430, 1650, 0, 720, 725, 730, 750, 0,
673 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
674 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
675 /* 5 - 1920x1080i@60Hz */
676 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
677 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
678 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
679 DRM_MODE_FLAG_INTERLACE
),
680 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
681 /* 6 - 720(1440)x480i@60Hz */
682 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
683 801, 858, 0, 480, 488, 494, 525, 0,
684 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
685 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
686 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
687 /* 7 - 720(1440)x480i@60Hz */
688 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
689 801, 858, 0, 480, 488, 494, 525, 0,
690 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
691 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
692 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
693 /* 8 - 720(1440)x240@60Hz */
694 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
695 801, 858, 0, 240, 244, 247, 262, 0,
696 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
697 DRM_MODE_FLAG_DBLCLK
),
698 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
699 /* 9 - 720(1440)x240@60Hz */
700 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
701 801, 858, 0, 240, 244, 247, 262, 0,
702 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
703 DRM_MODE_FLAG_DBLCLK
),
704 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
705 /* 10 - 2880x480i@60Hz */
706 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
707 3204, 3432, 0, 480, 488, 494, 525, 0,
708 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
709 DRM_MODE_FLAG_INTERLACE
),
710 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
711 /* 11 - 2880x480i@60Hz */
712 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
713 3204, 3432, 0, 480, 488, 494, 525, 0,
714 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
715 DRM_MODE_FLAG_INTERLACE
),
716 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
717 /* 12 - 2880x240@60Hz */
718 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
719 3204, 3432, 0, 240, 244, 247, 262, 0,
720 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
721 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
722 /* 13 - 2880x240@60Hz */
723 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
724 3204, 3432, 0, 240, 244, 247, 262, 0,
725 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
726 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
727 /* 14 - 1440x480@60Hz */
728 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
729 1596, 1716, 0, 480, 489, 495, 525, 0,
730 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
731 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
732 /* 15 - 1440x480@60Hz */
733 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
734 1596, 1716, 0, 480, 489, 495, 525, 0,
735 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
736 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
737 /* 16 - 1920x1080@60Hz */
738 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
739 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
740 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
741 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
742 /* 17 - 720x576@50Hz */
743 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
744 796, 864, 0, 576, 581, 586, 625, 0,
745 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
746 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
747 /* 18 - 720x576@50Hz */
748 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
749 796, 864, 0, 576, 581, 586, 625, 0,
750 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
751 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
752 /* 19 - 1280x720@50Hz */
753 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1720,
754 1760, 1980, 0, 720, 725, 730, 750, 0,
755 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
756 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
757 /* 20 - 1920x1080i@50Hz */
758 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
759 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
760 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
761 DRM_MODE_FLAG_INTERLACE
),
762 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
763 /* 21 - 720(1440)x576i@50Hz */
764 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
765 795, 864, 0, 576, 580, 586, 625, 0,
766 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
767 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
768 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
769 /* 22 - 720(1440)x576i@50Hz */
770 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
771 795, 864, 0, 576, 580, 586, 625, 0,
772 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
773 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
774 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
775 /* 23 - 720(1440)x288@50Hz */
776 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
777 795, 864, 0, 288, 290, 293, 312, 0,
778 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
779 DRM_MODE_FLAG_DBLCLK
),
780 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
781 /* 24 - 720(1440)x288@50Hz */
782 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
783 795, 864, 0, 288, 290, 293, 312, 0,
784 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
785 DRM_MODE_FLAG_DBLCLK
),
786 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
787 /* 25 - 2880x576i@50Hz */
788 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
789 3180, 3456, 0, 576, 580, 586, 625, 0,
790 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
791 DRM_MODE_FLAG_INTERLACE
),
792 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
793 /* 26 - 2880x576i@50Hz */
794 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
795 3180, 3456, 0, 576, 580, 586, 625, 0,
796 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
797 DRM_MODE_FLAG_INTERLACE
),
798 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
799 /* 27 - 2880x288@50Hz */
800 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
801 3180, 3456, 0, 288, 290, 293, 312, 0,
802 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
803 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
804 /* 28 - 2880x288@50Hz */
805 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
806 3180, 3456, 0, 288, 290, 293, 312, 0,
807 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
808 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
809 /* 29 - 1440x576@50Hz */
810 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
811 1592, 1728, 0, 576, 581, 586, 625, 0,
812 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
813 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
814 /* 30 - 1440x576@50Hz */
815 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
816 1592, 1728, 0, 576, 581, 586, 625, 0,
817 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
818 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
819 /* 31 - 1920x1080@50Hz */
820 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
821 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
822 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
823 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
824 /* 32 - 1920x1080@24Hz */
825 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2558,
826 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
827 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
828 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
829 /* 33 - 1920x1080@25Hz */
830 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
831 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
832 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
833 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
834 /* 34 - 1920x1080@30Hz */
835 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
836 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
837 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
838 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
839 /* 35 - 2880x480@60Hz */
840 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
841 3192, 3432, 0, 480, 489, 495, 525, 0,
842 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
843 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
844 /* 36 - 2880x480@60Hz */
845 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
846 3192, 3432, 0, 480, 489, 495, 525, 0,
847 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
848 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
849 /* 37 - 2880x576@50Hz */
850 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
851 3184, 3456, 0, 576, 581, 586, 625, 0,
852 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
853 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
854 /* 38 - 2880x576@50Hz */
855 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
856 3184, 3456, 0, 576, 581, 586, 625, 0,
857 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
858 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
859 /* 39 - 1920x1080i@50Hz */
860 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 72000, 1920, 1952,
861 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
862 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
|
863 DRM_MODE_FLAG_INTERLACE
),
864 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
865 /* 40 - 1920x1080i@100Hz */
866 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
867 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
868 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
869 DRM_MODE_FLAG_INTERLACE
),
870 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
871 /* 41 - 1280x720@100Hz */
872 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1720,
873 1760, 1980, 0, 720, 725, 730, 750, 0,
874 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
875 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
876 /* 42 - 720x576@100Hz */
877 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
878 796, 864, 0, 576, 581, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
880 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
881 /* 43 - 720x576@100Hz */
882 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
883 796, 864, 0, 576, 581, 586, 625, 0,
884 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
885 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
886 /* 44 - 720(1440)x576i@100Hz */
887 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
888 795, 864, 0, 576, 580, 586, 625, 0,
889 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
890 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
891 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
892 /* 45 - 720(1440)x576i@100Hz */
893 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
894 795, 864, 0, 576, 580, 586, 625, 0,
895 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
896 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
897 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
898 /* 46 - 1920x1080i@120Hz */
899 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
900 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
901 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
902 DRM_MODE_FLAG_INTERLACE
),
903 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
904 /* 47 - 1280x720@120Hz */
905 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1390,
906 1430, 1650, 0, 720, 725, 730, 750, 0,
907 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
908 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
909 /* 48 - 720x480@120Hz */
910 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
911 798, 858, 0, 480, 489, 495, 525, 0,
912 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
913 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
914 /* 49 - 720x480@120Hz */
915 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
916 798, 858, 0, 480, 489, 495, 525, 0,
917 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
918 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
919 /* 50 - 720(1440)x480i@120Hz */
920 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 739,
921 801, 858, 0, 480, 488, 494, 525, 0,
922 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
923 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
924 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
925 /* 51 - 720(1440)x480i@120Hz */
926 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 739,
927 801, 858, 0, 480, 488, 494, 525, 0,
928 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
929 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
930 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
931 /* 52 - 720x576@200Hz */
932 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
933 796, 864, 0, 576, 581, 586, 625, 0,
934 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
935 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
936 /* 53 - 720x576@200Hz */
937 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
938 796, 864, 0, 576, 581, 586, 625, 0,
939 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
940 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
941 /* 54 - 720(1440)x576i@200Hz */
942 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
943 795, 864, 0, 576, 580, 586, 625, 0,
944 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
945 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
946 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
947 /* 55 - 720(1440)x576i@200Hz */
948 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
949 795, 864, 0, 576, 580, 586, 625, 0,
950 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
951 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
952 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
953 /* 56 - 720x480@240Hz */
954 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
955 798, 858, 0, 480, 489, 495, 525, 0,
956 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
957 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
958 /* 57 - 720x480@240Hz */
959 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
960 798, 858, 0, 480, 489, 495, 525, 0,
961 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
962 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
963 /* 58 - 720(1440)x480i@240Hz */
964 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 739,
965 801, 858, 0, 480, 488, 494, 525, 0,
966 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
967 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
968 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
969 /* 59 - 720(1440)x480i@240Hz */
970 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 739,
971 801, 858, 0, 480, 488, 494, 525, 0,
972 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
973 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
974 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
975 /* 60 - 1280x720@24Hz */
976 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 59400, 1280, 3040,
977 3080, 3300, 0, 720, 725, 730, 750, 0,
978 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
979 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
980 /* 61 - 1280x720@25Hz */
981 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3700,
982 3740, 3960, 0, 720, 725, 730, 750, 0,
983 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
984 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
985 /* 62 - 1280x720@30Hz */
986 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3040,
987 3080, 3300, 0, 720, 725, 730, 750, 0,
988 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
989 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
990 /* 63 - 1920x1080@120Hz */
991 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2008,
992 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
993 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
994 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
995 /* 64 - 1920x1080@100Hz */
996 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2448,
997 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
998 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
999 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
1003 * HDMI 1.4 4k modes. Index using the VIC.
1005 static const struct drm_display_mode edid_4k_modes
[] = {
1006 /* 0 - dummy, VICs start at 1 */
1008 /* 1 - 3840x2160@30Hz */
1009 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1010 3840, 4016, 4104, 4400, 0,
1011 2160, 2168, 2178, 2250, 0,
1012 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1014 /* 2 - 3840x2160@25Hz */
1015 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1016 3840, 4896, 4984, 5280, 0,
1017 2160, 2168, 2178, 2250, 0,
1018 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1020 /* 3 - 3840x2160@24Hz */
1021 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1022 3840, 5116, 5204, 5500, 0,
1023 2160, 2168, 2178, 2250, 0,
1024 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1026 /* 4 - 4096x2160@24Hz (SMPTE) */
1027 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1028 4096, 5116, 5204, 5500, 0,
1029 2160, 2168, 2178, 2250, 0,
1030 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1034 /*** DDC fetch and block validation ***/
1036 static const u8 edid_header
[] = {
1037 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1041 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1042 * @raw_edid: pointer to raw base EDID block
1044 * Sanity check the header of the base EDID block.
1046 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1048 int drm_edid_header_is_valid(const u8
*raw_edid
)
1052 for (i
= 0; i
< sizeof(edid_header
); i
++)
1053 if (raw_edid
[i
] == edid_header
[i
])
1058 EXPORT_SYMBOL(drm_edid_header_is_valid
);
1060 static int edid_fixup __read_mostly
= 6;
1061 module_param_named(edid_fixup
, edid_fixup
, int, 0400);
1062 MODULE_PARM_DESC(edid_fixup
,
1063 "Minimum number of valid EDID header bytes (0-8, default 6)");
1065 static void drm_get_displayid(struct drm_connector
*connector
,
1068 static int drm_edid_block_checksum(const u8
*raw_edid
)
1072 for (i
= 0; i
< EDID_LENGTH
; i
++)
1073 csum
+= raw_edid
[i
];
1078 static bool drm_edid_is_zero(const u8
*in_edid
, int length
)
1080 if (memchr_inv(in_edid
, 0, length
))
1087 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1088 * @raw_edid: pointer to raw EDID block
1089 * @block: type of block to validate (0 for base, extension otherwise)
1090 * @print_bad_edid: if true, dump bad EDID blocks to the console
1091 * @edid_corrupt: if true, the header or checksum is invalid
1093 * Validate a base or extension EDID block and optionally dump bad blocks to
1096 * Return: True if the block is valid, false otherwise.
1098 bool drm_edid_block_valid(u8
*raw_edid
, int block
, bool print_bad_edid
,
1102 struct edid
*edid
= (struct edid
*)raw_edid
;
1104 if (WARN_ON(!raw_edid
))
1107 if (edid_fixup
> 8 || edid_fixup
< 0)
1111 int score
= drm_edid_header_is_valid(raw_edid
);
1114 *edid_corrupt
= false;
1115 } else if (score
>= edid_fixup
) {
1116 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1117 * The corrupt flag needs to be set here otherwise, the
1118 * fix-up code here will correct the problem, the
1119 * checksum is correct and the test fails
1122 *edid_corrupt
= true;
1123 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1124 memcpy(raw_edid
, edid_header
, sizeof(edid_header
));
1127 *edid_corrupt
= true;
1132 csum
= drm_edid_block_checksum(raw_edid
);
1134 if (print_bad_edid
) {
1135 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum
);
1139 *edid_corrupt
= true;
1141 /* allow CEA to slide through, switches mangle this */
1142 if (raw_edid
[0] != 0x02)
1146 /* per-block-type checks */
1147 switch (raw_edid
[0]) {
1149 if (edid
->version
!= 1) {
1150 DRM_ERROR("EDID has major version %d, instead of 1\n", edid
->version
);
1154 if (edid
->revision
> 4)
1155 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1165 if (print_bad_edid
) {
1166 if (drm_edid_is_zero(raw_edid
, EDID_LENGTH
)) {
1167 printk(KERN_ERR
"EDID block is all zeroes\n");
1169 printk(KERN_ERR
"Raw EDID:\n");
1170 print_hex_dump(KERN_ERR
, " \t", DUMP_PREFIX_NONE
, 16, 1,
1171 raw_edid
, EDID_LENGTH
, false);
1176 EXPORT_SYMBOL(drm_edid_block_valid
);
1179 * drm_edid_is_valid - sanity check EDID data
1182 * Sanity-check an entire EDID record (including extensions)
1184 * Return: True if the EDID data is valid, false otherwise.
1186 bool drm_edid_is_valid(struct edid
*edid
)
1189 u8
*raw
= (u8
*)edid
;
1194 for (i
= 0; i
<= edid
->extensions
; i
++)
1195 if (!drm_edid_block_valid(raw
+ i
* EDID_LENGTH
, i
, true, NULL
))
1200 EXPORT_SYMBOL(drm_edid_is_valid
);
1202 #define DDC_SEGMENT_ADDR 0x30
1204 * drm_do_probe_ddc_edid() - get EDID information via I2C
1205 * @data: I2C device adapter
1206 * @buf: EDID data buffer to be filled
1207 * @block: 128 byte EDID block to start fetching from
1208 * @len: EDID data buffer length to fetch
1210 * Try to fetch EDID information by calling I2C driver functions.
1212 * Return: 0 on success or -1 on failure.
1215 drm_do_probe_ddc_edid(void *data
, u8
*buf
, unsigned int block
, size_t len
)
1217 struct i2c_adapter
*adapter
= data
;
1218 unsigned char start
= block
* EDID_LENGTH
;
1219 unsigned char segment
= block
>> 1;
1220 unsigned char xfers
= segment
? 3 : 2;
1221 int ret
, retries
= 5;
1224 * The core I2C driver will automatically retry the transfer if the
1225 * adapter reports EAGAIN. However, we find that bit-banging transfers
1226 * are susceptible to errors under a heavily loaded machine and
1227 * generate spurious NAKs and timeouts. Retrying the transfer
1228 * of the individual block a few times seems to overcome this.
1231 struct i2c_msg msgs
[] = {
1233 .addr
= DDC_SEGMENT_ADDR
,
1251 * Avoid sending the segment addr to not upset non-compliant
1254 ret
= i2c_transfer(adapter
, &msgs
[3 - xfers
], xfers
);
1256 if (ret
== -ENXIO
) {
1257 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1261 } while (ret
!= xfers
&& --retries
);
1263 return ret
== xfers
? 0 : -1;
1266 static void connector_bad_edid(struct drm_connector
*connector
,
1267 u8
*edid
, int num_blocks
)
1271 if (connector
->bad_edid_counter
++ && !(drm_debug
& DRM_UT_KMS
))
1274 dev_warn(connector
->dev
->dev
,
1275 "%s: EDID is invalid:\n",
1277 for (i
= 0; i
< num_blocks
; i
++) {
1278 u8
*block
= edid
+ i
* EDID_LENGTH
;
1281 if (drm_edid_is_zero(block
, EDID_LENGTH
))
1282 sprintf(prefix
, "\t[%02x] ZERO ", i
);
1283 else if (!drm_edid_block_valid(block
, i
, false, NULL
))
1284 sprintf(prefix
, "\t[%02x] BAD ", i
);
1286 sprintf(prefix
, "\t[%02x] GOOD ", i
);
1288 print_hex_dump(KERN_WARNING
,
1289 prefix
, DUMP_PREFIX_NONE
, 16, 1,
1290 block
, EDID_LENGTH
, false);
1295 * drm_do_get_edid - get EDID data using a custom EDID block read function
1296 * @connector: connector we're probing
1297 * @get_edid_block: EDID block read function
1298 * @data: private data passed to the block read function
1300 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1301 * exposes a different interface to read EDID blocks this function can be used
1302 * to get EDID data using a custom block read function.
1304 * As in the general case the DDC bus is accessible by the kernel at the I2C
1305 * level, drivers must make all reasonable efforts to expose it as an I2C
1306 * adapter and use drm_get_edid() instead of abusing this function.
1308 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1310 struct edid
*drm_do_get_edid(struct drm_connector
*connector
,
1311 int (*get_edid_block
)(void *data
, u8
*buf
, unsigned int block
,
1315 int i
, j
= 0, valid_extensions
= 0;
1318 if ((edid
= kmalloc(EDID_LENGTH
, GFP_KERNEL
)) == NULL
)
1321 /* base block fetch */
1322 for (i
= 0; i
< 4; i
++) {
1323 if (get_edid_block(data
, edid
, 0, EDID_LENGTH
))
1325 if (drm_edid_block_valid(edid
, 0, false,
1326 &connector
->edid_corrupt
))
1328 if (i
== 0 && drm_edid_is_zero(edid
, EDID_LENGTH
)) {
1329 connector
->null_edid_counter
++;
1336 /* if there's no extensions, we're done */
1337 valid_extensions
= edid
[0x7e];
1338 if (valid_extensions
== 0)
1339 return (struct edid
*)edid
;
1341 new = krealloc(edid
, (valid_extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1346 for (j
= 1; j
<= edid
[0x7e]; j
++) {
1347 u8
*block
= edid
+ j
* EDID_LENGTH
;
1349 for (i
= 0; i
< 4; i
++) {
1350 if (get_edid_block(data
, block
, j
, EDID_LENGTH
))
1352 if (drm_edid_block_valid(block
, j
, false, NULL
))
1360 if (valid_extensions
!= edid
[0x7e]) {
1363 connector_bad_edid(connector
, edid
, edid
[0x7e] + 1);
1365 edid
[EDID_LENGTH
-1] += edid
[0x7e] - valid_extensions
;
1366 edid
[0x7e] = valid_extensions
;
1368 new = kmalloc((valid_extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1373 for (i
= 0; i
<= edid
[0x7e]; i
++) {
1374 u8
*block
= edid
+ i
* EDID_LENGTH
;
1376 if (!drm_edid_block_valid(block
, i
, false, NULL
))
1379 memcpy(base
, block
, EDID_LENGTH
);
1380 base
+= EDID_LENGTH
;
1387 return (struct edid
*)edid
;
1390 connector_bad_edid(connector
, edid
, 1);
1395 EXPORT_SYMBOL_GPL(drm_do_get_edid
);
1398 * drm_probe_ddc() - probe DDC presence
1399 * @adapter: I2C adapter to probe
1401 * Return: True on success, false on failure.
1404 drm_probe_ddc(struct i2c_adapter
*adapter
)
1408 return (drm_do_probe_ddc_edid(adapter
, &out
, 0, 1) == 0);
1410 EXPORT_SYMBOL(drm_probe_ddc
);
1413 * drm_get_edid - get EDID data, if available
1414 * @connector: connector we're probing
1415 * @adapter: I2C adapter to use for DDC
1417 * Poke the given I2C channel to grab EDID data if possible. If found,
1418 * attach it to the connector.
1420 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1422 struct edid
*drm_get_edid(struct drm_connector
*connector
,
1423 struct i2c_adapter
*adapter
)
1427 if (!drm_probe_ddc(adapter
))
1430 edid
= drm_do_get_edid(connector
, drm_do_probe_ddc_edid
, adapter
);
1432 drm_get_displayid(connector
, edid
);
1435 EXPORT_SYMBOL(drm_get_edid
);
1438 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1439 * @connector: connector we're probing
1440 * @adapter: I2C adapter to use for DDC
1442 * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1443 * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1444 * switch DDC to the GPU which is retrieving EDID.
1446 * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1448 struct edid
*drm_get_edid_switcheroo(struct drm_connector
*connector
,
1449 struct i2c_adapter
*adapter
)
1451 struct pci_dev
*pdev
= connector
->dev
->pdev
;
1454 vga_switcheroo_lock_ddc(pdev
);
1455 edid
= drm_get_edid(connector
, adapter
);
1456 vga_switcheroo_unlock_ddc(pdev
);
1460 EXPORT_SYMBOL(drm_get_edid_switcheroo
);
1463 * drm_edid_duplicate - duplicate an EDID and the extensions
1464 * @edid: EDID to duplicate
1466 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1468 struct edid
*drm_edid_duplicate(const struct edid
*edid
)
1470 return kmemdup(edid
, (edid
->extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1472 EXPORT_SYMBOL(drm_edid_duplicate
);
1474 /*** EDID parsing ***/
1477 * edid_vendor - match a string against EDID's obfuscated vendor field
1478 * @edid: EDID to match
1479 * @vendor: vendor string
1481 * Returns true if @vendor is in @edid, false otherwise
1483 static bool edid_vendor(struct edid
*edid
, const char *vendor
)
1485 char edid_vendor
[3];
1487 edid_vendor
[0] = ((edid
->mfg_id
[0] & 0x7c) >> 2) + '@';
1488 edid_vendor
[1] = (((edid
->mfg_id
[0] & 0x3) << 3) |
1489 ((edid
->mfg_id
[1] & 0xe0) >> 5)) + '@';
1490 edid_vendor
[2] = (edid
->mfg_id
[1] & 0x1f) + '@';
1492 return !strncmp(edid_vendor
, vendor
, 3);
1496 * edid_get_quirks - return quirk flags for a given EDID
1497 * @edid: EDID to process
1499 * This tells subsequent routines what fixes they need to apply.
1501 static u32
edid_get_quirks(struct edid
*edid
)
1503 const struct edid_quirk
*quirk
;
1506 for (i
= 0; i
< ARRAY_SIZE(edid_quirk_list
); i
++) {
1507 quirk
= &edid_quirk_list
[i
];
1509 if (edid_vendor(edid
, quirk
->vendor
) &&
1510 (EDID_PRODUCT_ID(edid
) == quirk
->product_id
))
1511 return quirk
->quirks
;
1517 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1518 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1521 * edid_fixup_preferred - set preferred modes based on quirk list
1522 * @connector: has mode list to fix up
1523 * @quirks: quirks list
1525 * Walk the mode list for @connector, clearing the preferred status
1526 * on existing modes and setting it anew for the right mode ala @quirks.
1528 static void edid_fixup_preferred(struct drm_connector
*connector
,
1531 struct drm_display_mode
*t
, *cur_mode
, *preferred_mode
;
1532 int target_refresh
= 0;
1533 int cur_vrefresh
, preferred_vrefresh
;
1535 if (list_empty(&connector
->probed_modes
))
1538 if (quirks
& EDID_QUIRK_PREFER_LARGE_60
)
1539 target_refresh
= 60;
1540 if (quirks
& EDID_QUIRK_PREFER_LARGE_75
)
1541 target_refresh
= 75;
1543 preferred_mode
= list_first_entry(&connector
->probed_modes
,
1544 struct drm_display_mode
, head
);
1546 list_for_each_entry_safe(cur_mode
, t
, &connector
->probed_modes
, head
) {
1547 cur_mode
->type
&= ~DRM_MODE_TYPE_PREFERRED
;
1549 if (cur_mode
== preferred_mode
)
1552 /* Largest mode is preferred */
1553 if (MODE_SIZE(cur_mode
) > MODE_SIZE(preferred_mode
))
1554 preferred_mode
= cur_mode
;
1556 cur_vrefresh
= cur_mode
->vrefresh
?
1557 cur_mode
->vrefresh
: drm_mode_vrefresh(cur_mode
);
1558 preferred_vrefresh
= preferred_mode
->vrefresh
?
1559 preferred_mode
->vrefresh
: drm_mode_vrefresh(preferred_mode
);
1560 /* At a given size, try to get closest to target refresh */
1561 if ((MODE_SIZE(cur_mode
) == MODE_SIZE(preferred_mode
)) &&
1562 MODE_REFRESH_DIFF(cur_vrefresh
, target_refresh
) <
1563 MODE_REFRESH_DIFF(preferred_vrefresh
, target_refresh
)) {
1564 preferred_mode
= cur_mode
;
1568 preferred_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1572 mode_is_rb(const struct drm_display_mode
*mode
)
1574 return (mode
->htotal
- mode
->hdisplay
== 160) &&
1575 (mode
->hsync_end
- mode
->hdisplay
== 80) &&
1576 (mode
->hsync_end
- mode
->hsync_start
== 32) &&
1577 (mode
->vsync_start
- mode
->vdisplay
== 3);
1581 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1582 * @dev: Device to duplicate against
1583 * @hsize: Mode width
1584 * @vsize: Mode height
1585 * @fresh: Mode refresh rate
1586 * @rb: Mode reduced-blanking-ness
1588 * Walk the DMT mode list looking for a match for the given parameters.
1590 * Return: A newly allocated copy of the mode, or NULL if not found.
1592 struct drm_display_mode
*drm_mode_find_dmt(struct drm_device
*dev
,
1593 int hsize
, int vsize
, int fresh
,
1598 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
1599 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
1600 if (hsize
!= ptr
->hdisplay
)
1602 if (vsize
!= ptr
->vdisplay
)
1604 if (fresh
!= drm_mode_vrefresh(ptr
))
1606 if (rb
!= mode_is_rb(ptr
))
1609 return drm_mode_duplicate(dev
, ptr
);
1614 EXPORT_SYMBOL(drm_mode_find_dmt
);
1616 typedef void detailed_cb(struct detailed_timing
*timing
, void *closure
);
1619 cea_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1623 u8
*det_base
= ext
+ d
;
1626 for (i
= 0; i
< n
; i
++)
1627 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1631 vtb_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1633 unsigned int i
, n
= min((int)ext
[0x02], 6);
1634 u8
*det_base
= ext
+ 5;
1637 return; /* unknown version */
1639 for (i
= 0; i
< n
; i
++)
1640 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1644 drm_for_each_detailed_block(u8
*raw_edid
, detailed_cb
*cb
, void *closure
)
1647 struct edid
*edid
= (struct edid
*)raw_edid
;
1652 for (i
= 0; i
< EDID_DETAILED_TIMINGS
; i
++)
1653 cb(&(edid
->detailed_timings
[i
]), closure
);
1655 for (i
= 1; i
<= raw_edid
[0x7e]; i
++) {
1656 u8
*ext
= raw_edid
+ (i
* EDID_LENGTH
);
1659 cea_for_each_detailed_block(ext
, cb
, closure
);
1662 vtb_for_each_detailed_block(ext
, cb
, closure
);
1671 is_rb(struct detailed_timing
*t
, void *data
)
1674 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
)
1676 *(bool *)data
= true;
1679 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1681 drm_monitor_supports_rb(struct edid
*edid
)
1683 if (edid
->revision
>= 4) {
1685 drm_for_each_detailed_block((u8
*)edid
, is_rb
, &ret
);
1689 return ((edid
->input
& DRM_EDID_INPUT_DIGITAL
) != 0);
1693 find_gtf2(struct detailed_timing
*t
, void *data
)
1696 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
&& r
[10] == 0x02)
1700 /* Secondary GTF curve kicks in above some break frequency */
1702 drm_gtf2_hbreak(struct edid
*edid
)
1705 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1706 return r
? (r
[12] * 2) : 0;
1710 drm_gtf2_2c(struct edid
*edid
)
1713 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1714 return r
? r
[13] : 0;
1718 drm_gtf2_m(struct edid
*edid
)
1721 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1722 return r
? (r
[15] << 8) + r
[14] : 0;
1726 drm_gtf2_k(struct edid
*edid
)
1729 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1730 return r
? r
[16] : 0;
1734 drm_gtf2_2j(struct edid
*edid
)
1737 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1738 return r
? r
[17] : 0;
1742 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1743 * @edid: EDID block to scan
1745 static int standard_timing_level(struct edid
*edid
)
1747 if (edid
->revision
>= 2) {
1748 if (edid
->revision
>= 4 && (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
))
1750 if (drm_gtf2_hbreak(edid
))
1758 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1759 * monitors fill with ascii space (0x20) instead.
1762 bad_std_timing(u8 a
, u8 b
)
1764 return (a
== 0x00 && b
== 0x00) ||
1765 (a
== 0x01 && b
== 0x01) ||
1766 (a
== 0x20 && b
== 0x20);
1770 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1771 * @connector: connector of for the EDID block
1772 * @edid: EDID block to scan
1773 * @t: standard timing params
1775 * Take the standard timing params (in this case width, aspect, and refresh)
1776 * and convert them into a real mode using CVT/GTF/DMT.
1778 static struct drm_display_mode
*
1779 drm_mode_std(struct drm_connector
*connector
, struct edid
*edid
,
1780 struct std_timing
*t
)
1782 struct drm_device
*dev
= connector
->dev
;
1783 struct drm_display_mode
*m
, *mode
= NULL
;
1786 unsigned aspect_ratio
= (t
->vfreq_aspect
& EDID_TIMING_ASPECT_MASK
)
1787 >> EDID_TIMING_ASPECT_SHIFT
;
1788 unsigned vfreq
= (t
->vfreq_aspect
& EDID_TIMING_VFREQ_MASK
)
1789 >> EDID_TIMING_VFREQ_SHIFT
;
1790 int timing_level
= standard_timing_level(edid
);
1792 if (bad_std_timing(t
->hsize
, t
->vfreq_aspect
))
1795 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1796 hsize
= t
->hsize
* 8 + 248;
1797 /* vrefresh_rate = vfreq + 60 */
1798 vrefresh_rate
= vfreq
+ 60;
1799 /* the vdisplay is calculated based on the aspect ratio */
1800 if (aspect_ratio
== 0) {
1801 if (edid
->revision
< 3)
1804 vsize
= (hsize
* 10) / 16;
1805 } else if (aspect_ratio
== 1)
1806 vsize
= (hsize
* 3) / 4;
1807 else if (aspect_ratio
== 2)
1808 vsize
= (hsize
* 4) / 5;
1810 vsize
= (hsize
* 9) / 16;
1812 /* HDTV hack, part 1 */
1813 if (vrefresh_rate
== 60 &&
1814 ((hsize
== 1360 && vsize
== 765) ||
1815 (hsize
== 1368 && vsize
== 769))) {
1821 * If this connector already has a mode for this size and refresh
1822 * rate (because it came from detailed or CVT info), use that
1823 * instead. This way we don't have to guess at interlace or
1826 list_for_each_entry(m
, &connector
->probed_modes
, head
)
1827 if (m
->hdisplay
== hsize
&& m
->vdisplay
== vsize
&&
1828 drm_mode_vrefresh(m
) == vrefresh_rate
)
1831 /* HDTV hack, part 2 */
1832 if (hsize
== 1366 && vsize
== 768 && vrefresh_rate
== 60) {
1833 mode
= drm_cvt_mode(dev
, 1366, 768, vrefresh_rate
, 0, 0,
1835 mode
->hdisplay
= 1366;
1836 mode
->hsync_start
= mode
->hsync_start
- 1;
1837 mode
->hsync_end
= mode
->hsync_end
- 1;
1841 /* check whether it can be found in default mode table */
1842 if (drm_monitor_supports_rb(edid
)) {
1843 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
,
1848 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
, false);
1852 /* okay, generate it */
1853 switch (timing_level
) {
1857 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1861 * This is potentially wrong if there's ever a monitor with
1862 * more than one ranges section, each claiming a different
1863 * secondary GTF curve. Please don't do that.
1865 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1868 if (drm_mode_hsync(mode
) > drm_gtf2_hbreak(edid
)) {
1869 drm_mode_destroy(dev
, mode
);
1870 mode
= drm_gtf_mode_complex(dev
, hsize
, vsize
,
1871 vrefresh_rate
, 0, 0,
1879 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
1887 * EDID is delightfully ambiguous about how interlaced modes are to be
1888 * encoded. Our internal representation is of frame height, but some
1889 * HDTV detailed timings are encoded as field height.
1891 * The format list here is from CEA, in frame size. Technically we
1892 * should be checking refresh rate too. Whatever.
1895 drm_mode_do_interlace_quirk(struct drm_display_mode
*mode
,
1896 struct detailed_pixel_timing
*pt
)
1899 static const struct {
1901 } cea_interlaced
[] = {
1911 if (!(pt
->misc
& DRM_EDID_PT_INTERLACED
))
1914 for (i
= 0; i
< ARRAY_SIZE(cea_interlaced
); i
++) {
1915 if ((mode
->hdisplay
== cea_interlaced
[i
].w
) &&
1916 (mode
->vdisplay
== cea_interlaced
[i
].h
/ 2)) {
1917 mode
->vdisplay
*= 2;
1918 mode
->vsync_start
*= 2;
1919 mode
->vsync_end
*= 2;
1925 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
1929 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1930 * @dev: DRM device (needed to create new mode)
1932 * @timing: EDID detailed timing info
1933 * @quirks: quirks to apply
1935 * An EDID detailed timing block contains enough info for us to create and
1936 * return a new struct drm_display_mode.
1938 static struct drm_display_mode
*drm_mode_detailed(struct drm_device
*dev
,
1940 struct detailed_timing
*timing
,
1943 struct drm_display_mode
*mode
;
1944 struct detailed_pixel_timing
*pt
= &timing
->data
.pixel_data
;
1945 unsigned hactive
= (pt
->hactive_hblank_hi
& 0xf0) << 4 | pt
->hactive_lo
;
1946 unsigned vactive
= (pt
->vactive_vblank_hi
& 0xf0) << 4 | pt
->vactive_lo
;
1947 unsigned hblank
= (pt
->hactive_hblank_hi
& 0xf) << 8 | pt
->hblank_lo
;
1948 unsigned vblank
= (pt
->vactive_vblank_hi
& 0xf) << 8 | pt
->vblank_lo
;
1949 unsigned hsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt
->hsync_offset_lo
;
1950 unsigned hsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x30) << 4 | pt
->hsync_pulse_width_lo
;
1951 unsigned vsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc) << 2 | pt
->vsync_offset_pulse_width_lo
>> 4;
1952 unsigned vsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x3) << 4 | (pt
->vsync_offset_pulse_width_lo
& 0xf);
1954 /* ignore tiny modes */
1955 if (hactive
< 64 || vactive
< 64)
1958 if (pt
->misc
& DRM_EDID_PT_STEREO
) {
1959 DRM_DEBUG_KMS("stereo mode not supported\n");
1962 if (!(pt
->misc
& DRM_EDID_PT_SEPARATE_SYNC
)) {
1963 DRM_DEBUG_KMS("composite sync not supported\n");
1966 /* it is incorrect if hsync/vsync width is zero */
1967 if (!hsync_pulse_width
|| !vsync_pulse_width
) {
1968 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1969 "Wrong Hsync/Vsync pulse width\n");
1973 if (quirks
& EDID_QUIRK_FORCE_REDUCED_BLANKING
) {
1974 mode
= drm_cvt_mode(dev
, hactive
, vactive
, 60, true, false, false);
1981 mode
= drm_mode_create(dev
);
1985 if (quirks
& EDID_QUIRK_135_CLOCK_TOO_HIGH
)
1986 timing
->pixel_clock
= cpu_to_le16(1088);
1988 mode
->clock
= le16_to_cpu(timing
->pixel_clock
) * 10;
1990 mode
->hdisplay
= hactive
;
1991 mode
->hsync_start
= mode
->hdisplay
+ hsync_offset
;
1992 mode
->hsync_end
= mode
->hsync_start
+ hsync_pulse_width
;
1993 mode
->htotal
= mode
->hdisplay
+ hblank
;
1995 mode
->vdisplay
= vactive
;
1996 mode
->vsync_start
= mode
->vdisplay
+ vsync_offset
;
1997 mode
->vsync_end
= mode
->vsync_start
+ vsync_pulse_width
;
1998 mode
->vtotal
= mode
->vdisplay
+ vblank
;
2000 /* Some EDIDs have bogus h/vtotal values */
2001 if (mode
->hsync_end
> mode
->htotal
)
2002 mode
->htotal
= mode
->hsync_end
+ 1;
2003 if (mode
->vsync_end
> mode
->vtotal
)
2004 mode
->vtotal
= mode
->vsync_end
+ 1;
2006 drm_mode_do_interlace_quirk(mode
, pt
);
2008 if (quirks
& EDID_QUIRK_DETAILED_SYNC_PP
) {
2009 pt
->misc
|= DRM_EDID_PT_HSYNC_POSITIVE
| DRM_EDID_PT_VSYNC_POSITIVE
;
2012 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_HSYNC_POSITIVE
) ?
2013 DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
2014 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_VSYNC_POSITIVE
) ?
2015 DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
2018 mode
->width_mm
= pt
->width_mm_lo
| (pt
->width_height_mm_hi
& 0xf0) << 4;
2019 mode
->height_mm
= pt
->height_mm_lo
| (pt
->width_height_mm_hi
& 0xf) << 8;
2021 if (quirks
& EDID_QUIRK_DETAILED_IN_CM
) {
2022 mode
->width_mm
*= 10;
2023 mode
->height_mm
*= 10;
2026 if (quirks
& EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
) {
2027 mode
->width_mm
= edid
->width_cm
* 10;
2028 mode
->height_mm
= edid
->height_cm
* 10;
2031 mode
->type
= DRM_MODE_TYPE_DRIVER
;
2032 mode
->vrefresh
= drm_mode_vrefresh(mode
);
2033 drm_mode_set_name(mode
);
2039 mode_in_hsync_range(const struct drm_display_mode
*mode
,
2040 struct edid
*edid
, u8
*t
)
2042 int hsync
, hmin
, hmax
;
2045 if (edid
->revision
>= 4)
2046 hmin
+= ((t
[4] & 0x04) ? 255 : 0);
2048 if (edid
->revision
>= 4)
2049 hmax
+= ((t
[4] & 0x08) ? 255 : 0);
2050 hsync
= drm_mode_hsync(mode
);
2052 return (hsync
<= hmax
&& hsync
>= hmin
);
2056 mode_in_vsync_range(const struct drm_display_mode
*mode
,
2057 struct edid
*edid
, u8
*t
)
2059 int vsync
, vmin
, vmax
;
2062 if (edid
->revision
>= 4)
2063 vmin
+= ((t
[4] & 0x01) ? 255 : 0);
2065 if (edid
->revision
>= 4)
2066 vmax
+= ((t
[4] & 0x02) ? 255 : 0);
2067 vsync
= drm_mode_vrefresh(mode
);
2069 return (vsync
<= vmax
&& vsync
>= vmin
);
2073 range_pixel_clock(struct edid
*edid
, u8
*t
)
2076 if (t
[9] == 0 || t
[9] == 255)
2079 /* 1.4 with CVT support gives us real precision, yay */
2080 if (edid
->revision
>= 4 && t
[10] == 0x04)
2081 return (t
[9] * 10000) - ((t
[12] >> 2) * 250);
2083 /* 1.3 is pathetic, so fuzz up a bit */
2084 return t
[9] * 10000 + 5001;
2088 mode_in_range(const struct drm_display_mode
*mode
, struct edid
*edid
,
2089 struct detailed_timing
*timing
)
2092 u8
*t
= (u8
*)timing
;
2094 if (!mode_in_hsync_range(mode
, edid
, t
))
2097 if (!mode_in_vsync_range(mode
, edid
, t
))
2100 if ((max_clock
= range_pixel_clock(edid
, t
)))
2101 if (mode
->clock
> max_clock
)
2104 /* 1.4 max horizontal check */
2105 if (edid
->revision
>= 4 && t
[10] == 0x04)
2106 if (t
[13] && mode
->hdisplay
> 8 * (t
[13] + (256 * (t
[12]&0x3))))
2109 if (mode_is_rb(mode
) && !drm_monitor_supports_rb(edid
))
2115 static bool valid_inferred_mode(const struct drm_connector
*connector
,
2116 const struct drm_display_mode
*mode
)
2118 const struct drm_display_mode
*m
;
2121 list_for_each_entry(m
, &connector
->probed_modes
, head
) {
2122 if (mode
->hdisplay
== m
->hdisplay
&&
2123 mode
->vdisplay
== m
->vdisplay
&&
2124 drm_mode_vrefresh(mode
) == drm_mode_vrefresh(m
))
2125 return false; /* duplicated */
2126 if (mode
->hdisplay
<= m
->hdisplay
&&
2127 mode
->vdisplay
<= m
->vdisplay
)
2134 drm_dmt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2135 struct detailed_timing
*timing
)
2138 struct drm_display_mode
*newmode
;
2139 struct drm_device
*dev
= connector
->dev
;
2141 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
2142 if (mode_in_range(drm_dmt_modes
+ i
, edid
, timing
) &&
2143 valid_inferred_mode(connector
, drm_dmt_modes
+ i
)) {
2144 newmode
= drm_mode_duplicate(dev
, &drm_dmt_modes
[i
]);
2146 drm_mode_probed_add(connector
, newmode
);
2155 /* fix up 1366x768 mode from 1368x768;
2156 * GFT/CVT can't express 1366 width which isn't dividable by 8
2158 static void fixup_mode_1366x768(struct drm_display_mode
*mode
)
2160 if (mode
->hdisplay
== 1368 && mode
->vdisplay
== 768) {
2161 mode
->hdisplay
= 1366;
2162 mode
->hsync_start
--;
2164 drm_mode_set_name(mode
);
2169 drm_gtf_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2170 struct detailed_timing
*timing
)
2173 struct drm_display_mode
*newmode
;
2174 struct drm_device
*dev
= connector
->dev
;
2176 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2177 const struct minimode
*m
= &extra_modes
[i
];
2178 newmode
= drm_gtf_mode(dev
, m
->w
, m
->h
, m
->r
, 0, 0);
2182 fixup_mode_1366x768(newmode
);
2183 if (!mode_in_range(newmode
, edid
, timing
) ||
2184 !valid_inferred_mode(connector
, newmode
)) {
2185 drm_mode_destroy(dev
, newmode
);
2189 drm_mode_probed_add(connector
, newmode
);
2197 drm_cvt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2198 struct detailed_timing
*timing
)
2201 struct drm_display_mode
*newmode
;
2202 struct drm_device
*dev
= connector
->dev
;
2203 bool rb
= drm_monitor_supports_rb(edid
);
2205 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2206 const struct minimode
*m
= &extra_modes
[i
];
2207 newmode
= drm_cvt_mode(dev
, m
->w
, m
->h
, m
->r
, rb
, 0, 0);
2211 fixup_mode_1366x768(newmode
);
2212 if (!mode_in_range(newmode
, edid
, timing
) ||
2213 !valid_inferred_mode(connector
, newmode
)) {
2214 drm_mode_destroy(dev
, newmode
);
2218 drm_mode_probed_add(connector
, newmode
);
2226 do_inferred_modes(struct detailed_timing
*timing
, void *c
)
2228 struct detailed_mode_closure
*closure
= c
;
2229 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2230 struct detailed_data_monitor_range
*range
= &data
->data
.range
;
2232 if (data
->type
!= EDID_DETAIL_MONITOR_RANGE
)
2235 closure
->modes
+= drm_dmt_modes_for_range(closure
->connector
,
2239 if (!version_greater(closure
->edid
, 1, 1))
2240 return; /* GTF not defined yet */
2242 switch (range
->flags
) {
2243 case 0x02: /* secondary gtf, XXX could do more */
2244 case 0x00: /* default gtf */
2245 closure
->modes
+= drm_gtf_modes_for_range(closure
->connector
,
2249 case 0x04: /* cvt, only in 1.4+ */
2250 if (!version_greater(closure
->edid
, 1, 3))
2253 closure
->modes
+= drm_cvt_modes_for_range(closure
->connector
,
2257 case 0x01: /* just the ranges, no formula */
2264 add_inferred_modes(struct drm_connector
*connector
, struct edid
*edid
)
2266 struct detailed_mode_closure closure
= {
2267 .connector
= connector
,
2271 if (version_greater(edid
, 1, 0))
2272 drm_for_each_detailed_block((u8
*)edid
, do_inferred_modes
,
2275 return closure
.modes
;
2279 drm_est3_modes(struct drm_connector
*connector
, struct detailed_timing
*timing
)
2281 int i
, j
, m
, modes
= 0;
2282 struct drm_display_mode
*mode
;
2283 u8
*est
= ((u8
*)timing
) + 6;
2285 for (i
= 0; i
< 6; i
++) {
2286 for (j
= 7; j
>= 0; j
--) {
2287 m
= (i
* 8) + (7 - j
);
2288 if (m
>= ARRAY_SIZE(est3_modes
))
2290 if (est
[i
] & (1 << j
)) {
2291 mode
= drm_mode_find_dmt(connector
->dev
,
2297 drm_mode_probed_add(connector
, mode
);
2308 do_established_modes(struct detailed_timing
*timing
, void *c
)
2310 struct detailed_mode_closure
*closure
= c
;
2311 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2313 if (data
->type
== EDID_DETAIL_EST_TIMINGS
)
2314 closure
->modes
+= drm_est3_modes(closure
->connector
, timing
);
2318 * add_established_modes - get est. modes from EDID and add them
2319 * @connector: connector to add mode(s) to
2320 * @edid: EDID block to scan
2322 * Each EDID block contains a bitmap of the supported "established modes" list
2323 * (defined above). Tease them out and add them to the global modes list.
2326 add_established_modes(struct drm_connector
*connector
, struct edid
*edid
)
2328 struct drm_device
*dev
= connector
->dev
;
2329 unsigned long est_bits
= edid
->established_timings
.t1
|
2330 (edid
->established_timings
.t2
<< 8) |
2331 ((edid
->established_timings
.mfg_rsvd
& 0x80) << 9);
2333 struct detailed_mode_closure closure
= {
2334 .connector
= connector
,
2338 for (i
= 0; i
<= EDID_EST_TIMINGS
; i
++) {
2339 if (est_bits
& (1<<i
)) {
2340 struct drm_display_mode
*newmode
;
2341 newmode
= drm_mode_duplicate(dev
, &edid_est_modes
[i
]);
2343 drm_mode_probed_add(connector
, newmode
);
2349 if (version_greater(edid
, 1, 0))
2350 drm_for_each_detailed_block((u8
*)edid
,
2351 do_established_modes
, &closure
);
2353 return modes
+ closure
.modes
;
2357 do_standard_modes(struct detailed_timing
*timing
, void *c
)
2359 struct detailed_mode_closure
*closure
= c
;
2360 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2361 struct drm_connector
*connector
= closure
->connector
;
2362 struct edid
*edid
= closure
->edid
;
2364 if (data
->type
== EDID_DETAIL_STD_MODES
) {
2366 for (i
= 0; i
< 6; i
++) {
2367 struct std_timing
*std
;
2368 struct drm_display_mode
*newmode
;
2370 std
= &data
->data
.timings
[i
];
2371 newmode
= drm_mode_std(connector
, edid
, std
);
2373 drm_mode_probed_add(connector
, newmode
);
2381 * add_standard_modes - get std. modes from EDID and add them
2382 * @connector: connector to add mode(s) to
2383 * @edid: EDID block to scan
2385 * Standard modes can be calculated using the appropriate standard (DMT,
2386 * GTF or CVT. Grab them from @edid and add them to the list.
2389 add_standard_modes(struct drm_connector
*connector
, struct edid
*edid
)
2392 struct detailed_mode_closure closure
= {
2393 .connector
= connector
,
2397 for (i
= 0; i
< EDID_STD_TIMINGS
; i
++) {
2398 struct drm_display_mode
*newmode
;
2400 newmode
= drm_mode_std(connector
, edid
,
2401 &edid
->standard_timings
[i
]);
2403 drm_mode_probed_add(connector
, newmode
);
2408 if (version_greater(edid
, 1, 0))
2409 drm_for_each_detailed_block((u8
*)edid
, do_standard_modes
,
2412 /* XXX should also look for standard codes in VTB blocks */
2414 return modes
+ closure
.modes
;
2417 static int drm_cvt_modes(struct drm_connector
*connector
,
2418 struct detailed_timing
*timing
)
2420 int i
, j
, modes
= 0;
2421 struct drm_display_mode
*newmode
;
2422 struct drm_device
*dev
= connector
->dev
;
2423 struct cvt_timing
*cvt
;
2424 const int rates
[] = { 60, 85, 75, 60, 50 };
2425 const u8 empty
[3] = { 0, 0, 0 };
2427 for (i
= 0; i
< 4; i
++) {
2428 int uninitialized_var(width
), height
;
2429 cvt
= &(timing
->data
.other_data
.data
.cvt
[i
]);
2431 if (!memcmp(cvt
->code
, empty
, 3))
2434 height
= (cvt
->code
[0] + ((cvt
->code
[1] & 0xf0) << 4) + 1) * 2;
2435 switch (cvt
->code
[1] & 0x0c) {
2437 width
= height
* 4 / 3;
2440 width
= height
* 16 / 9;
2443 width
= height
* 16 / 10;
2446 width
= height
* 15 / 9;
2450 for (j
= 1; j
< 5; j
++) {
2451 if (cvt
->code
[2] & (1 << j
)) {
2452 newmode
= drm_cvt_mode(dev
, width
, height
,
2456 drm_mode_probed_add(connector
, newmode
);
2467 do_cvt_mode(struct detailed_timing
*timing
, void *c
)
2469 struct detailed_mode_closure
*closure
= c
;
2470 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2472 if (data
->type
== EDID_DETAIL_CVT_3BYTE
)
2473 closure
->modes
+= drm_cvt_modes(closure
->connector
, timing
);
2477 add_cvt_modes(struct drm_connector
*connector
, struct edid
*edid
)
2479 struct detailed_mode_closure closure
= {
2480 .connector
= connector
,
2484 if (version_greater(edid
, 1, 2))
2485 drm_for_each_detailed_block((u8
*)edid
, do_cvt_mode
, &closure
);
2487 /* XXX should also look for CVT codes in VTB blocks */
2489 return closure
.modes
;
2492 static void fixup_detailed_cea_mode_clock(struct drm_display_mode
*mode
);
2495 do_detailed_mode(struct detailed_timing
*timing
, void *c
)
2497 struct detailed_mode_closure
*closure
= c
;
2498 struct drm_display_mode
*newmode
;
2500 if (timing
->pixel_clock
) {
2501 newmode
= drm_mode_detailed(closure
->connector
->dev
,
2502 closure
->edid
, timing
,
2507 if (closure
->preferred
)
2508 newmode
->type
|= DRM_MODE_TYPE_PREFERRED
;
2511 * Detailed modes are limited to 10kHz pixel clock resolution,
2512 * so fix up anything that looks like CEA/HDMI mode, but the clock
2513 * is just slightly off.
2515 fixup_detailed_cea_mode_clock(newmode
);
2517 drm_mode_probed_add(closure
->connector
, newmode
);
2519 closure
->preferred
= 0;
2524 * add_detailed_modes - Add modes from detailed timings
2525 * @connector: attached connector
2526 * @edid: EDID block to scan
2527 * @quirks: quirks to apply
2530 add_detailed_modes(struct drm_connector
*connector
, struct edid
*edid
,
2533 struct detailed_mode_closure closure
= {
2534 .connector
= connector
,
2540 if (closure
.preferred
&& !version_greater(edid
, 1, 3))
2542 (edid
->features
& DRM_EDID_FEATURE_PREFERRED_TIMING
);
2544 drm_for_each_detailed_block((u8
*)edid
, do_detailed_mode
, &closure
);
2546 return closure
.modes
;
2549 #define AUDIO_BLOCK 0x01
2550 #define VIDEO_BLOCK 0x02
2551 #define VENDOR_BLOCK 0x03
2552 #define SPEAKER_BLOCK 0x04
2553 #define VIDEO_CAPABILITY_BLOCK 0x07
2554 #define EDID_BASIC_AUDIO (1 << 6)
2555 #define EDID_CEA_YCRCB444 (1 << 5)
2556 #define EDID_CEA_YCRCB422 (1 << 4)
2557 #define EDID_CEA_VCDB_QS (1 << 6)
2560 * Search EDID for CEA extension block.
2562 static u8
*drm_find_edid_extension(struct edid
*edid
, int ext_id
)
2564 u8
*edid_ext
= NULL
;
2567 /* No EDID or EDID extensions */
2568 if (edid
== NULL
|| edid
->extensions
== 0)
2571 /* Find CEA extension */
2572 for (i
= 0; i
< edid
->extensions
; i
++) {
2573 edid_ext
= (u8
*)edid
+ EDID_LENGTH
* (i
+ 1);
2574 if (edid_ext
[0] == ext_id
)
2578 if (i
== edid
->extensions
)
2584 static u8
*drm_find_cea_extension(struct edid
*edid
)
2586 return drm_find_edid_extension(edid
, CEA_EXT
);
2589 static u8
*drm_find_displayid_extension(struct edid
*edid
)
2591 return drm_find_edid_extension(edid
, DISPLAYID_EXT
);
2595 * Calculate the alternate clock for the CEA mode
2596 * (60Hz vs. 59.94Hz etc.)
2599 cea_mode_alternate_clock(const struct drm_display_mode
*cea_mode
)
2601 unsigned int clock
= cea_mode
->clock
;
2603 if (cea_mode
->vrefresh
% 6 != 0)
2607 * edid_cea_modes contains the 59.94Hz
2608 * variant for 240 and 480 line modes,
2609 * and the 60Hz variant otherwise.
2611 if (cea_mode
->vdisplay
== 240 || cea_mode
->vdisplay
== 480)
2612 clock
= DIV_ROUND_CLOSEST(clock
* 1001, 1000);
2614 clock
= DIV_ROUND_CLOSEST(clock
* 1000, 1001);
2620 cea_mode_alternate_timings(u8 vic
, struct drm_display_mode
*mode
)
2623 * For certain VICs the spec allows the vertical
2624 * front porch to vary by one or two lines.
2626 * cea_modes[] stores the variant with the shortest
2627 * vertical front porch. We can adjust the mode to
2628 * get the other variants by simply increasing the
2629 * vertical front porch length.
2631 BUILD_BUG_ON(edid_cea_modes
[8].vtotal
!= 262 ||
2632 edid_cea_modes
[9].vtotal
!= 262 ||
2633 edid_cea_modes
[12].vtotal
!= 262 ||
2634 edid_cea_modes
[13].vtotal
!= 262 ||
2635 edid_cea_modes
[23].vtotal
!= 312 ||
2636 edid_cea_modes
[24].vtotal
!= 312 ||
2637 edid_cea_modes
[27].vtotal
!= 312 ||
2638 edid_cea_modes
[28].vtotal
!= 312);
2640 if (((vic
== 8 || vic
== 9 ||
2641 vic
== 12 || vic
== 13) && mode
->vtotal
< 263) ||
2642 ((vic
== 23 || vic
== 24 ||
2643 vic
== 27 || vic
== 28) && mode
->vtotal
< 314)) {
2644 mode
->vsync_start
++;
2654 static u8
drm_match_cea_mode_clock_tolerance(const struct drm_display_mode
*to_match
,
2655 unsigned int clock_tolerance
)
2659 if (!to_match
->clock
)
2662 for (vic
= 1; vic
< ARRAY_SIZE(edid_cea_modes
); vic
++) {
2663 struct drm_display_mode cea_mode
= edid_cea_modes
[vic
];
2664 unsigned int clock1
, clock2
;
2666 /* Check both 60Hz and 59.94Hz */
2667 clock1
= cea_mode
.clock
;
2668 clock2
= cea_mode_alternate_clock(&cea_mode
);
2670 if (abs(to_match
->clock
- clock1
) > clock_tolerance
&&
2671 abs(to_match
->clock
- clock2
) > clock_tolerance
)
2675 if (drm_mode_equal_no_clocks_no_stereo(to_match
, &cea_mode
))
2677 } while (cea_mode_alternate_timings(vic
, &cea_mode
));
2684 * drm_match_cea_mode - look for a CEA mode matching given mode
2685 * @to_match: display mode
2687 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2690 u8
drm_match_cea_mode(const struct drm_display_mode
*to_match
)
2694 if (!to_match
->clock
)
2697 for (vic
= 1; vic
< ARRAY_SIZE(edid_cea_modes
); vic
++) {
2698 struct drm_display_mode cea_mode
= edid_cea_modes
[vic
];
2699 unsigned int clock1
, clock2
;
2701 /* Check both 60Hz and 59.94Hz */
2702 clock1
= cea_mode
.clock
;
2703 clock2
= cea_mode_alternate_clock(&cea_mode
);
2705 if (KHZ2PICOS(to_match
->clock
) != KHZ2PICOS(clock1
) &&
2706 KHZ2PICOS(to_match
->clock
) != KHZ2PICOS(clock2
))
2710 if (drm_mode_equal_no_clocks_no_stereo(to_match
, &cea_mode
))
2712 } while (cea_mode_alternate_timings(vic
, &cea_mode
));
2717 EXPORT_SYMBOL(drm_match_cea_mode
);
2719 static bool drm_valid_cea_vic(u8 vic
)
2721 return vic
> 0 && vic
< ARRAY_SIZE(edid_cea_modes
);
2725 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2726 * the input VIC from the CEA mode list
2727 * @video_code: ID given to each of the CEA modes
2729 * Returns picture aspect ratio
2731 enum hdmi_picture_aspect
drm_get_cea_aspect_ratio(const u8 video_code
)
2733 return edid_cea_modes
[video_code
].picture_aspect_ratio
;
2735 EXPORT_SYMBOL(drm_get_cea_aspect_ratio
);
2738 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2741 * It's almost like cea_mode_alternate_clock(), we just need to add an
2742 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2746 hdmi_mode_alternate_clock(const struct drm_display_mode
*hdmi_mode
)
2748 if (hdmi_mode
->vdisplay
== 4096 && hdmi_mode
->hdisplay
== 2160)
2749 return hdmi_mode
->clock
;
2751 return cea_mode_alternate_clock(hdmi_mode
);
2754 static u8
drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode
*to_match
,
2755 unsigned int clock_tolerance
)
2759 if (!to_match
->clock
)
2762 for (vic
= 1; vic
< ARRAY_SIZE(edid_4k_modes
); vic
++) {
2763 const struct drm_display_mode
*hdmi_mode
= &edid_4k_modes
[vic
];
2764 unsigned int clock1
, clock2
;
2766 /* Make sure to also match alternate clocks */
2767 clock1
= hdmi_mode
->clock
;
2768 clock2
= hdmi_mode_alternate_clock(hdmi_mode
);
2770 if (abs(to_match
->clock
- clock1
) > clock_tolerance
&&
2771 abs(to_match
->clock
- clock2
) > clock_tolerance
)
2774 if (drm_mode_equal_no_clocks(to_match
, hdmi_mode
))
2782 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2783 * @to_match: display mode
2785 * An HDMI mode is one defined in the HDMI vendor specific block.
2787 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2789 static u8
drm_match_hdmi_mode(const struct drm_display_mode
*to_match
)
2793 if (!to_match
->clock
)
2796 for (vic
= 1; vic
< ARRAY_SIZE(edid_4k_modes
); vic
++) {
2797 const struct drm_display_mode
*hdmi_mode
= &edid_4k_modes
[vic
];
2798 unsigned int clock1
, clock2
;
2800 /* Make sure to also match alternate clocks */
2801 clock1
= hdmi_mode
->clock
;
2802 clock2
= hdmi_mode_alternate_clock(hdmi_mode
);
2804 if ((KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock1
) ||
2805 KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock2
)) &&
2806 drm_mode_equal_no_clocks_no_stereo(to_match
, hdmi_mode
))
2812 static bool drm_valid_hdmi_vic(u8 vic
)
2814 return vic
> 0 && vic
< ARRAY_SIZE(edid_4k_modes
);
2818 add_alternate_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
2820 struct drm_device
*dev
= connector
->dev
;
2821 struct drm_display_mode
*mode
, *tmp
;
2825 /* Don't add CEA modes if the CEA extension block is missing */
2826 if (!drm_find_cea_extension(edid
))
2830 * Go through all probed modes and create a new mode
2831 * with the alternate clock for certain CEA modes.
2833 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2834 const struct drm_display_mode
*cea_mode
= NULL
;
2835 struct drm_display_mode
*newmode
;
2836 u8 vic
= drm_match_cea_mode(mode
);
2837 unsigned int clock1
, clock2
;
2839 if (drm_valid_cea_vic(vic
)) {
2840 cea_mode
= &edid_cea_modes
[vic
];
2841 clock2
= cea_mode_alternate_clock(cea_mode
);
2843 vic
= drm_match_hdmi_mode(mode
);
2844 if (drm_valid_hdmi_vic(vic
)) {
2845 cea_mode
= &edid_4k_modes
[vic
];
2846 clock2
= hdmi_mode_alternate_clock(cea_mode
);
2853 clock1
= cea_mode
->clock
;
2855 if (clock1
== clock2
)
2858 if (mode
->clock
!= clock1
&& mode
->clock
!= clock2
)
2861 newmode
= drm_mode_duplicate(dev
, cea_mode
);
2865 /* Carry over the stereo flags */
2866 newmode
->flags
|= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
2869 * The current mode could be either variant. Make
2870 * sure to pick the "other" clock for the new mode.
2872 if (mode
->clock
!= clock1
)
2873 newmode
->clock
= clock1
;
2875 newmode
->clock
= clock2
;
2877 list_add_tail(&newmode
->head
, &list
);
2880 list_for_each_entry_safe(mode
, tmp
, &list
, head
) {
2881 list_del(&mode
->head
);
2882 drm_mode_probed_add(connector
, mode
);
2889 static struct drm_display_mode
*
2890 drm_display_mode_from_vic_index(struct drm_connector
*connector
,
2891 const u8
*video_db
, u8 video_len
,
2894 struct drm_device
*dev
= connector
->dev
;
2895 struct drm_display_mode
*newmode
;
2898 if (video_db
== NULL
|| video_index
>= video_len
)
2901 /* CEA modes are numbered 1..127 */
2902 vic
= (video_db
[video_index
] & 127);
2903 if (!drm_valid_cea_vic(vic
))
2906 newmode
= drm_mode_duplicate(dev
, &edid_cea_modes
[vic
]);
2910 newmode
->vrefresh
= 0;
2916 do_cea_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
)
2920 for (i
= 0; i
< len
; i
++) {
2921 struct drm_display_mode
*mode
;
2922 mode
= drm_display_mode_from_vic_index(connector
, db
, len
, i
);
2924 drm_mode_probed_add(connector
, mode
);
2932 struct stereo_mandatory_mode
{
2933 int width
, height
, vrefresh
;
2937 static const struct stereo_mandatory_mode stereo_mandatory_modes
[] = {
2938 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2939 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2941 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2943 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2944 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2945 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2946 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2947 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING
}
2951 stereo_match_mandatory(const struct drm_display_mode
*mode
,
2952 const struct stereo_mandatory_mode
*stereo_mode
)
2954 unsigned int interlaced
= mode
->flags
& DRM_MODE_FLAG_INTERLACE
;
2956 return mode
->hdisplay
== stereo_mode
->width
&&
2957 mode
->vdisplay
== stereo_mode
->height
&&
2958 interlaced
== (stereo_mode
->flags
& DRM_MODE_FLAG_INTERLACE
) &&
2959 drm_mode_vrefresh(mode
) == stereo_mode
->vrefresh
;
2962 static int add_hdmi_mandatory_stereo_modes(struct drm_connector
*connector
)
2964 struct drm_device
*dev
= connector
->dev
;
2965 const struct drm_display_mode
*mode
;
2966 struct list_head stereo_modes
;
2969 INIT_LIST_HEAD(&stereo_modes
);
2971 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2972 for (i
= 0; i
< ARRAY_SIZE(stereo_mandatory_modes
); i
++) {
2973 const struct stereo_mandatory_mode
*mandatory
;
2974 struct drm_display_mode
*new_mode
;
2976 if (!stereo_match_mandatory(mode
,
2977 &stereo_mandatory_modes
[i
]))
2980 mandatory
= &stereo_mandatory_modes
[i
];
2981 new_mode
= drm_mode_duplicate(dev
, mode
);
2985 new_mode
->flags
|= mandatory
->flags
;
2986 list_add_tail(&new_mode
->head
, &stereo_modes
);
2991 list_splice_tail(&stereo_modes
, &connector
->probed_modes
);
2996 static int add_hdmi_mode(struct drm_connector
*connector
, u8 vic
)
2998 struct drm_device
*dev
= connector
->dev
;
2999 struct drm_display_mode
*newmode
;
3001 if (!drm_valid_hdmi_vic(vic
)) {
3002 DRM_ERROR("Unknown HDMI VIC: %d\n", vic
);
3006 newmode
= drm_mode_duplicate(dev
, &edid_4k_modes
[vic
]);
3010 drm_mode_probed_add(connector
, newmode
);
3015 static int add_3d_struct_modes(struct drm_connector
*connector
, u16 structure
,
3016 const u8
*video_db
, u8 video_len
, u8 video_index
)
3018 struct drm_display_mode
*newmode
;
3021 if (structure
& (1 << 0)) {
3022 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
3026 newmode
->flags
|= DRM_MODE_FLAG_3D_FRAME_PACKING
;
3027 drm_mode_probed_add(connector
, newmode
);
3031 if (structure
& (1 << 6)) {
3032 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
3036 newmode
->flags
|= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
3037 drm_mode_probed_add(connector
, newmode
);
3041 if (structure
& (1 << 8)) {
3042 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
3046 newmode
->flags
|= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
3047 drm_mode_probed_add(connector
, newmode
);
3056 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
3057 * @connector: connector corresponding to the HDMI sink
3058 * @db: start of the CEA vendor specific block
3059 * @len: length of the CEA block payload, ie. one can access up to db[len]
3061 * Parses the HDMI VSDB looking for modes to add to @connector. This function
3062 * also adds the stereo 3d modes when applicable.
3065 do_hdmi_vsdb_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
,
3066 const u8
*video_db
, u8 video_len
)
3068 int modes
= 0, offset
= 0, i
, multi_present
= 0, multi_len
;
3069 u8 vic_len
, hdmi_3d_len
= 0;
3076 /* no HDMI_Video_Present */
3077 if (!(db
[8] & (1 << 5)))
3080 /* Latency_Fields_Present */
3081 if (db
[8] & (1 << 7))
3084 /* I_Latency_Fields_Present */
3085 if (db
[8] & (1 << 6))
3088 /* the declared length is not long enough for the 2 first bytes
3089 * of additional video format capabilities */
3090 if (len
< (8 + offset
+ 2))
3095 if (db
[8 + offset
] & (1 << 7)) {
3096 modes
+= add_hdmi_mandatory_stereo_modes(connector
);
3098 /* 3D_Multi_present */
3099 multi_present
= (db
[8 + offset
] & 0x60) >> 5;
3103 vic_len
= db
[8 + offset
] >> 5;
3104 hdmi_3d_len
= db
[8 + offset
] & 0x1f;
3106 for (i
= 0; i
< vic_len
&& len
>= (9 + offset
+ i
); i
++) {
3109 vic
= db
[9 + offset
+ i
];
3110 modes
+= add_hdmi_mode(connector
, vic
);
3112 offset
+= 1 + vic_len
;
3114 if (multi_present
== 1)
3116 else if (multi_present
== 2)
3121 if (len
< (8 + offset
+ hdmi_3d_len
- 1))
3124 if (hdmi_3d_len
< multi_len
)
3127 if (multi_present
== 1 || multi_present
== 2) {
3128 /* 3D_Structure_ALL */
3129 structure_all
= (db
[8 + offset
] << 8) | db
[9 + offset
];
3131 /* check if 3D_MASK is present */
3132 if (multi_present
== 2)
3133 mask
= (db
[10 + offset
] << 8) | db
[11 + offset
];
3137 for (i
= 0; i
< 16; i
++) {
3138 if (mask
& (1 << i
))
3139 modes
+= add_3d_struct_modes(connector
,
3146 offset
+= multi_len
;
3148 for (i
= 0; i
< (hdmi_3d_len
- multi_len
); i
++) {
3150 struct drm_display_mode
*newmode
= NULL
;
3151 unsigned int newflag
= 0;
3152 bool detail_present
;
3154 detail_present
= ((db
[8 + offset
+ i
] & 0x0f) > 7);
3156 if (detail_present
&& (i
+ 1 == hdmi_3d_len
- multi_len
))
3159 /* 2D_VIC_order_X */
3160 vic_index
= db
[8 + offset
+ i
] >> 4;
3162 /* 3D_Structure_X */
3163 switch (db
[8 + offset
+ i
] & 0x0f) {
3165 newflag
= DRM_MODE_FLAG_3D_FRAME_PACKING
;
3168 newflag
= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
3172 if ((db
[9 + offset
+ i
] >> 4) == 1)
3173 newflag
= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
3178 newmode
= drm_display_mode_from_vic_index(connector
,
3184 newmode
->flags
|= newflag
;
3185 drm_mode_probed_add(connector
, newmode
);
3199 cea_db_payload_len(const u8
*db
)
3201 return db
[0] & 0x1f;
3205 cea_db_tag(const u8
*db
)
3211 cea_revision(const u8
*cea
)
3217 cea_db_offsets(const u8
*cea
, int *start
, int *end
)
3219 /* Data block offset in CEA extension block */
3224 if (*end
< 4 || *end
> 127)
3229 static bool cea_db_is_hdmi_vsdb(const u8
*db
)
3233 if (cea_db_tag(db
) != VENDOR_BLOCK
)
3236 if (cea_db_payload_len(db
) < 5)
3239 hdmi_id
= db
[1] | (db
[2] << 8) | (db
[3] << 16);
3241 return hdmi_id
== HDMI_IEEE_OUI
;
3244 #define for_each_cea_db(cea, i, start, end) \
3245 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3248 add_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
3250 const u8
*cea
= drm_find_cea_extension(edid
);
3251 const u8
*db
, *hdmi
= NULL
, *video
= NULL
;
3252 u8 dbl
, hdmi_len
, video_len
= 0;
3255 if (cea
&& cea_revision(cea
) >= 3) {
3258 if (cea_db_offsets(cea
, &start
, &end
))
3261 for_each_cea_db(cea
, i
, start
, end
) {
3263 dbl
= cea_db_payload_len(db
);
3265 if (cea_db_tag(db
) == VIDEO_BLOCK
) {
3268 modes
+= do_cea_modes(connector
, video
, dbl
);
3270 else if (cea_db_is_hdmi_vsdb(db
)) {
3278 * We parse the HDMI VSDB after having added the cea modes as we will
3279 * be patching their flags when the sink supports stereo 3D.
3282 modes
+= do_hdmi_vsdb_modes(connector
, hdmi
, hdmi_len
, video
,
3288 static void fixup_detailed_cea_mode_clock(struct drm_display_mode
*mode
)
3290 const struct drm_display_mode
*cea_mode
;
3291 int clock1
, clock2
, clock
;
3296 * allow 5kHz clock difference either way to account for
3297 * the 10kHz clock resolution limit of detailed timings.
3299 vic
= drm_match_cea_mode_clock_tolerance(mode
, 5);
3300 if (drm_valid_cea_vic(vic
)) {
3302 cea_mode
= &edid_cea_modes
[vic
];
3303 clock1
= cea_mode
->clock
;
3304 clock2
= cea_mode_alternate_clock(cea_mode
);
3306 vic
= drm_match_hdmi_mode_clock_tolerance(mode
, 5);
3307 if (drm_valid_hdmi_vic(vic
)) {
3309 cea_mode
= &edid_4k_modes
[vic
];
3310 clock1
= cea_mode
->clock
;
3311 clock2
= hdmi_mode_alternate_clock(cea_mode
);
3317 /* pick whichever is closest */
3318 if (abs(mode
->clock
- clock1
) < abs(mode
->clock
- clock2
))
3323 if (mode
->clock
== clock
)
3326 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3327 type
, vic
, mode
->clock
, clock
);
3328 mode
->clock
= clock
;
3332 drm_parse_hdmi_vsdb_audio(struct drm_connector
*connector
, const u8
*db
)
3334 u8 len
= cea_db_payload_len(db
);
3337 connector
->eld
[5] |= (db
[6] >> 7) << 1; /* Supports_AI */
3339 connector
->latency_present
[0] = db
[8] >> 7;
3340 connector
->latency_present
[1] = (db
[8] >> 6) & 1;
3343 connector
->video_latency
[0] = db
[9];
3345 connector
->audio_latency
[0] = db
[10];
3347 connector
->video_latency
[1] = db
[11];
3349 connector
->audio_latency
[1] = db
[12];
3351 DRM_DEBUG_KMS("HDMI: latency present %d %d, "
3352 "video latency %d %d, "
3353 "audio latency %d %d\n",
3354 connector
->latency_present
[0],
3355 connector
->latency_present
[1],
3356 connector
->video_latency
[0],
3357 connector
->video_latency
[1],
3358 connector
->audio_latency
[0],
3359 connector
->audio_latency
[1]);
3363 monitor_name(struct detailed_timing
*t
, void *data
)
3365 if (t
->data
.other_data
.type
== EDID_DETAIL_MONITOR_NAME
)
3366 *(u8
**)data
= t
->data
.other_data
.data
.str
.str
;
3369 static int get_monitor_name(struct edid
*edid
, char name
[13])
3371 char *edid_name
= NULL
;
3377 drm_for_each_detailed_block((u8
*)edid
, monitor_name
, &edid_name
);
3378 for (mnl
= 0; edid_name
&& mnl
< 13; mnl
++) {
3379 if (edid_name
[mnl
] == 0x0a)
3382 name
[mnl
] = edid_name
[mnl
];
3389 * drm_edid_get_monitor_name - fetch the monitor name from the edid
3390 * @edid: monitor EDID information
3391 * @name: pointer to a character array to hold the name of the monitor
3392 * @bufsize: The size of the name buffer (should be at least 14 chars.)
3395 void drm_edid_get_monitor_name(struct edid
*edid
, char *name
, int bufsize
)
3403 name_length
= min(get_monitor_name(edid
, buf
), bufsize
- 1);
3404 memcpy(name
, buf
, name_length
);
3405 name
[name_length
] = '\0';
3407 EXPORT_SYMBOL(drm_edid_get_monitor_name
);
3410 * drm_edid_to_eld - build ELD from EDID
3411 * @connector: connector corresponding to the HDMI/DP sink
3412 * @edid: EDID to parse
3414 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3415 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3418 void drm_edid_to_eld(struct drm_connector
*connector
, struct edid
*edid
)
3420 uint8_t *eld
= connector
->eld
;
3423 int total_sad_count
= 0;
3427 memset(eld
, 0, sizeof(connector
->eld
));
3429 connector
->latency_present
[0] = false;
3430 connector
->latency_present
[1] = false;
3431 connector
->video_latency
[0] = 0;
3432 connector
->audio_latency
[0] = 0;
3433 connector
->video_latency
[1] = 0;
3434 connector
->audio_latency
[1] = 0;
3436 cea
= drm_find_cea_extension(edid
);
3438 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3442 mnl
= get_monitor_name(edid
, eld
+ 20);
3444 eld
[4] = (cea
[1] << 5) | mnl
;
3445 DRM_DEBUG_KMS("ELD monitor %s\n", eld
+ 20);
3447 eld
[0] = 2 << 3; /* ELD version: 2 */
3449 eld
[16] = edid
->mfg_id
[0];
3450 eld
[17] = edid
->mfg_id
[1];
3451 eld
[18] = edid
->prod_code
[0];
3452 eld
[19] = edid
->prod_code
[1];
3454 if (cea_revision(cea
) >= 3) {
3457 if (cea_db_offsets(cea
, &start
, &end
)) {
3462 for_each_cea_db(cea
, i
, start
, end
) {
3464 dbl
= cea_db_payload_len(db
);
3466 switch (cea_db_tag(db
)) {
3470 /* Audio Data Block, contains SADs */
3471 sad_count
= min(dbl
/ 3, 15 - total_sad_count
);
3473 memcpy(eld
+ 20 + mnl
+ total_sad_count
* 3,
3474 &db
[1], sad_count
* 3);
3475 total_sad_count
+= sad_count
;
3478 /* Speaker Allocation Data Block */
3483 /* HDMI Vendor-Specific Data Block */
3484 if (cea_db_is_hdmi_vsdb(db
))
3485 drm_parse_hdmi_vsdb_audio(connector
, db
);
3492 eld
[5] |= total_sad_count
<< 4;
3494 eld
[DRM_ELD_BASELINE_ELD_LEN
] =
3495 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld
), 4);
3497 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3498 drm_eld_size(eld
), total_sad_count
);
3500 EXPORT_SYMBOL(drm_edid_to_eld
);
3503 * drm_edid_to_sad - extracts SADs from EDID
3504 * @edid: EDID to parse
3505 * @sads: pointer that will be set to the extracted SADs
3507 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3509 * Note: The returned pointer needs to be freed using kfree().
3511 * Return: The number of found SADs or negative number on error.
3513 int drm_edid_to_sad(struct edid
*edid
, struct cea_sad
**sads
)
3516 int i
, start
, end
, dbl
;
3519 cea
= drm_find_cea_extension(edid
);
3521 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3525 if (cea_revision(cea
) < 3) {
3526 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3530 if (cea_db_offsets(cea
, &start
, &end
)) {
3531 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3535 for_each_cea_db(cea
, i
, start
, end
) {
3538 if (cea_db_tag(db
) == AUDIO_BLOCK
) {
3540 dbl
= cea_db_payload_len(db
);
3542 count
= dbl
/ 3; /* SAD is 3B */
3543 *sads
= kcalloc(count
, sizeof(**sads
), GFP_KERNEL
);
3546 for (j
= 0; j
< count
; j
++) {
3547 u8
*sad
= &db
[1 + j
* 3];
3549 (*sads
)[j
].format
= (sad
[0] & 0x78) >> 3;
3550 (*sads
)[j
].channels
= sad
[0] & 0x7;
3551 (*sads
)[j
].freq
= sad
[1] & 0x7F;
3552 (*sads
)[j
].byte2
= sad
[2];
3560 EXPORT_SYMBOL(drm_edid_to_sad
);
3563 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3564 * @edid: EDID to parse
3565 * @sadb: pointer to the speaker block
3567 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3569 * Note: The returned pointer needs to be freed using kfree().
3571 * Return: The number of found Speaker Allocation Blocks or negative number on
3574 int drm_edid_to_speaker_allocation(struct edid
*edid
, u8
**sadb
)
3577 int i
, start
, end
, dbl
;
3580 cea
= drm_find_cea_extension(edid
);
3582 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3586 if (cea_revision(cea
) < 3) {
3587 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3591 if (cea_db_offsets(cea
, &start
, &end
)) {
3592 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3596 for_each_cea_db(cea
, i
, start
, end
) {
3597 const u8
*db
= &cea
[i
];
3599 if (cea_db_tag(db
) == SPEAKER_BLOCK
) {
3600 dbl
= cea_db_payload_len(db
);
3602 /* Speaker Allocation Data Block */
3604 *sadb
= kmemdup(&db
[1], dbl
, GFP_KERNEL
);
3615 EXPORT_SYMBOL(drm_edid_to_speaker_allocation
);
3618 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3619 * @connector: connector associated with the HDMI/DP sink
3620 * @mode: the display mode
3622 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3623 * the sink doesn't support audio or video.
3625 int drm_av_sync_delay(struct drm_connector
*connector
,
3626 const struct drm_display_mode
*mode
)
3628 int i
= !!(mode
->flags
& DRM_MODE_FLAG_INTERLACE
);
3631 if (!connector
->latency_present
[0])
3633 if (!connector
->latency_present
[1])
3636 a
= connector
->audio_latency
[i
];
3637 v
= connector
->video_latency
[i
];
3640 * HDMI/DP sink doesn't support audio or video?
3642 if (a
== 255 || v
== 255)
3646 * Convert raw EDID values to millisecond.
3647 * Treat unknown latency as 0ms.
3650 a
= min(2 * (a
- 1), 500);
3652 v
= min(2 * (v
- 1), 500);
3654 return max(v
- a
, 0);
3656 EXPORT_SYMBOL(drm_av_sync_delay
);
3659 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3660 * @edid: monitor EDID information
3662 * Parse the CEA extension according to CEA-861-B.
3664 * Return: True if the monitor is HDMI, false if not or unknown.
3666 bool drm_detect_hdmi_monitor(struct edid
*edid
)
3670 int start_offset
, end_offset
;
3672 edid_ext
= drm_find_cea_extension(edid
);
3676 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3680 * Because HDMI identifier is in Vendor Specific Block,
3681 * search it from all data blocks of CEA extension.
3683 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3684 if (cea_db_is_hdmi_vsdb(&edid_ext
[i
]))
3690 EXPORT_SYMBOL(drm_detect_hdmi_monitor
);
3693 * drm_detect_monitor_audio - check monitor audio capability
3694 * @edid: EDID block to scan
3696 * Monitor should have CEA extension block.
3697 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3698 * audio' only. If there is any audio extension block and supported
3699 * audio format, assume at least 'basic audio' support, even if 'basic
3700 * audio' is not defined in EDID.
3702 * Return: True if the monitor supports audio, false otherwise.
3704 bool drm_detect_monitor_audio(struct edid
*edid
)
3708 bool has_audio
= false;
3709 int start_offset
, end_offset
;
3711 edid_ext
= drm_find_cea_extension(edid
);
3715 has_audio
= ((edid_ext
[3] & EDID_BASIC_AUDIO
) != 0);
3718 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3722 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3725 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3726 if (cea_db_tag(&edid_ext
[i
]) == AUDIO_BLOCK
) {
3728 for (j
= 1; j
< cea_db_payload_len(&edid_ext
[i
]) + 1; j
+= 3)
3729 DRM_DEBUG_KMS("CEA audio format %d\n",
3730 (edid_ext
[i
+ j
] >> 3) & 0xf);
3737 EXPORT_SYMBOL(drm_detect_monitor_audio
);
3740 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3741 * @edid: EDID block to scan
3743 * Check whether the monitor reports the RGB quantization range selection
3744 * as supported. The AVI infoframe can then be used to inform the monitor
3745 * which quantization range (full or limited) is used.
3747 * Return: True if the RGB quantization range is selectable, false otherwise.
3749 bool drm_rgb_quant_range_selectable(struct edid
*edid
)
3754 edid_ext
= drm_find_cea_extension(edid
);
3758 if (cea_db_offsets(edid_ext
, &start
, &end
))
3761 for_each_cea_db(edid_ext
, i
, start
, end
) {
3762 if (cea_db_tag(&edid_ext
[i
]) == VIDEO_CAPABILITY_BLOCK
&&
3763 cea_db_payload_len(&edid_ext
[i
]) == 2) {
3764 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext
[i
+ 2]);
3765 return edid_ext
[i
+ 2] & EDID_CEA_VCDB_QS
;
3771 EXPORT_SYMBOL(drm_rgb_quant_range_selectable
);
3773 static void drm_parse_hdmi_deep_color_info(struct drm_connector
*connector
,
3776 struct drm_display_info
*info
= &connector
->display_info
;
3777 unsigned int dc_bpc
= 0;
3779 /* HDMI supports at least 8 bpc */
3782 if (cea_db_payload_len(hdmi
) < 6)
3785 if (hdmi
[6] & DRM_EDID_HDMI_DC_30
) {
3787 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_30
;
3788 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3792 if (hdmi
[6] & DRM_EDID_HDMI_DC_36
) {
3794 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_36
;
3795 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3799 if (hdmi
[6] & DRM_EDID_HDMI_DC_48
) {
3801 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_48
;
3802 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3807 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3812 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3813 connector
->name
, dc_bpc
);
3817 * Deep color support mandates RGB444 support for all video
3818 * modes and forbids YCRCB422 support for all video modes per
3821 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3823 /* YCRCB444 is optional according to spec. */
3824 if (hdmi
[6] & DRM_EDID_HDMI_DC_Y444
) {
3825 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3826 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3831 * Spec says that if any deep color mode is supported at all,
3832 * then deep color 36 bit must be supported.
3834 if (!(hdmi
[6] & DRM_EDID_HDMI_DC_36
)) {
3835 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3841 drm_parse_hdmi_vsdb_video(struct drm_connector
*connector
, const u8
*db
)
3843 struct drm_display_info
*info
= &connector
->display_info
;
3844 u8 len
= cea_db_payload_len(db
);
3847 info
->dvi_dual
= db
[6] & 1;
3849 info
->max_tmds_clock
= db
[7] * 5000;
3851 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3852 "max TMDS clock %d kHz\n",
3854 info
->max_tmds_clock
);
3856 drm_parse_hdmi_deep_color_info(connector
, db
);
3859 static void drm_parse_cea_ext(struct drm_connector
*connector
,
3862 struct drm_display_info
*info
= &connector
->display_info
;
3866 edid_ext
= drm_find_cea_extension(edid
);
3870 info
->cea_rev
= edid_ext
[1];
3872 /* The existence of a CEA block should imply RGB support */
3873 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3874 if (edid_ext
[3] & EDID_CEA_YCRCB444
)
3875 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3876 if (edid_ext
[3] & EDID_CEA_YCRCB422
)
3877 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3879 if (cea_db_offsets(edid_ext
, &start
, &end
))
3882 for_each_cea_db(edid_ext
, i
, start
, end
) {
3883 const u8
*db
= &edid_ext
[i
];
3885 if (cea_db_is_hdmi_vsdb(db
))
3886 drm_parse_hdmi_vsdb_video(connector
, db
);
3890 static void drm_add_display_info(struct drm_connector
*connector
,
3893 struct drm_display_info
*info
= &connector
->display_info
;
3895 info
->width_mm
= edid
->width_cm
* 10;
3896 info
->height_mm
= edid
->height_cm
* 10;
3898 /* driver figures it out in this case */
3900 info
->color_formats
= 0;
3902 info
->max_tmds_clock
= 0;
3903 info
->dvi_dual
= false;
3905 if (edid
->revision
< 3)
3908 if (!(edid
->input
& DRM_EDID_INPUT_DIGITAL
))
3911 drm_parse_cea_ext(connector
, edid
);
3914 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
3916 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
3917 * tells us to assume 8 bpc color depth if the EDID doesn't have
3918 * extensions which tell otherwise.
3920 if ((info
->bpc
== 0) && (edid
->revision
< 4) &&
3921 (edid
->input
& DRM_EDID_DIGITAL_TYPE_DVI
)) {
3923 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
3924 connector
->name
, info
->bpc
);
3927 /* Only defined for 1.4 with digital displays */
3928 if (edid
->revision
< 4)
3931 switch (edid
->input
& DRM_EDID_DIGITAL_DEPTH_MASK
) {
3932 case DRM_EDID_DIGITAL_DEPTH_6
:
3935 case DRM_EDID_DIGITAL_DEPTH_8
:
3938 case DRM_EDID_DIGITAL_DEPTH_10
:
3941 case DRM_EDID_DIGITAL_DEPTH_12
:
3944 case DRM_EDID_DIGITAL_DEPTH_14
:
3947 case DRM_EDID_DIGITAL_DEPTH_16
:
3950 case DRM_EDID_DIGITAL_DEPTH_UNDEF
:
3956 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3957 connector
->name
, info
->bpc
);
3959 info
->color_formats
|= DRM_COLOR_FORMAT_RGB444
;
3960 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB444
)
3961 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3962 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB422
)
3963 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3966 static int validate_displayid(u8
*displayid
, int length
, int idx
)
3970 struct displayid_hdr
*base
;
3972 base
= (struct displayid_hdr
*)&displayid
[idx
];
3974 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3975 base
->rev
, base
->bytes
, base
->prod_id
, base
->ext_count
);
3977 if (base
->bytes
+ 5 > length
- idx
)
3979 for (i
= idx
; i
<= base
->bytes
+ 5; i
++) {
3980 csum
+= displayid
[i
];
3983 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum
);
3989 static struct drm_display_mode
*drm_mode_displayid_detailed(struct drm_device
*dev
,
3990 struct displayid_detailed_timings_1
*timings
)
3992 struct drm_display_mode
*mode
;
3993 unsigned pixel_clock
= (timings
->pixel_clock
[0] |
3994 (timings
->pixel_clock
[1] << 8) |
3995 (timings
->pixel_clock
[2] << 16));
3996 unsigned hactive
= (timings
->hactive
[0] | timings
->hactive
[1] << 8) + 1;
3997 unsigned hblank
= (timings
->hblank
[0] | timings
->hblank
[1] << 8) + 1;
3998 unsigned hsync
= (timings
->hsync
[0] | (timings
->hsync
[1] & 0x7f) << 8) + 1;
3999 unsigned hsync_width
= (timings
->hsw
[0] | timings
->hsw
[1] << 8) + 1;
4000 unsigned vactive
= (timings
->vactive
[0] | timings
->vactive
[1] << 8) + 1;
4001 unsigned vblank
= (timings
->vblank
[0] | timings
->vblank
[1] << 8) + 1;
4002 unsigned vsync
= (timings
->vsync
[0] | (timings
->vsync
[1] & 0x7f) << 8) + 1;
4003 unsigned vsync_width
= (timings
->vsw
[0] | timings
->vsw
[1] << 8) + 1;
4004 bool hsync_positive
= (timings
->hsync
[1] >> 7) & 0x1;
4005 bool vsync_positive
= (timings
->vsync
[1] >> 7) & 0x1;
4006 mode
= drm_mode_create(dev
);
4010 mode
->clock
= pixel_clock
* 10;
4011 mode
->hdisplay
= hactive
;
4012 mode
->hsync_start
= mode
->hdisplay
+ hsync
;
4013 mode
->hsync_end
= mode
->hsync_start
+ hsync_width
;
4014 mode
->htotal
= mode
->hdisplay
+ hblank
;
4016 mode
->vdisplay
= vactive
;
4017 mode
->vsync_start
= mode
->vdisplay
+ vsync
;
4018 mode
->vsync_end
= mode
->vsync_start
+ vsync_width
;
4019 mode
->vtotal
= mode
->vdisplay
+ vblank
;
4022 mode
->flags
|= hsync_positive
? DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
4023 mode
->flags
|= vsync_positive
? DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
4024 mode
->type
= DRM_MODE_TYPE_DRIVER
;
4026 if (timings
->flags
& 0x80)
4027 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
4028 mode
->vrefresh
= drm_mode_vrefresh(mode
);
4029 drm_mode_set_name(mode
);
4034 static int add_displayid_detailed_1_modes(struct drm_connector
*connector
,
4035 struct displayid_block
*block
)
4037 struct displayid_detailed_timing_block
*det
= (struct displayid_detailed_timing_block
*)block
;
4040 struct drm_display_mode
*newmode
;
4042 /* blocks must be multiple of 20 bytes length */
4043 if (block
->num_bytes
% 20)
4046 num_timings
= block
->num_bytes
/ 20;
4047 for (i
= 0; i
< num_timings
; i
++) {
4048 struct displayid_detailed_timings_1
*timings
= &det
->timings
[i
];
4050 newmode
= drm_mode_displayid_detailed(connector
->dev
, timings
);
4054 drm_mode_probed_add(connector
, newmode
);
4060 static int add_displayid_detailed_modes(struct drm_connector
*connector
,
4066 int length
= EDID_LENGTH
;
4067 struct displayid_block
*block
;
4070 displayid
= drm_find_displayid_extension(edid
);
4074 ret
= validate_displayid(displayid
, length
, idx
);
4078 idx
+= sizeof(struct displayid_hdr
);
4079 while (block
= (struct displayid_block
*)&displayid
[idx
],
4080 idx
+ sizeof(struct displayid_block
) <= length
&&
4081 idx
+ sizeof(struct displayid_block
) + block
->num_bytes
<= length
&&
4082 block
->num_bytes
> 0) {
4083 idx
+= block
->num_bytes
+ sizeof(struct displayid_block
);
4084 switch (block
->tag
) {
4085 case DATA_BLOCK_TYPE_1_DETAILED_TIMING
:
4086 num_modes
+= add_displayid_detailed_1_modes(connector
, block
);
4094 * drm_add_edid_modes - add modes from EDID data, if available
4095 * @connector: connector we're probing
4098 * Add the specified modes to the connector's mode list. Also fills out the
4099 * &drm_display_info structure in @connector with any information which can be
4100 * derived from the edid.
4102 * Return: The number of modes added or 0 if we couldn't find any.
4104 int drm_add_edid_modes(struct drm_connector
*connector
, struct edid
*edid
)
4112 if (!drm_edid_is_valid(edid
)) {
4113 dev_warn(connector
->dev
->dev
, "%s: EDID invalid.\n",
4118 quirks
= edid_get_quirks(edid
);
4121 * EDID spec says modes should be preferred in this order:
4122 * - preferred detailed mode
4123 * - other detailed modes from base block
4124 * - detailed modes from extension blocks
4125 * - CVT 3-byte code modes
4126 * - standard timing codes
4127 * - established timing codes
4128 * - modes inferred from GTF or CVT range information
4130 * We get this pretty much right.
4132 * XXX order for additional mode types in extension blocks?
4134 num_modes
+= add_detailed_modes(connector
, edid
, quirks
);
4135 num_modes
+= add_cvt_modes(connector
, edid
);
4136 num_modes
+= add_standard_modes(connector
, edid
);
4137 num_modes
+= add_established_modes(connector
, edid
);
4138 num_modes
+= add_cea_modes(connector
, edid
);
4139 num_modes
+= add_alternate_cea_modes(connector
, edid
);
4140 num_modes
+= add_displayid_detailed_modes(connector
, edid
);
4141 if (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
)
4142 num_modes
+= add_inferred_modes(connector
, edid
);
4144 if (quirks
& (EDID_QUIRK_PREFER_LARGE_60
| EDID_QUIRK_PREFER_LARGE_75
))
4145 edid_fixup_preferred(connector
, quirks
);
4147 drm_add_display_info(connector
, edid
);
4149 if (quirks
& EDID_QUIRK_FORCE_6BPC
)
4150 connector
->display_info
.bpc
= 6;
4152 if (quirks
& EDID_QUIRK_FORCE_8BPC
)
4153 connector
->display_info
.bpc
= 8;
4155 if (quirks
& EDID_QUIRK_FORCE_12BPC
)
4156 connector
->display_info
.bpc
= 12;
4160 EXPORT_SYMBOL(drm_add_edid_modes
);
4163 * drm_add_modes_noedid - add modes for the connectors without EDID
4164 * @connector: connector we're probing
4165 * @hdisplay: the horizontal display limit
4166 * @vdisplay: the vertical display limit
4168 * Add the specified modes to the connector's mode list. Only when the
4169 * hdisplay/vdisplay is not beyond the given limit, it will be added.
4171 * Return: The number of modes added or 0 if we couldn't find any.
4173 int drm_add_modes_noedid(struct drm_connector
*connector
,
4174 int hdisplay
, int vdisplay
)
4176 int i
, count
, num_modes
= 0;
4177 struct drm_display_mode
*mode
;
4178 struct drm_device
*dev
= connector
->dev
;
4180 count
= ARRAY_SIZE(drm_dmt_modes
);
4186 for (i
= 0; i
< count
; i
++) {
4187 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
4188 if (hdisplay
&& vdisplay
) {
4190 * Only when two are valid, they will be used to check
4191 * whether the mode should be added to the mode list of
4194 if (ptr
->hdisplay
> hdisplay
||
4195 ptr
->vdisplay
> vdisplay
)
4198 if (drm_mode_vrefresh(ptr
) > 61)
4200 mode
= drm_mode_duplicate(dev
, ptr
);
4202 drm_mode_probed_add(connector
, mode
);
4208 EXPORT_SYMBOL(drm_add_modes_noedid
);
4211 * drm_set_preferred_mode - Sets the preferred mode of a connector
4212 * @connector: connector whose mode list should be processed
4213 * @hpref: horizontal resolution of preferred mode
4214 * @vpref: vertical resolution of preferred mode
4216 * Marks a mode as preferred if it matches the resolution specified by @hpref
4219 void drm_set_preferred_mode(struct drm_connector
*connector
,
4220 int hpref
, int vpref
)
4222 struct drm_display_mode
*mode
;
4224 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
4225 if (mode
->hdisplay
== hpref
&&
4226 mode
->vdisplay
== vpref
)
4227 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
4230 EXPORT_SYMBOL(drm_set_preferred_mode
);
4233 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
4234 * data from a DRM display mode
4235 * @frame: HDMI AVI infoframe
4236 * @mode: DRM display mode
4238 * Return: 0 on success or a negative error code on failure.
4241 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe
*frame
,
4242 const struct drm_display_mode
*mode
)
4246 if (!frame
|| !mode
)
4249 err
= hdmi_avi_infoframe_init(frame
);
4253 if (mode
->flags
& DRM_MODE_FLAG_DBLCLK
)
4254 frame
->pixel_repeat
= 1;
4256 frame
->video_code
= drm_match_cea_mode(mode
);
4258 frame
->picture_aspect
= HDMI_PICTURE_ASPECT_NONE
;
4261 * Populate picture aspect ratio from either
4262 * user input (if specified) or from the CEA mode list.
4264 if (mode
->picture_aspect_ratio
== HDMI_PICTURE_ASPECT_4_3
||
4265 mode
->picture_aspect_ratio
== HDMI_PICTURE_ASPECT_16_9
)
4266 frame
->picture_aspect
= mode
->picture_aspect_ratio
;
4267 else if (frame
->video_code
> 0)
4268 frame
->picture_aspect
= drm_get_cea_aspect_ratio(
4271 frame
->active_aspect
= HDMI_ACTIVE_ASPECT_PICTURE
;
4272 frame
->scan_mode
= HDMI_SCAN_MODE_UNDERSCAN
;
4276 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode
);
4278 static enum hdmi_3d_structure
4279 s3d_structure_from_display_mode(const struct drm_display_mode
*mode
)
4281 u32 layout
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
4284 case DRM_MODE_FLAG_3D_FRAME_PACKING
:
4285 return HDMI_3D_STRUCTURE_FRAME_PACKING
;
4286 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE
:
4287 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE
;
4288 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE
:
4289 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE
;
4290 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL
:
4291 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL
;
4292 case DRM_MODE_FLAG_3D_L_DEPTH
:
4293 return HDMI_3D_STRUCTURE_L_DEPTH
;
4294 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH
:
4295 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH
;
4296 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
:
4297 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM
;
4298 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
:
4299 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF
;
4301 return HDMI_3D_STRUCTURE_INVALID
;
4306 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4307 * data from a DRM display mode
4308 * @frame: HDMI vendor infoframe
4309 * @mode: DRM display mode
4311 * Note that there's is a need to send HDMI vendor infoframes only when using a
4312 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4313 * function will return -EINVAL, error that can be safely ignored.
4315 * Return: 0 on success or a negative error code on failure.
4318 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe
*frame
,
4319 const struct drm_display_mode
*mode
)
4325 if (!frame
|| !mode
)
4328 vic
= drm_match_hdmi_mode(mode
);
4329 s3d_flags
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
4331 if (!vic
&& !s3d_flags
)
4334 if (vic
&& s3d_flags
)
4337 err
= hdmi_vendor_infoframe_init(frame
);
4344 frame
->s3d_struct
= s3d_structure_from_display_mode(mode
);
4348 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode
);
4350 static int drm_parse_tiled_block(struct drm_connector
*connector
,
4351 struct displayid_block
*block
)
4353 struct displayid_tiled_block
*tile
= (struct displayid_tiled_block
*)block
;
4355 u8 tile_v_loc
, tile_h_loc
;
4356 u8 num_v_tile
, num_h_tile
;
4357 struct drm_tile_group
*tg
;
4359 w
= tile
->tile_size
[0] | tile
->tile_size
[1] << 8;
4360 h
= tile
->tile_size
[2] | tile
->tile_size
[3] << 8;
4362 num_v_tile
= (tile
->topo
[0] & 0xf) | (tile
->topo
[2] & 0x30);
4363 num_h_tile
= (tile
->topo
[0] >> 4) | ((tile
->topo
[2] >> 2) & 0x30);
4364 tile_v_loc
= (tile
->topo
[1] & 0xf) | ((tile
->topo
[2] & 0x3) << 4);
4365 tile_h_loc
= (tile
->topo
[1] >> 4) | (((tile
->topo
[2] >> 2) & 0x3) << 4);
4367 connector
->has_tile
= true;
4368 if (tile
->tile_cap
& 0x80)
4369 connector
->tile_is_single_monitor
= true;
4371 connector
->num_h_tile
= num_h_tile
+ 1;
4372 connector
->num_v_tile
= num_v_tile
+ 1;
4373 connector
->tile_h_loc
= tile_h_loc
;
4374 connector
->tile_v_loc
= tile_v_loc
;
4375 connector
->tile_h_size
= w
+ 1;
4376 connector
->tile_v_size
= h
+ 1;
4378 DRM_DEBUG_KMS("tile cap 0x%x\n", tile
->tile_cap
);
4379 DRM_DEBUG_KMS("tile_size %d x %d\n", w
+ 1, h
+ 1);
4380 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4381 num_h_tile
+ 1, num_v_tile
+ 1, tile_h_loc
, tile_v_loc
);
4382 DRM_DEBUG_KMS("vend %c%c%c\n", tile
->topology_id
[0], tile
->topology_id
[1], tile
->topology_id
[2]);
4384 tg
= drm_mode_get_tile_group(connector
->dev
, tile
->topology_id
);
4386 tg
= drm_mode_create_tile_group(connector
->dev
, tile
->topology_id
);
4391 if (connector
->tile_group
!= tg
) {
4392 /* if we haven't got a pointer,
4393 take the reference, drop ref to old tile group */
4394 if (connector
->tile_group
) {
4395 drm_mode_put_tile_group(connector
->dev
, connector
->tile_group
);
4397 connector
->tile_group
= tg
;
4399 /* if same tile group, then release the ref we just took. */
4400 drm_mode_put_tile_group(connector
->dev
, tg
);
4404 static int drm_parse_display_id(struct drm_connector
*connector
,
4405 u8
*displayid
, int length
,
4406 bool is_edid_extension
)
4408 /* if this is an EDID extension the first byte will be 0x70 */
4410 struct displayid_block
*block
;
4413 if (is_edid_extension
)
4416 ret
= validate_displayid(displayid
, length
, idx
);
4420 idx
+= sizeof(struct displayid_hdr
);
4421 while (block
= (struct displayid_block
*)&displayid
[idx
],
4422 idx
+ sizeof(struct displayid_block
) <= length
&&
4423 idx
+ sizeof(struct displayid_block
) + block
->num_bytes
<= length
&&
4424 block
->num_bytes
> 0) {
4425 idx
+= block
->num_bytes
+ sizeof(struct displayid_block
);
4426 DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
4427 block
->tag
, block
->rev
, block
->num_bytes
);
4429 switch (block
->tag
) {
4430 case DATA_BLOCK_TILED_DISPLAY
:
4431 ret
= drm_parse_tiled_block(connector
, block
);
4435 case DATA_BLOCK_TYPE_1_DETAILED_TIMING
:
4436 /* handled in mode gathering code. */
4439 DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block
->tag
);
4446 static void drm_get_displayid(struct drm_connector
*connector
,
4449 void *displayid
= NULL
;
4451 connector
->has_tile
= false;
4452 displayid
= drm_find_displayid_extension(edid
);
4454 /* drop reference to any tile group we had */
4458 ret
= drm_parse_display_id(connector
, displayid
, EDID_LENGTH
, true);
4461 if (!connector
->has_tile
)
4465 if (connector
->tile_group
) {
4466 drm_mode_put_tile_group(connector
->dev
, connector
->tile_group
);
4467 connector
->tile_group
= NULL
;