2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sub license,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial portions
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
29 #include <linux/kernel.h>
30 #include <linux/i2c.h>
31 #include <linux/i2c-algo-bit.h>
37 * - support EDID 1.4 (incl. CE blocks)
41 * EDID blocks out in the wild have a variety of bugs, try to collect
42 * them here (note that userspace may work around broken monitors first,
43 * but fixes should make their way here so that the kernel "just works"
44 * on as many displays as possible).
47 /* First detailed mode wrong, use largest 60Hz mode */
48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
49 /* Reported 135MHz pixel clock is too high, needs adjustment */
50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
51 /* Prefer the largest mode at 75 Hz */
52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
53 /* Detail timing is in cm not mm */
54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
55 /* Detailed timing descriptors have bogus size values, so just take the
56 * maximum size and use that.
58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
59 /* Monitor forgot to set the first detailed is preferred bit. */
60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
61 /* use +hsync +vsync for detailed mode */
62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 static struct edid_quirk
{
73 } edid_quirk_list
[] = {
75 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60
},
77 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60
},
79 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
81 /* Belinea 10 15 55 */
82 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60
},
83 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60
},
85 /* Envision Peripherals, Inc. EN-7100e */
86 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH
},
88 /* Funai Electronics PM36B */
89 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75
|
90 EDID_QUIRK_DETAILED_IN_CM
},
92 /* LG Philips LCD LP154W01-A5 */
93 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
94 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
96 /* Philips 107p5 CRT */
97 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
100 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
102 /* Samsung SyncMaster 205BW. Note: irony */
103 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP
},
104 /* Samsung SyncMaster 22[5-6]BW */
105 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60
},
106 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60
},
110 /* Valid EDID header has these bytes */
111 static const u8 edid_header
[] = {
112 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
116 * drm_edid_is_valid - sanity check EDID data
119 * Sanity check the EDID block by looking at the header, the version number
120 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
123 bool drm_edid_is_valid(struct edid
*edid
)
127 u8
*raw_edid
= (u8
*)edid
;
129 for (i
= 0; i
< sizeof(edid_header
); i
++)
130 if (raw_edid
[i
] == edid_header
[i
])
134 else if (score
>= 6) {
135 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
136 memcpy(raw_edid
, edid_header
, sizeof(edid_header
));
140 for (i
= 0; i
< EDID_LENGTH
; i
++)
143 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum
);
147 if (edid
->version
!= 1) {
148 DRM_ERROR("EDID has major version %d, instead of 1\n", edid
->version
);
152 if (edid
->revision
> 4)
153 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
159 DRM_ERROR("Raw EDID:\n");
160 print_hex_dump_bytes(KERN_ERR
, DUMP_PREFIX_NONE
, raw_edid
, EDID_LENGTH
);
165 EXPORT_SYMBOL(drm_edid_is_valid
);
168 * edid_vendor - match a string against EDID's obfuscated vendor field
169 * @edid: EDID to match
170 * @vendor: vendor string
172 * Returns true if @vendor is in @edid, false otherwise
174 static bool edid_vendor(struct edid
*edid
, char *vendor
)
178 edid_vendor
[0] = ((edid
->mfg_id
[0] & 0x7c) >> 2) + '@';
179 edid_vendor
[1] = (((edid
->mfg_id
[0] & 0x3) << 3) |
180 ((edid
->mfg_id
[1] & 0xe0) >> 5)) + '@';
181 edid_vendor
[2] = (edid
->mfg_id
[1] & 0x1f) + '@';
183 return !strncmp(edid_vendor
, vendor
, 3);
187 * edid_get_quirks - return quirk flags for a given EDID
188 * @edid: EDID to process
190 * This tells subsequent routines what fixes they need to apply.
192 static u32
edid_get_quirks(struct edid
*edid
)
194 struct edid_quirk
*quirk
;
197 for (i
= 0; i
< ARRAY_SIZE(edid_quirk_list
); i
++) {
198 quirk
= &edid_quirk_list
[i
];
200 if (edid_vendor(edid
, quirk
->vendor
) &&
201 (EDID_PRODUCT_ID(edid
) == quirk
->product_id
))
202 return quirk
->quirks
;
208 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
209 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
213 * edid_fixup_preferred - set preferred modes based on quirk list
214 * @connector: has mode list to fix up
215 * @quirks: quirks list
217 * Walk the mode list for @connector, clearing the preferred status
218 * on existing modes and setting it anew for the right mode ala @quirks.
220 static void edid_fixup_preferred(struct drm_connector
*connector
,
223 struct drm_display_mode
*t
, *cur_mode
, *preferred_mode
;
224 int target_refresh
= 0;
226 if (list_empty(&connector
->probed_modes
))
229 if (quirks
& EDID_QUIRK_PREFER_LARGE_60
)
231 if (quirks
& EDID_QUIRK_PREFER_LARGE_75
)
234 preferred_mode
= list_first_entry(&connector
->probed_modes
,
235 struct drm_display_mode
, head
);
237 list_for_each_entry_safe(cur_mode
, t
, &connector
->probed_modes
, head
) {
238 cur_mode
->type
&= ~DRM_MODE_TYPE_PREFERRED
;
240 if (cur_mode
== preferred_mode
)
243 /* Largest mode is preferred */
244 if (MODE_SIZE(cur_mode
) > MODE_SIZE(preferred_mode
))
245 preferred_mode
= cur_mode
;
247 /* At a given size, try to get closest to target refresh */
248 if ((MODE_SIZE(cur_mode
) == MODE_SIZE(preferred_mode
)) &&
249 MODE_REFRESH_DIFF(cur_mode
, target_refresh
) <
250 MODE_REFRESH_DIFF(preferred_mode
, target_refresh
)) {
251 preferred_mode
= cur_mode
;
255 preferred_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
259 * Add the Autogenerated from the DMT spec.
260 * This table is copied from xfree86/modes/xf86EdidModes.c.
261 * But the mode with Reduced blank feature is deleted.
263 static struct drm_display_mode drm_dmt_modes
[] = {
265 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
266 736, 832, 0, 350, 382, 385, 445, 0,
267 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
269 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
270 736, 832, 0, 400, 401, 404, 445, 0,
271 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
273 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 756,
274 828, 936, 0, 400, 401, 404, 446, 0,
275 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
277 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
278 752, 800, 0, 480, 489, 492, 525, 0,
279 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
281 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
282 704, 832, 0, 480, 489, 492, 520, 0,
283 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
285 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
286 720, 840, 0, 480, 481, 484, 500, 0,
287 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
289 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 36000, 640, 696,
290 752, 832, 0, 480, 481, 484, 509, 0,
291 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
293 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
294 896, 1024, 0, 600, 601, 603, 625, 0,
295 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
297 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
298 968, 1056, 0, 600, 601, 605, 628, 0,
299 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
301 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
302 976, 1040, 0, 600, 637, 643, 666, 0,
303 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
305 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
306 896, 1056, 0, 600, 601, 604, 625, 0,
307 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
309 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 56250, 800, 832,
310 896, 1048, 0, 600, 601, 604, 631, 0,
311 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
313 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER
, 33750, 848, 864,
314 976, 1088, 0, 480, 486, 494, 517, 0,
315 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
316 /* 1024x768@43Hz, interlace */
317 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 44900, 1024, 1032,
318 1208, 1264, 0, 768, 768, 772, 817, 0,
319 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
320 DRM_MODE_FLAG_INTERLACE
) },
322 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
323 1184, 1344, 0, 768, 771, 777, 806, 0,
324 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
326 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
327 1184, 1328, 0, 768, 771, 777, 806, 0,
328 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
330 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
331 1136, 1312, 0, 768, 769, 772, 800, 0,
332 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
334 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 94500, 1024, 1072,
335 1072, 1376, 0, 768, 769, 772, 808, 0,
336 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
338 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
339 1344, 1600, 0, 864, 865, 868, 900, 0,
340 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
342 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
343 1472, 1664, 0, 768, 771, 778, 798, 0,
344 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
346 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 102250, 1280, 1360,
347 1488, 1696, 0, 768, 771, 778, 805, 0,
348 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
350 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 117500, 1280, 1360,
351 1496, 1712, 0, 768, 771, 778, 809, 0,
352 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
354 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
355 1480, 1680, 0, 800, 803, 809, 831, 0,
356 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
358 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 106500, 1280, 1360,
359 1488, 1696, 0, 800, 803, 809, 838, 0,
360 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
362 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 122500, 1280, 1360,
363 1496, 1712, 0, 800, 803, 809, 843, 0,
364 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
366 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
367 1488, 1800, 0, 960, 961, 964, 1000, 0,
368 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
370 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1344,
371 1504, 1728, 0, 960, 961, 964, 1011, 0,
372 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
374 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
375 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
376 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
378 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
379 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
380 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
382 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 157500, 1280, 1344,
383 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
384 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
386 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
387 1536, 1792, 0, 768, 771, 777, 795, 0,
388 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
390 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
391 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
392 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
394 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 156000, 1400, 1504,
395 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
396 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
398 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 179500, 1400, 1504,
399 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
400 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
402 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
403 1672, 1904, 0, 900, 903, 909, 934, 0,
404 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
406 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 136750, 1440, 1536,
407 1688, 1936, 0, 900, 903, 909, 942, 0,
408 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
410 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 157000, 1440, 1544,
411 1696, 1952, 0, 900, 903, 909, 948, 0,
412 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
414 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
415 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
416 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
418 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 175500, 1600, 1664,
419 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
420 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
422 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 189000, 1600, 1664,
423 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
424 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
426 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 2025000, 1600, 1664,
427 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
428 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
430 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 229500, 1600, 1664,
431 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
432 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
434 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
435 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
436 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
438 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 187000, 1680, 1800,
439 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
440 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
442 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 214750, 1680, 1808,
443 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
444 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
446 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
447 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
448 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
450 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 261000, 1792, 1888,
451 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
452 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
454 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
455 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
456 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
458 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 288000, 1856, 1984,
459 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
460 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
462 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
463 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
464 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
466 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 245250, 1920, 2056,
467 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
468 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
470 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 281250, 1920, 2064,
471 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
472 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
474 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
475 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
476 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
478 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2064,
479 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
480 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
482 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
483 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
484 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
486 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 443250, 2560, 2768,
487 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
488 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
490 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 505250, 2560, 2768,
491 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
492 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
494 static const int drm_num_dmt_modes
=
495 sizeof(drm_dmt_modes
) / sizeof(struct drm_display_mode
);
497 static struct drm_display_mode
*drm_find_dmt(struct drm_device
*dev
,
498 int hsize
, int vsize
, int fresh
)
501 struct drm_display_mode
*ptr
, *mode
;
504 for (i
= 0; i
< drm_num_dmt_modes
; i
++) {
505 ptr
= &drm_dmt_modes
[i
];
506 if (hsize
== ptr
->hdisplay
&&
507 vsize
== ptr
->vdisplay
&&
508 fresh
== drm_mode_vrefresh(ptr
)) {
509 /* get the expected default mode */
510 mode
= drm_mode_duplicate(dev
, ptr
);
518 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
519 * monitors fill with ascii space (0x20) instead.
522 bad_std_timing(u8 a
, u8 b
)
524 return (a
== 0x00 && b
== 0x00) ||
525 (a
== 0x01 && b
== 0x01) ||
526 (a
== 0x20 && b
== 0x20);
530 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
531 * @t: standard timing params
532 * @timing_level: standard timing level
534 * Take the standard timing params (in this case width, aspect, and refresh)
535 * and convert them into a real mode using CVT/GTF/DMT.
537 * Punts for now, but should eventually use the FB layer's CVT based mode
540 struct drm_display_mode
*drm_mode_std(struct drm_device
*dev
,
541 struct std_timing
*t
,
545 struct drm_display_mode
*mode
;
548 unsigned aspect_ratio
= (t
->vfreq_aspect
& EDID_TIMING_ASPECT_MASK
)
549 >> EDID_TIMING_ASPECT_SHIFT
;
550 unsigned vfreq
= (t
->vfreq_aspect
& EDID_TIMING_VFREQ_MASK
)
551 >> EDID_TIMING_VFREQ_SHIFT
;
553 if (bad_std_timing(t
->hsize
, t
->vfreq_aspect
))
556 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
557 hsize
= t
->hsize
* 8 + 248;
558 /* vrefresh_rate = vfreq + 60 */
559 vrefresh_rate
= vfreq
+ 60;
560 /* the vdisplay is calculated based on the aspect ratio */
561 if (aspect_ratio
== 0) {
565 vsize
= (hsize
* 10) / 16;
566 } else if (aspect_ratio
== 1)
567 vsize
= (hsize
* 3) / 4;
568 else if (aspect_ratio
== 2)
569 vsize
= (hsize
* 4) / 5;
571 vsize
= (hsize
* 9) / 16;
573 if (hsize
== 1360 && vsize
== 765 && vrefresh_rate
== 60) {
574 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
576 mode
->hdisplay
= 1366;
577 mode
->vsync_start
= mode
->vsync_start
- 1;
578 mode
->vsync_end
= mode
->vsync_end
- 1;
582 /* check whether it can be found in default mode table */
583 mode
= drm_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
);
587 switch (timing_level
) {
591 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
594 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
602 * EDID is delightfully ambiguous about how interlaced modes are to be
603 * encoded. Our internal representation is of frame height, but some
604 * HDTV detailed timings are encoded as field height.
606 * The format list here is from CEA, in frame size. Technically we
607 * should be checking refresh rate too. Whatever.
610 drm_mode_do_interlace_quirk(struct drm_display_mode
*mode
,
611 struct detailed_pixel_timing
*pt
)
614 static const struct {
616 } cea_interlaced
[] = {
625 static const int n_sizes
=
626 sizeof(cea_interlaced
)/sizeof(cea_interlaced
[0]);
628 if (!(pt
->misc
& DRM_EDID_PT_INTERLACED
))
631 for (i
= 0; i
< n_sizes
; i
++) {
632 if ((mode
->hdisplay
== cea_interlaced
[i
].w
) &&
633 (mode
->vdisplay
== cea_interlaced
[i
].h
/ 2)) {
635 mode
->vsync_start
*= 2;
636 mode
->vsync_end
*= 2;
642 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
646 * drm_mode_detailed - create a new mode from an EDID detailed timing section
647 * @dev: DRM device (needed to create new mode)
649 * @timing: EDID detailed timing info
650 * @quirks: quirks to apply
652 * An EDID detailed timing block contains enough info for us to create and
653 * return a new struct drm_display_mode.
655 static struct drm_display_mode
*drm_mode_detailed(struct drm_device
*dev
,
657 struct detailed_timing
*timing
,
660 struct drm_display_mode
*mode
;
661 struct detailed_pixel_timing
*pt
= &timing
->data
.pixel_data
;
662 unsigned hactive
= (pt
->hactive_hblank_hi
& 0xf0) << 4 | pt
->hactive_lo
;
663 unsigned vactive
= (pt
->vactive_vblank_hi
& 0xf0) << 4 | pt
->vactive_lo
;
664 unsigned hblank
= (pt
->hactive_hblank_hi
& 0xf) << 8 | pt
->hblank_lo
;
665 unsigned vblank
= (pt
->vactive_vblank_hi
& 0xf) << 8 | pt
->vblank_lo
;
666 unsigned hsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt
->hsync_offset_lo
;
667 unsigned hsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x30) << 4 | pt
->hsync_pulse_width_lo
;
668 unsigned vsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc) >> 2 | pt
->vsync_offset_pulse_width_lo
>> 4;
669 unsigned vsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x3) << 4 | (pt
->vsync_offset_pulse_width_lo
& 0xf);
671 /* ignore tiny modes */
672 if (hactive
< 64 || vactive
< 64)
675 if (pt
->misc
& DRM_EDID_PT_STEREO
) {
676 printk(KERN_WARNING
"stereo mode not supported\n");
679 if (!(pt
->misc
& DRM_EDID_PT_SEPARATE_SYNC
)) {
680 printk(KERN_WARNING
"composite sync not supported\n");
683 /* it is incorrect if hsync/vsync width is zero */
684 if (!hsync_pulse_width
|| !vsync_pulse_width
) {
685 DRM_DEBUG_KMS("Incorrect Detailed timing. "
686 "Wrong Hsync/Vsync pulse width\n");
689 mode
= drm_mode_create(dev
);
693 mode
->type
= DRM_MODE_TYPE_DRIVER
;
695 if (quirks
& EDID_QUIRK_135_CLOCK_TOO_HIGH
)
696 timing
->pixel_clock
= cpu_to_le16(1088);
698 mode
->clock
= le16_to_cpu(timing
->pixel_clock
) * 10;
700 mode
->hdisplay
= hactive
;
701 mode
->hsync_start
= mode
->hdisplay
+ hsync_offset
;
702 mode
->hsync_end
= mode
->hsync_start
+ hsync_pulse_width
;
703 mode
->htotal
= mode
->hdisplay
+ hblank
;
705 mode
->vdisplay
= vactive
;
706 mode
->vsync_start
= mode
->vdisplay
+ vsync_offset
;
707 mode
->vsync_end
= mode
->vsync_start
+ vsync_pulse_width
;
708 mode
->vtotal
= mode
->vdisplay
+ vblank
;
710 /* perform the basic check for the detailed timing */
711 if (mode
->hsync_end
> mode
->htotal
||
712 mode
->vsync_end
> mode
->vtotal
) {
713 drm_mode_destroy(dev
, mode
);
714 DRM_DEBUG_KMS("Incorrect detailed timing. "
715 "Sync is beyond the blank.\n");
719 /* Some EDIDs have bogus h/vtotal values */
720 if (mode
->hsync_end
> mode
->htotal
)
721 mode
->htotal
= mode
->hsync_end
+ 1;
722 if (mode
->vsync_end
> mode
->vtotal
)
723 mode
->vtotal
= mode
->vsync_end
+ 1;
725 drm_mode_set_name(mode
);
727 drm_mode_do_interlace_quirk(mode
, pt
);
729 if (quirks
& EDID_QUIRK_DETAILED_SYNC_PP
) {
730 pt
->misc
|= DRM_EDID_PT_HSYNC_POSITIVE
| DRM_EDID_PT_VSYNC_POSITIVE
;
733 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_HSYNC_POSITIVE
) ?
734 DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
735 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_VSYNC_POSITIVE
) ?
736 DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
738 mode
->width_mm
= pt
->width_mm_lo
| (pt
->width_height_mm_hi
& 0xf0) << 4;
739 mode
->height_mm
= pt
->height_mm_lo
| (pt
->width_height_mm_hi
& 0xf) << 8;
741 if (quirks
& EDID_QUIRK_DETAILED_IN_CM
) {
742 mode
->width_mm
*= 10;
743 mode
->height_mm
*= 10;
746 if (quirks
& EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
) {
747 mode
->width_mm
= edid
->width_cm
* 10;
748 mode
->height_mm
= edid
->height_cm
* 10;
755 * Detailed mode info for the EDID "established modes" data to use.
757 static struct drm_display_mode edid_est_modes
[] = {
758 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
759 968, 1056, 0, 600, 601, 605, 628, 0,
760 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@60Hz */
761 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
762 896, 1024, 0, 600, 601, 603, 625, 0,
763 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@56Hz */
764 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
765 720, 840, 0, 480, 481, 484, 500, 0,
766 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@75Hz */
767 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
768 704, 832, 0, 480, 489, 491, 520, 0,
769 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@72Hz */
770 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 30240, 640, 704,
771 768, 864, 0, 480, 483, 486, 525, 0,
772 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@67Hz */
773 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25200, 640, 656,
774 752, 800, 0, 480, 490, 492, 525, 0,
775 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@60Hz */
776 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 738,
777 846, 900, 0, 400, 421, 423, 449, 0,
778 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 720x400@88Hz */
779 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 28320, 720, 738,
780 846, 900, 0, 400, 412, 414, 449, 0,
781 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 720x400@70Hz */
782 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
783 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
784 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1280x1024@75Hz */
785 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78800, 1024, 1040,
786 1136, 1312, 0, 768, 769, 772, 800, 0,
787 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1024x768@75Hz */
788 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
789 1184, 1328, 0, 768, 771, 777, 806, 0,
790 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@70Hz */
791 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
792 1184, 1344, 0, 768, 771, 777, 806, 0,
793 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@60Hz */
794 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
,44900, 1024, 1032,
795 1208, 1264, 0, 768, 768, 776, 817, 0,
796 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
| DRM_MODE_FLAG_INTERLACE
) }, /* 1024x768@43Hz */
797 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 57284, 832, 864,
798 928, 1152, 0, 624, 625, 628, 667, 0,
799 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 832x624@75Hz */
800 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
801 896, 1056, 0, 600, 601, 604, 625, 0,
802 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@75Hz */
803 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
804 976, 1040, 0, 600, 637, 643, 666, 0,
805 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@72Hz */
806 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
807 1344, 1600, 0, 864, 865, 868, 900, 0,
808 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1152x864@75Hz */
811 #define EDID_EST_TIMINGS 16
812 #define EDID_STD_TIMINGS 8
813 #define EDID_DETAILED_TIMINGS 4
816 * add_established_modes - get est. modes from EDID and add them
817 * @edid: EDID block to scan
819 * Each EDID block contains a bitmap of the supported "established modes" list
820 * (defined above). Tease them out and add them to the global modes list.
822 static int add_established_modes(struct drm_connector
*connector
, struct edid
*edid
)
824 struct drm_device
*dev
= connector
->dev
;
825 unsigned long est_bits
= edid
->established_timings
.t1
|
826 (edid
->established_timings
.t2
<< 8) |
827 ((edid
->established_timings
.mfg_rsvd
& 0x80) << 9);
830 for (i
= 0; i
<= EDID_EST_TIMINGS
; i
++)
831 if (est_bits
& (1<<i
)) {
832 struct drm_display_mode
*newmode
;
833 newmode
= drm_mode_duplicate(dev
, &edid_est_modes
[i
]);
835 drm_mode_probed_add(connector
, newmode
);
843 * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
844 * @edid: EDID block to scan
846 static int standard_timing_level(struct edid
*edid
)
848 if (edid
->revision
>= 2) {
849 if (edid
->revision
>= 4 && (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
))
857 * add_standard_modes - get std. modes from EDID and add them
858 * @edid: EDID block to scan
860 * Standard modes can be calculated using the CVT standard. Grab them from
861 * @edid, calculate them, and add them to the list.
863 static int add_standard_modes(struct drm_connector
*connector
, struct edid
*edid
)
865 struct drm_device
*dev
= connector
->dev
;
869 timing_level
= standard_timing_level(edid
);
871 for (i
= 0; i
< EDID_STD_TIMINGS
; i
++) {
872 struct std_timing
*t
= &edid
->standard_timings
[i
];
873 struct drm_display_mode
*newmode
;
875 /* If std timings bytes are 1, 1 it's empty */
876 if (t
->hsize
== 1 && t
->vfreq_aspect
== 1)
879 newmode
= drm_mode_std(dev
, &edid
->standard_timings
[i
],
880 edid
->revision
, timing_level
);
882 drm_mode_probed_add(connector
, newmode
);
892 * - GTF secondary curve formula
893 * - EDID 1.4 range offsets
894 * - CVT extended bits
897 mode_in_range(struct drm_display_mode
*mode
, struct detailed_timing
*timing
)
899 struct detailed_data_monitor_range
*range
;
902 range
= &timing
->data
.other_data
.data
.range
;
904 hsync
= drm_mode_hsync(mode
);
905 vrefresh
= drm_mode_vrefresh(mode
);
907 if (hsync
< range
->min_hfreq_khz
|| hsync
> range
->max_hfreq_khz
)
910 if (vrefresh
< range
->min_vfreq
|| vrefresh
> range
->max_vfreq
)
913 if (range
->pixel_clock_mhz
&& range
->pixel_clock_mhz
!= 0xff) {
914 /* be forgiving since it's in units of 10MHz */
915 int max_clock
= range
->pixel_clock_mhz
* 10 + 9;
917 if (mode
->clock
> max_clock
)
925 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
926 * need to account for them.
928 static int drm_gtf_modes_for_range(struct drm_connector
*connector
,
929 struct detailed_timing
*timing
)
932 struct drm_display_mode
*newmode
;
933 struct drm_device
*dev
= connector
->dev
;
935 for (i
= 0; i
< drm_num_dmt_modes
; i
++) {
936 if (mode_in_range(drm_dmt_modes
+ i
, timing
)) {
937 newmode
= drm_mode_duplicate(dev
, &drm_dmt_modes
[i
]);
939 drm_mode_probed_add(connector
, newmode
);
948 static int drm_cvt_modes(struct drm_connector
*connector
,
949 struct detailed_timing
*timing
)
952 struct drm_display_mode
*newmode
;
953 struct drm_device
*dev
= connector
->dev
;
954 struct cvt_timing
*cvt
;
955 const int rates
[] = { 60, 85, 75, 60, 50 };
956 const u8 empty
[3] = { 0, 0, 0 };
958 for (i
= 0; i
< 4; i
++) {
959 int uninitialized_var(width
), height
;
960 cvt
= &(timing
->data
.other_data
.data
.cvt
[i
]);
962 if (!memcmp(cvt
->code
, empty
, 3))
965 height
= (cvt
->code
[0] + ((cvt
->code
[1] & 0xf0) << 4) + 1) * 2;
966 switch (cvt
->code
[1] & 0x0c) {
968 width
= height
* 4 / 3;
971 width
= height
* 16 / 9;
974 width
= height
* 16 / 10;
977 width
= height
* 15 / 9;
981 for (j
= 1; j
< 5; j
++) {
982 if (cvt
->code
[2] & (1 << j
)) {
983 newmode
= drm_cvt_mode(dev
, width
, height
,
987 drm_mode_probed_add(connector
, newmode
);
997 static int add_detailed_modes(struct drm_connector
*connector
,
998 struct detailed_timing
*timing
,
999 struct edid
*edid
, u32 quirks
, int preferred
)
1002 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
1003 int timing_level
= standard_timing_level(edid
);
1004 int gtf
= (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
);
1005 struct drm_display_mode
*newmode
;
1006 struct drm_device
*dev
= connector
->dev
;
1008 if (timing
->pixel_clock
) {
1009 newmode
= drm_mode_detailed(dev
, edid
, timing
, quirks
);
1014 newmode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1016 drm_mode_probed_add(connector
, newmode
);
1020 /* other timing types */
1021 switch (data
->type
) {
1022 case EDID_DETAIL_MONITOR_RANGE
:
1024 modes
+= drm_gtf_modes_for_range(connector
, timing
);
1026 case EDID_DETAIL_STD_MODES
:
1027 /* Six modes per detailed section */
1028 for (i
= 0; i
< 6; i
++) {
1029 struct std_timing
*std
;
1030 struct drm_display_mode
*newmode
;
1032 std
= &data
->data
.timings
[i
];
1033 newmode
= drm_mode_std(dev
, std
, edid
->revision
,
1036 drm_mode_probed_add(connector
, newmode
);
1041 case EDID_DETAIL_CVT_3BYTE
:
1042 modes
+= drm_cvt_modes(connector
, timing
);
1052 * add_detailed_info - get detailed mode info from EDID data
1053 * @connector: attached connector
1054 * @edid: EDID block to scan
1055 * @quirks: quirks to apply
1057 * Some of the detailed timing sections may contain mode information. Grab
1058 * it and add it to the list.
1060 static int add_detailed_info(struct drm_connector
*connector
,
1061 struct edid
*edid
, u32 quirks
)
1065 for (i
= 0; i
< EDID_DETAILED_TIMINGS
; i
++) {
1066 struct detailed_timing
*timing
= &edid
->detailed_timings
[i
];
1067 int preferred
= (i
== 0) && (edid
->features
& DRM_EDID_FEATURE_PREFERRED_TIMING
);
1069 /* In 1.0, only timings are allowed */
1070 if (!timing
->pixel_clock
&& edid
->version
== 1 &&
1071 edid
->revision
== 0)
1074 modes
+= add_detailed_modes(connector
, timing
, edid
, quirks
,
1082 * add_detailed_mode_eedid - get detailed mode info from addtional timing
1084 * @connector: attached connector
1085 * @edid: EDID block to scan(It is only to get addtional timing EDID block)
1086 * @quirks: quirks to apply
1088 * Some of the detailed timing sections may contain mode information. Grab
1089 * it and add it to the list.
1091 static int add_detailed_info_eedid(struct drm_connector
*connector
,
1092 struct edid
*edid
, u32 quirks
)
1095 char *edid_ext
= NULL
;
1096 struct detailed_timing
*timing
;
1098 int start_offset
, end_offset
;
1101 if (edid
->version
== 1 && edid
->revision
< 3) {
1102 /* If the EDID version is less than 1.3, there is no
1107 if (!edid
->extensions
) {
1108 /* if there is no extension EDID, it is unnecessary to
1109 * parse the E-EDID to get detailed info
1114 /* Chose real EDID extension number */
1115 edid_ext_num
= edid
->extensions
> DRM_MAX_EDID_EXT_NUM
?
1116 DRM_MAX_EDID_EXT_NUM
: edid
->extensions
;
1118 /* Find CEA extension */
1119 for (i
= 0; i
< edid_ext_num
; i
++) {
1120 edid_ext
= (char *)edid
+ EDID_LENGTH
* (i
+ 1);
1121 /* This block is CEA extension */
1122 if (edid_ext
[0] == 0x02)
1126 if (i
== edid_ext_num
) {
1127 /* if there is no additional timing EDID block, return */
1131 /* Get the start offset of detailed timing block */
1132 start_offset
= edid_ext
[2];
1133 if (start_offset
== 0) {
1134 /* If the start_offset is zero, it means that neither detailed
1135 * info nor data block exist. In such case it is also
1136 * unnecessary to parse the detailed timing info.
1141 timing_level
= standard_timing_level(edid
);
1142 end_offset
= EDID_LENGTH
;
1143 end_offset
-= sizeof(struct detailed_timing
);
1144 for (i
= start_offset
; i
< end_offset
;
1145 i
+= sizeof(struct detailed_timing
)) {
1146 timing
= (struct detailed_timing
*)(edid_ext
+ i
);
1147 modes
+= add_detailed_modes(connector
, timing
, edid
, quirks
, 0);
1153 #define DDC_ADDR 0x50
1155 * Get EDID information via I2C.
1157 * \param adapter : i2c device adaptor
1158 * \param buf : EDID data buffer to be filled
1159 * \param len : EDID data buffer length
1160 * \return 0 on success or -1 on failure.
1162 * Try to fetch EDID information by calling i2c driver function.
1164 int drm_do_probe_ddc_edid(struct i2c_adapter
*adapter
,
1165 unsigned char *buf
, int len
)
1167 unsigned char start
= 0x0;
1168 struct i2c_msg msgs
[] = {
1182 if (i2c_transfer(adapter
, msgs
, 2) == 2)
1187 EXPORT_SYMBOL(drm_do_probe_ddc_edid
);
1189 static int drm_ddc_read_edid(struct drm_connector
*connector
,
1190 struct i2c_adapter
*adapter
,
1195 for (i
= 0; i
< 4; i
++) {
1196 if (drm_do_probe_ddc_edid(adapter
, buf
, len
))
1198 if (drm_edid_is_valid((struct edid
*)buf
))
1202 /* repeated checksum failures; warn, but carry on */
1203 dev_warn(&connector
->dev
->pdev
->dev
, "%s: EDID invalid.\n",
1204 drm_get_connector_name(connector
));
1209 * drm_get_edid - get EDID data, if available
1210 * @connector: connector we're probing
1211 * @adapter: i2c adapter to use for DDC
1213 * Poke the given connector's i2c channel to grab EDID data if possible.
1215 * Return edid data or NULL if we couldn't find any.
1217 struct edid
*drm_get_edid(struct drm_connector
*connector
,
1218 struct i2c_adapter
*adapter
)
1223 edid
= kmalloc(EDID_LENGTH
* (DRM_MAX_EDID_EXT_NUM
+ 1),
1226 dev_warn(&connector
->dev
->pdev
->dev
,
1227 "Failed to allocate EDID\n");
1231 /* Read first EDID block */
1232 ret
= drm_ddc_read_edid(connector
, adapter
,
1233 (unsigned char *)edid
, EDID_LENGTH
);
1237 /* There are EDID extensions to be read */
1238 if (edid
->extensions
!= 0) {
1239 int edid_ext_num
= edid
->extensions
;
1241 if (edid_ext_num
> DRM_MAX_EDID_EXT_NUM
) {
1242 dev_warn(&connector
->dev
->pdev
->dev
,
1243 "The number of extension(%d) is "
1244 "over max (%d), actually read number (%d)\n",
1245 edid_ext_num
, DRM_MAX_EDID_EXT_NUM
,
1246 DRM_MAX_EDID_EXT_NUM
);
1247 /* Reset EDID extension number to be read */
1248 edid_ext_num
= DRM_MAX_EDID_EXT_NUM
;
1250 /* Read EDID including extensions too */
1251 ret
= drm_ddc_read_edid(connector
, adapter
, (char *)edid
,
1252 EDID_LENGTH
* (edid_ext_num
+ 1));
1258 connector
->display_info
.raw_edid
= (char *)edid
;
1268 EXPORT_SYMBOL(drm_get_edid
);
1270 #define HDMI_IDENTIFIER 0x000C03
1271 #define VENDOR_BLOCK 0x03
1273 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1274 * @edid: monitor EDID information
1276 * Parse the CEA extension according to CEA-861-B.
1277 * Return true if HDMI, false if not or unknown.
1279 bool drm_detect_hdmi_monitor(struct edid
*edid
)
1281 char *edid_ext
= NULL
;
1282 int i
, hdmi_id
, edid_ext_num
;
1283 int start_offset
, end_offset
;
1284 bool is_hdmi
= false;
1286 /* No EDID or EDID extensions */
1287 if (edid
== NULL
|| edid
->extensions
== 0)
1290 /* Chose real EDID extension number */
1291 edid_ext_num
= edid
->extensions
> DRM_MAX_EDID_EXT_NUM
?
1292 DRM_MAX_EDID_EXT_NUM
: edid
->extensions
;
1294 /* Find CEA extension */
1295 for (i
= 0; i
< edid_ext_num
; i
++) {
1296 edid_ext
= (char *)edid
+ EDID_LENGTH
* (i
+ 1);
1297 /* This block is CEA extension */
1298 if (edid_ext
[0] == 0x02)
1302 if (i
== edid_ext_num
)
1305 /* Data block offset in CEA extension block */
1307 end_offset
= edid_ext
[2];
1310 * Because HDMI identifier is in Vendor Specific Block,
1311 * search it from all data blocks of CEA extension.
1313 for (i
= start_offset
; i
< end_offset
;
1314 /* Increased by data block len */
1315 i
+= ((edid_ext
[i
] & 0x1f) + 1)) {
1316 /* Find vendor specific block */
1317 if ((edid_ext
[i
] >> 5) == VENDOR_BLOCK
) {
1318 hdmi_id
= edid_ext
[i
+ 1] | (edid_ext
[i
+ 2] << 8) |
1319 edid_ext
[i
+ 3] << 16;
1320 /* Find HDMI identifier */
1321 if (hdmi_id
== HDMI_IDENTIFIER
)
1330 EXPORT_SYMBOL(drm_detect_hdmi_monitor
);
1333 * drm_add_edid_modes - add modes from EDID data, if available
1334 * @connector: connector we're probing
1337 * Add the specified modes to the connector's mode list.
1339 * Return number of modes added or 0 if we couldn't find any.
1341 int drm_add_edid_modes(struct drm_connector
*connector
, struct edid
*edid
)
1349 if (!drm_edid_is_valid(edid
)) {
1350 dev_warn(&connector
->dev
->pdev
->dev
, "%s: EDID invalid.\n",
1351 drm_get_connector_name(connector
));
1355 quirks
= edid_get_quirks(edid
);
1357 num_modes
+= add_established_modes(connector
, edid
);
1358 num_modes
+= add_standard_modes(connector
, edid
);
1359 num_modes
+= add_detailed_info(connector
, edid
, quirks
);
1360 num_modes
+= add_detailed_info_eedid(connector
, edid
, quirks
);
1362 if (quirks
& (EDID_QUIRK_PREFER_LARGE_60
| EDID_QUIRK_PREFER_LARGE_75
))
1363 edid_fixup_preferred(connector
, quirks
);
1365 connector
->display_info
.serration_vsync
= (edid
->input
& DRM_EDID_INPUT_SERRATION_VSYNC
) ? 1 : 0;
1366 connector
->display_info
.sync_on_green
= (edid
->input
& DRM_EDID_INPUT_SYNC_ON_GREEN
) ? 1 : 0;
1367 connector
->display_info
.composite_sync
= (edid
->input
& DRM_EDID_INPUT_COMPOSITE_SYNC
) ? 1 : 0;
1368 connector
->display_info
.separate_syncs
= (edid
->input
& DRM_EDID_INPUT_SEPARATE_SYNCS
) ? 1 : 0;
1369 connector
->display_info
.blank_to_black
= (edid
->input
& DRM_EDID_INPUT_BLANK_TO_BLACK
) ? 1 : 0;
1370 connector
->display_info
.video_level
= (edid
->input
& DRM_EDID_INPUT_VIDEO_LEVEL
) >> 5;
1371 connector
->display_info
.digital
= (edid
->input
& DRM_EDID_INPUT_DIGITAL
) ? 1 : 0;
1372 connector
->display_info
.width_mm
= edid
->width_cm
* 10;
1373 connector
->display_info
.height_mm
= edid
->height_cm
* 10;
1374 connector
->display_info
.gamma
= edid
->gamma
;
1375 connector
->display_info
.gtf_supported
= (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
) ? 1 : 0;
1376 connector
->display_info
.standard_color
= (edid
->features
& DRM_EDID_FEATURE_STANDARD_COLOR
) ? 1 : 0;
1377 connector
->display_info
.display_type
= (edid
->features
& DRM_EDID_FEATURE_DISPLAY_TYPE
) >> 3;
1378 connector
->display_info
.active_off_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_ACTIVE_OFF
) ? 1 : 0;
1379 connector
->display_info
.suspend_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_SUSPEND
) ? 1 : 0;
1380 connector
->display_info
.standby_supported
= (edid
->features
& DRM_EDID_FEATURE_PM_STANDBY
) ? 1 : 0;
1381 connector
->display_info
.gamma
= edid
->gamma
;
1385 EXPORT_SYMBOL(drm_add_edid_modes
);
1388 * drm_add_modes_noedid - add modes for the connectors without EDID
1389 * @connector: connector we're probing
1390 * @hdisplay: the horizontal display limit
1391 * @vdisplay: the vertical display limit
1393 * Add the specified modes to the connector's mode list. Only when the
1394 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1396 * Return number of modes added or 0 if we couldn't find any.
1398 int drm_add_modes_noedid(struct drm_connector
*connector
,
1399 int hdisplay
, int vdisplay
)
1401 int i
, count
, num_modes
= 0;
1402 struct drm_display_mode
*mode
, *ptr
;
1403 struct drm_device
*dev
= connector
->dev
;
1405 count
= sizeof(drm_dmt_modes
) / sizeof(struct drm_display_mode
);
1411 for (i
= 0; i
< count
; i
++) {
1412 ptr
= &drm_dmt_modes
[i
];
1413 if (hdisplay
&& vdisplay
) {
1415 * Only when two are valid, they will be used to check
1416 * whether the mode should be added to the mode list of
1419 if (ptr
->hdisplay
> hdisplay
||
1420 ptr
->vdisplay
> vdisplay
)
1423 if (drm_mode_vrefresh(ptr
) > 61)
1425 mode
= drm_mode_duplicate(dev
, ptr
);
1427 drm_mode_probed_add(connector
, mode
);
1433 EXPORT_SYMBOL(drm_add_modes_noedid
);