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git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - drivers/gpu/drm/gma500/gtt.c
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2007, Intel Corporation.
6 * Authors: Thomas Hellstrom <thomas-at-tungstengraphics.com>
7 * Alan Cox <alan@linux.intel.com>
11 #include <linux/shmem_fs.h>
12 #include <asm/set_memory.h>
18 * GTT resource allocator - manage page mappings in GTT space
22 * psb_gtt_mask_pte - generate GTT pte entry
23 * @pfn: page number to encode
24 * @type: type of memory in the GTT
26 * Set the GTT entry for the appropriate memory type.
28 static inline uint32_t psb_gtt_mask_pte(uint32_t pfn
, int type
)
30 uint32_t mask
= PSB_PTE_VALID
;
32 /* Ensure we explode rather than put an invalid low mapping of
33 a high mapping page into the gtt */
34 BUG_ON(pfn
& ~(0xFFFFFFFF >> PAGE_SHIFT
));
36 if (type
& PSB_MMU_CACHED_MEMORY
)
37 mask
|= PSB_PTE_CACHED
;
38 if (type
& PSB_MMU_RO_MEMORY
)
40 if (type
& PSB_MMU_WO_MEMORY
)
43 return (pfn
<< PAGE_SHIFT
) | mask
;
47 * psb_gtt_entry - find the GTT entries for a gtt_range
48 * @dev: our DRM device
51 * Given a gtt_range object return the GTT offset of the page table
52 * entries for this gtt_range
54 static u32 __iomem
*psb_gtt_entry(struct drm_device
*dev
, struct gtt_range
*r
)
56 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
59 offset
= r
->resource
.start
- dev_priv
->gtt_mem
->start
;
61 return dev_priv
->gtt_map
+ (offset
>> PAGE_SHIFT
);
65 * psb_gtt_insert - put an object into the GTT
66 * @dev: our DRM device
70 * Take our preallocated GTT range and insert the GEM object into
71 * the GTT. This is protected via the gtt mutex which the caller
74 static int psb_gtt_insert(struct drm_device
*dev
, struct gtt_range
*r
,
77 u32 __iomem
*gtt_slot
;
82 if (r
->pages
== NULL
) {
87 WARN_ON(r
->stolen
); /* refcount these maybe ? */
89 gtt_slot
= psb_gtt_entry(dev
, r
);
93 /* Make sure changes are visible to the GPU */
94 set_pages_array_wc(pages
, r
->npage
);
97 /* Write our page entries into the GTT itself */
98 for (i
= r
->roll
; i
< r
->npage
; i
++) {
99 pte
= psb_gtt_mask_pte(page_to_pfn(r
->pages
[i
]),
100 PSB_MMU_CACHED_MEMORY
);
101 iowrite32(pte
, gtt_slot
++);
103 for (i
= 0; i
< r
->roll
; i
++) {
104 pte
= psb_gtt_mask_pte(page_to_pfn(r
->pages
[i
]),
105 PSB_MMU_CACHED_MEMORY
);
106 iowrite32(pte
, gtt_slot
++);
108 /* Make sure all the entries are set before we return */
109 ioread32(gtt_slot
- 1);
115 * psb_gtt_remove - remove an object from the GTT
116 * @dev: our DRM device
119 * Remove a preallocated GTT range from the GTT. Overwrite all the
120 * page table entries with the dummy page. This is protected via the gtt
121 * mutex which the caller must hold.
123 static void psb_gtt_remove(struct drm_device
*dev
, struct gtt_range
*r
)
125 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
126 u32 __iomem
*gtt_slot
;
132 gtt_slot
= psb_gtt_entry(dev
, r
);
133 pte
= psb_gtt_mask_pte(page_to_pfn(dev_priv
->scratch_page
),
134 PSB_MMU_CACHED_MEMORY
);
136 for (i
= 0; i
< r
->npage
; i
++)
137 iowrite32(pte
, gtt_slot
++);
138 ioread32(gtt_slot
- 1);
139 set_pages_array_wb(r
->pages
, r
->npage
);
143 * psb_gtt_roll - set scrolling position
144 * @dev: our DRM device
145 * @r: the gtt mapping we are using
148 * Roll an existing pinned mapping by moving the pages through the GTT.
149 * This allows us to implement hardware scrolling on the consoles without
152 void psb_gtt_roll(struct drm_device
*dev
, struct gtt_range
*r
, int roll
)
154 u32 __iomem
*gtt_slot
;
158 if (roll
>= r
->npage
) {
165 /* Not currently in the GTT - no worry we will write the mapping at
166 the right position when it gets pinned */
167 if (!r
->stolen
&& !r
->in_gart
)
170 gtt_slot
= psb_gtt_entry(dev
, r
);
172 for (i
= r
->roll
; i
< r
->npage
; i
++) {
173 pte
= psb_gtt_mask_pte(page_to_pfn(r
->pages
[i
]),
174 PSB_MMU_CACHED_MEMORY
);
175 iowrite32(pte
, gtt_slot
++);
177 for (i
= 0; i
< r
->roll
; i
++) {
178 pte
= psb_gtt_mask_pte(page_to_pfn(r
->pages
[i
]),
179 PSB_MMU_CACHED_MEMORY
);
180 iowrite32(pte
, gtt_slot
++);
182 ioread32(gtt_slot
- 1);
186 * psb_gtt_attach_pages - attach and pin GEM pages
189 * Pin and build an in kernel list of the pages that back our GEM object.
190 * While we hold this the pages cannot be swapped out. This is protected
191 * via the gtt mutex which the caller must hold.
193 static int psb_gtt_attach_pages(struct gtt_range
*gt
)
199 pages
= drm_gem_get_pages(>
->gem
);
201 return PTR_ERR(pages
);
203 gt
->npage
= gt
->gem
.size
/ PAGE_SIZE
;
210 * psb_gtt_detach_pages - attach and pin GEM pages
213 * Undo the effect of psb_gtt_attach_pages. At this point the pages
214 * must have been removed from the GTT as they could now be paged out
215 * and move bus address. This is protected via the gtt mutex which the
218 static void psb_gtt_detach_pages(struct gtt_range
*gt
)
220 drm_gem_put_pages(>
->gem
, gt
->pages
, true, false);
225 * psb_gtt_pin - pin pages into the GTT
228 * Pin a set of pages into the GTT. The pins are refcounted so that
229 * multiple pins need multiple unpins to undo.
231 * Non GEM backed objects treat this as a no-op as they are always GTT
234 int psb_gtt_pin(struct gtt_range
*gt
)
237 struct drm_device
*dev
= gt
->gem
.dev
;
238 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
239 u32 gpu_base
= dev_priv
->gtt
.gatt_start
;
241 mutex_lock(&dev_priv
->gtt_mutex
);
243 if (gt
->in_gart
== 0 && gt
->stolen
== 0) {
244 ret
= psb_gtt_attach_pages(gt
);
247 ret
= psb_gtt_insert(dev
, gt
, 0);
249 psb_gtt_detach_pages(gt
);
252 psb_mmu_insert_pages(psb_mmu_get_default_pd(dev_priv
->mmu
),
253 gt
->pages
, (gpu_base
+ gt
->offset
),
254 gt
->npage
, 0, 0, PSB_MMU_CACHED_MEMORY
);
258 mutex_unlock(&dev_priv
->gtt_mutex
);
263 * psb_gtt_unpin - Drop a GTT pin requirement
266 * Undoes the effect of psb_gtt_pin. On the last drop the GEM object
267 * will be removed from the GTT which will also drop the page references
268 * and allow the VM to clean up or page stuff.
270 * Non GEM backed objects treat this as a no-op as they are always GTT
273 void psb_gtt_unpin(struct gtt_range
*gt
)
275 struct drm_device
*dev
= gt
->gem
.dev
;
276 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
277 u32 gpu_base
= dev_priv
->gtt
.gatt_start
;
280 /* While holding the gtt_mutex no new blits can be initiated */
281 mutex_lock(&dev_priv
->gtt_mutex
);
283 /* Wait for any possible usage of the memory to be finished */
284 ret
= gma_blt_wait_idle(dev_priv
);
286 DRM_ERROR("Failed to idle the blitter, unpin failed!");
290 WARN_ON(!gt
->in_gart
);
293 if (gt
->in_gart
== 0 && gt
->stolen
== 0) {
294 psb_mmu_remove_pages(psb_mmu_get_default_pd(dev_priv
->mmu
),
295 (gpu_base
+ gt
->offset
), gt
->npage
, 0, 0);
296 psb_gtt_remove(dev
, gt
);
297 psb_gtt_detach_pages(gt
);
301 mutex_unlock(&dev_priv
->gtt_mutex
);
305 * GTT resource allocator - allocate and manage GTT address space
309 * psb_gtt_alloc_range - allocate GTT address space
310 * @dev: Our DRM device
311 * @len: length (bytes) of address space required
312 * @name: resource name
313 * @backed: resource should be backed by stolen pages
314 * @align: requested alignment
316 * Ask the kernel core to find us a suitable range of addresses
317 * to use for a GTT mapping.
319 * Returns a gtt_range structure describing the object, or NULL on
320 * error. On successful return the resource is both allocated and marked
323 struct gtt_range
*psb_gtt_alloc_range(struct drm_device
*dev
, int len
,
324 const char *name
, int backed
, u32 align
)
326 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
327 struct gtt_range
*gt
;
328 struct resource
*r
= dev_priv
->gtt_mem
;
330 unsigned long start
, end
;
333 /* The start of the GTT is the stolen pages */
335 end
= r
->start
+ dev_priv
->gtt
.stolen_size
- 1;
337 /* The rest we will use for GEM backed objects */
338 start
= r
->start
+ dev_priv
->gtt
.stolen_size
;
342 gt
= kzalloc(sizeof(struct gtt_range
), GFP_KERNEL
);
345 gt
->resource
.name
= name
;
347 gt
->in_gart
= backed
;
349 /* Ensure this is set for non GEM objects */
351 ret
= allocate_resource(dev_priv
->gtt_mem
, >
->resource
,
352 len
, start
, end
, align
, NULL
, NULL
);
354 gt
->offset
= gt
->resource
.start
- r
->start
;
362 * psb_gtt_free_range - release GTT address space
363 * @dev: our DRM device
364 * @gt: a mapping created with psb_gtt_alloc_range
366 * Release a resource that was allocated with psb_gtt_alloc_range. If the
367 * object has been pinned by mmap users we clean this up here currently.
369 void psb_gtt_free_range(struct drm_device
*dev
, struct gtt_range
*gt
)
371 /* Undo the mmap pin if we are destroying the object */
376 WARN_ON(gt
->in_gart
&& !gt
->stolen
);
377 release_resource(>
->resource
);
381 static void psb_gtt_alloc(struct drm_device
*dev
)
383 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
384 init_rwsem(&dev_priv
->gtt
.sem
);
387 void psb_gtt_takedown(struct drm_device
*dev
)
389 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
391 if (dev_priv
->gtt_map
) {
392 iounmap(dev_priv
->gtt_map
);
393 dev_priv
->gtt_map
= NULL
;
395 if (dev_priv
->gtt_initialized
) {
396 pci_write_config_word(dev
->pdev
, PSB_GMCH_CTRL
,
397 dev_priv
->gmch_ctrl
);
398 PSB_WVDC32(dev_priv
->pge_ctl
, PSB_PGETBL_CTL
);
399 (void) PSB_RVDC32(PSB_PGETBL_CTL
);
401 if (dev_priv
->vram_addr
)
402 iounmap(dev_priv
->gtt_map
);
405 int psb_gtt_init(struct drm_device
*dev
, int resume
)
407 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
409 unsigned long stolen_size
, vram_stolen_size
;
410 unsigned i
, num_pages
;
418 mutex_init(&dev_priv
->gtt_mutex
);
419 mutex_init(&dev_priv
->mmap_mutex
);
426 pci_read_config_word(dev
->pdev
, PSB_GMCH_CTRL
, &dev_priv
->gmch_ctrl
);
427 pci_write_config_word(dev
->pdev
, PSB_GMCH_CTRL
,
428 dev_priv
->gmch_ctrl
| _PSB_GMCH_ENABLED
);
430 dev_priv
->pge_ctl
= PSB_RVDC32(PSB_PGETBL_CTL
);
431 PSB_WVDC32(dev_priv
->pge_ctl
| _PSB_PGETBL_ENABLED
, PSB_PGETBL_CTL
);
432 (void) PSB_RVDC32(PSB_PGETBL_CTL
);
434 /* The root resource we allocate address space from */
435 dev_priv
->gtt_initialized
= 1;
437 pg
->gtt_phys_start
= dev_priv
->pge_ctl
& PAGE_MASK
;
440 * The video mmu has a hw bug when accessing 0x0D0000000.
441 * Make gatt start at 0x0e000,0000. This doesn't actually
442 * matter for us but may do if the video acceleration ever
445 pg
->mmu_gatt_start
= 0xE0000000;
447 pg
->gtt_start
= pci_resource_start(dev
->pdev
, PSB_GTT_RESOURCE
);
448 gtt_pages
= pci_resource_len(dev
->pdev
, PSB_GTT_RESOURCE
)
450 /* CDV doesn't report this. In which case the system has 64 gtt pages */
451 if (pg
->gtt_start
== 0 || gtt_pages
== 0) {
452 dev_dbg(dev
->dev
, "GTT PCI BAR not initialized.\n");
454 pg
->gtt_start
= dev_priv
->pge_ctl
;
457 pg
->gatt_start
= pci_resource_start(dev
->pdev
, PSB_GATT_RESOURCE
);
458 pg
->gatt_pages
= pci_resource_len(dev
->pdev
, PSB_GATT_RESOURCE
)
460 dev_priv
->gtt_mem
= &dev
->pdev
->resource
[PSB_GATT_RESOURCE
];
462 if (pg
->gatt_pages
== 0 || pg
->gatt_start
== 0) {
463 static struct resource fudge
; /* Preferably peppermint */
464 /* This can occur on CDV systems. Fudge it in this case.
465 We really don't care what imaginary space is being allocated
467 dev_dbg(dev
->dev
, "GATT PCI BAR not initialized.\n");
468 pg
->gatt_start
= 0x40000000;
469 pg
->gatt_pages
= (128 * 1024 * 1024) >> PAGE_SHIFT
;
470 /* This is a little confusing but in fact the GTT is providing
471 a view from the GPU into memory and not vice versa. As such
472 this is really allocating space that is not the same as the
473 CPU address space on CDV */
474 fudge
.start
= 0x40000000;
475 fudge
.end
= 0x40000000 + 128 * 1024 * 1024 - 1;
476 fudge
.name
= "fudge";
477 fudge
.flags
= IORESOURCE_MEM
;
478 dev_priv
->gtt_mem
= &fudge
;
481 pci_read_config_dword(dev
->pdev
, PSB_BSM
, &dev_priv
->stolen_base
);
482 vram_stolen_size
= pg
->gtt_phys_start
- dev_priv
->stolen_base
485 stolen_size
= vram_stolen_size
;
487 dev_dbg(dev
->dev
, "Stolen memory base 0x%x, size %luK\n",
488 dev_priv
->stolen_base
, vram_stolen_size
/ 1024);
490 if (resume
&& (gtt_pages
!= pg
->gtt_pages
) &&
491 (stolen_size
!= pg
->stolen_size
)) {
492 dev_err(dev
->dev
, "GTT resume error.\n");
497 pg
->gtt_pages
= gtt_pages
;
498 pg
->stolen_size
= stolen_size
;
499 dev_priv
->vram_stolen_size
= vram_stolen_size
;
502 * Map the GTT and the stolen memory area
505 dev_priv
->gtt_map
= ioremap_nocache(pg
->gtt_phys_start
,
506 gtt_pages
<< PAGE_SHIFT
);
507 if (!dev_priv
->gtt_map
) {
508 dev_err(dev
->dev
, "Failure to map gtt.\n");
514 dev_priv
->vram_addr
= ioremap_wc(dev_priv
->stolen_base
,
517 if (!dev_priv
->vram_addr
) {
518 dev_err(dev
->dev
, "Failure to map stolen base.\n");
524 * Insert vram stolen pages into the GTT
527 pfn_base
= dev_priv
->stolen_base
>> PAGE_SHIFT
;
528 num_pages
= vram_stolen_size
>> PAGE_SHIFT
;
529 dev_dbg(dev
->dev
, "Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",
530 num_pages
, pfn_base
<< PAGE_SHIFT
, 0);
531 for (i
= 0; i
< num_pages
; ++i
) {
532 pte
= psb_gtt_mask_pte(pfn_base
+ i
, PSB_MMU_CACHED_MEMORY
);
533 iowrite32(pte
, dev_priv
->gtt_map
+ i
);
537 * Init rest of GTT to the scratch page to avoid accidents or scribbles
540 pfn_base
= page_to_pfn(dev_priv
->scratch_page
);
541 pte
= psb_gtt_mask_pte(pfn_base
, PSB_MMU_CACHED_MEMORY
);
542 for (; i
< gtt_pages
; ++i
)
543 iowrite32(pte
, dev_priv
->gtt_map
+ i
);
545 (void) ioread32(dev_priv
->gtt_map
+ i
- 1);
549 psb_gtt_takedown(dev
);
553 int psb_gtt_restore(struct drm_device
*dev
)
555 struct drm_psb_private
*dev_priv
= dev
->dev_private
;
556 struct resource
*r
= dev_priv
->gtt_mem
->child
;
557 struct gtt_range
*range
;
558 unsigned int restored
= 0, total
= 0, size
= 0;
560 /* On resume, the gtt_mutex is already initialized */
561 mutex_lock(&dev_priv
->gtt_mutex
);
562 psb_gtt_init(dev
, 1);
565 range
= container_of(r
, struct gtt_range
, resource
);
567 psb_gtt_insert(dev
, range
, 1);
568 size
+= range
->resource
.end
- range
->resource
.start
;
574 mutex_unlock(&dev_priv
->gtt_mutex
);
575 DRM_DEBUG_DRIVER("Restored %u of %u gtt ranges (%u KB)", restored
,
576 total
, (size
/ 1024));