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[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / i810 / i810_dma.c
1 /* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33 #include "drmP.h"
34 #include "drm.h"
35 #include "i810_drm.h"
36 #include "i810_drv.h"
37 #include <linux/interrupt.h> /* For task queue support */
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/pagemap.h>
41
42 #define I810_BUF_FREE 2
43 #define I810_BUF_CLIENT 1
44 #define I810_BUF_HARDWARE 0
45
46 #define I810_BUF_UNMAPPED 0
47 #define I810_BUF_MAPPED 1
48
49 static struct drm_buf *i810_freelist_get(struct drm_device * dev)
50 {
51 struct drm_device_dma *dma = dev->dma;
52 int i;
53 int used;
54
55 /* Linear search might not be the best solution */
56
57 for (i = 0; i < dma->buf_count; i++) {
58 struct drm_buf *buf = dma->buflist[i];
59 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE)
64 return buf;
65 }
66 return NULL;
67 }
68
69 /* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
73 static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
74 {
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
77
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
80 if (used != I810_BUF_CLIENT) {
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
83 }
84
85 return 0;
86 }
87
88 static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
89 {
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
92 drm_i810_private_t *dev_priv;
93 struct drm_buf *buf;
94 drm_i810_buf_priv_t *buf_priv;
95
96 dev = priv->minor->dev;
97 dev_priv = dev->dev_private;
98 buf = dev_priv->mmap_buffer;
99 buf_priv = buf->dev_private;
100
101 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
102
103 buf_priv->currently_mapped = I810_BUF_MAPPED;
104
105 if (io_remap_pfn_range(vma, vma->vm_start,
106 vma->vm_pgoff,
107 vma->vm_end - vma->vm_start, vma->vm_page_prot))
108 return -EAGAIN;
109 return 0;
110 }
111
112 static const struct file_operations i810_buffer_fops = {
113 .open = drm_open,
114 .release = drm_release,
115 .unlocked_ioctl = drm_ioctl,
116 .mmap = i810_mmap_buffers,
117 .fasync = drm_fasync,
118 .llseek = noop_llseek,
119 };
120
121 static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
122 {
123 struct drm_device *dev = file_priv->minor->dev;
124 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
125 drm_i810_private_t *dev_priv = dev->dev_private;
126 const struct file_operations *old_fops;
127 int retcode = 0;
128
129 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
130 return -EINVAL;
131
132 down_write(&current->mm->mmap_sem);
133 old_fops = file_priv->filp->f_op;
134 file_priv->filp->f_op = &i810_buffer_fops;
135 dev_priv->mmap_buffer = buf;
136 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
137 PROT_READ | PROT_WRITE,
138 MAP_SHARED, buf->bus_address);
139 dev_priv->mmap_buffer = NULL;
140 file_priv->filp->f_op = old_fops;
141 if (IS_ERR(buf_priv->virtual)) {
142 /* Real error */
143 DRM_ERROR("mmap error\n");
144 retcode = PTR_ERR(buf_priv->virtual);
145 buf_priv->virtual = NULL;
146 }
147 up_write(&current->mm->mmap_sem);
148
149 return retcode;
150 }
151
152 static int i810_unmap_buffer(struct drm_buf *buf)
153 {
154 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
155 int retcode = 0;
156
157 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
158 return -EINVAL;
159
160 down_write(&current->mm->mmap_sem);
161 retcode = do_munmap(current->mm,
162 (unsigned long)buf_priv->virtual,
163 (size_t) buf->total);
164 up_write(&current->mm->mmap_sem);
165
166 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
167 buf_priv->virtual = NULL;
168
169 return retcode;
170 }
171
172 static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
173 struct drm_file *file_priv)
174 {
175 struct drm_buf *buf;
176 drm_i810_buf_priv_t *buf_priv;
177 int retcode = 0;
178
179 buf = i810_freelist_get(dev);
180 if (!buf) {
181 retcode = -ENOMEM;
182 DRM_DEBUG("retcode=%d\n", retcode);
183 return retcode;
184 }
185
186 retcode = i810_map_buffer(buf, file_priv);
187 if (retcode) {
188 i810_freelist_put(dev, buf);
189 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
190 return retcode;
191 }
192 buf->file_priv = file_priv;
193 buf_priv = buf->dev_private;
194 d->granted = 1;
195 d->request_idx = buf->idx;
196 d->request_size = buf->total;
197 d->virtual = buf_priv->virtual;
198
199 return retcode;
200 }
201
202 static int i810_dma_cleanup(struct drm_device *dev)
203 {
204 struct drm_device_dma *dma = dev->dma;
205
206 /* Make sure interrupts are disabled here because the uninstall ioctl
207 * may not have been called from userspace and after dev_private
208 * is freed, it's too late.
209 */
210 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
211 drm_irq_uninstall(dev);
212
213 if (dev->dev_private) {
214 int i;
215 drm_i810_private_t *dev_priv =
216 (drm_i810_private_t *) dev->dev_private;
217
218 if (dev_priv->ring.virtual_start)
219 drm_core_ioremapfree(&dev_priv->ring.map, dev);
220 if (dev_priv->hw_status_page) {
221 pci_free_consistent(dev->pdev, PAGE_SIZE,
222 dev_priv->hw_status_page,
223 dev_priv->dma_status_page);
224 }
225 kfree(dev->dev_private);
226 dev->dev_private = NULL;
227
228 for (i = 0; i < dma->buf_count; i++) {
229 struct drm_buf *buf = dma->buflist[i];
230 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
231
232 if (buf_priv->kernel_virtual && buf->total)
233 drm_core_ioremapfree(&buf_priv->map, dev);
234 }
235 }
236 return 0;
237 }
238
239 static int i810_wait_ring(struct drm_device *dev, int n)
240 {
241 drm_i810_private_t *dev_priv = dev->dev_private;
242 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
243 int iters = 0;
244 unsigned long end;
245 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
246
247 end = jiffies + (HZ * 3);
248 while (ring->space < n) {
249 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
250 ring->space = ring->head - (ring->tail + 8);
251 if (ring->space < 0)
252 ring->space += ring->Size;
253
254 if (ring->head != last_head) {
255 end = jiffies + (HZ * 3);
256 last_head = ring->head;
257 }
258
259 iters++;
260 if (time_before(end, jiffies)) {
261 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
262 DRM_ERROR("lockup\n");
263 goto out_wait_ring;
264 }
265 udelay(1);
266 }
267
268 out_wait_ring:
269 return iters;
270 }
271
272 static void i810_kernel_lost_context(struct drm_device *dev)
273 {
274 drm_i810_private_t *dev_priv = dev->dev_private;
275 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
276
277 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
278 ring->tail = I810_READ(LP_RING + RING_TAIL);
279 ring->space = ring->head - (ring->tail + 8);
280 if (ring->space < 0)
281 ring->space += ring->Size;
282 }
283
284 static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
285 {
286 struct drm_device_dma *dma = dev->dma;
287 int my_idx = 24;
288 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
289 int i;
290
291 if (dma->buf_count > 1019) {
292 /* Not enough space in the status page for the freelist */
293 return -EINVAL;
294 }
295
296 for (i = 0; i < dma->buf_count; i++) {
297 struct drm_buf *buf = dma->buflist[i];
298 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
299
300 buf_priv->in_use = hw_status++;
301 buf_priv->my_use_idx = my_idx;
302 my_idx += 4;
303
304 *buf_priv->in_use = I810_BUF_FREE;
305
306 buf_priv->map.offset = buf->bus_address;
307 buf_priv->map.size = buf->total;
308 buf_priv->map.type = _DRM_AGP;
309 buf_priv->map.flags = 0;
310 buf_priv->map.mtrr = 0;
311
312 drm_core_ioremap(&buf_priv->map, dev);
313 buf_priv->kernel_virtual = buf_priv->map.handle;
314
315 }
316 return 0;
317 }
318
319 static int i810_dma_initialize(struct drm_device *dev,
320 drm_i810_private_t *dev_priv,
321 drm_i810_init_t *init)
322 {
323 struct drm_map_list *r_list;
324 memset(dev_priv, 0, sizeof(drm_i810_private_t));
325
326 list_for_each_entry(r_list, &dev->maplist, head) {
327 if (r_list->map &&
328 r_list->map->type == _DRM_SHM &&
329 r_list->map->flags & _DRM_CONTAINS_LOCK) {
330 dev_priv->sarea_map = r_list->map;
331 break;
332 }
333 }
334 if (!dev_priv->sarea_map) {
335 dev->dev_private = (void *)dev_priv;
336 i810_dma_cleanup(dev);
337 DRM_ERROR("can not find sarea!\n");
338 return -EINVAL;
339 }
340 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
341 if (!dev_priv->mmio_map) {
342 dev->dev_private = (void *)dev_priv;
343 i810_dma_cleanup(dev);
344 DRM_ERROR("can not find mmio map!\n");
345 return -EINVAL;
346 }
347 dev->agp_buffer_token = init->buffers_offset;
348 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
349 if (!dev->agp_buffer_map) {
350 dev->dev_private = (void *)dev_priv;
351 i810_dma_cleanup(dev);
352 DRM_ERROR("can not find dma buffer map!\n");
353 return -EINVAL;
354 }
355
356 dev_priv->sarea_priv = (drm_i810_sarea_t *)
357 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
358
359 dev_priv->ring.Start = init->ring_start;
360 dev_priv->ring.End = init->ring_end;
361 dev_priv->ring.Size = init->ring_size;
362
363 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
364 dev_priv->ring.map.size = init->ring_size;
365 dev_priv->ring.map.type = _DRM_AGP;
366 dev_priv->ring.map.flags = 0;
367 dev_priv->ring.map.mtrr = 0;
368
369 drm_core_ioremap(&dev_priv->ring.map, dev);
370
371 if (dev_priv->ring.map.handle == NULL) {
372 dev->dev_private = (void *)dev_priv;
373 i810_dma_cleanup(dev);
374 DRM_ERROR("can not ioremap virtual address for"
375 " ring buffer\n");
376 return -ENOMEM;
377 }
378
379 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
380
381 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
382
383 dev_priv->w = init->w;
384 dev_priv->h = init->h;
385 dev_priv->pitch = init->pitch;
386 dev_priv->back_offset = init->back_offset;
387 dev_priv->depth_offset = init->depth_offset;
388 dev_priv->front_offset = init->front_offset;
389
390 dev_priv->overlay_offset = init->overlay_offset;
391 dev_priv->overlay_physical = init->overlay_physical;
392
393 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
394 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
395 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
396
397 /* Program Hardware Status Page */
398 dev_priv->hw_status_page =
399 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
400 &dev_priv->dma_status_page);
401 if (!dev_priv->hw_status_page) {
402 dev->dev_private = (void *)dev_priv;
403 i810_dma_cleanup(dev);
404 DRM_ERROR("Can not allocate hardware status page\n");
405 return -ENOMEM;
406 }
407 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
408 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
409
410 I810_WRITE(0x02080, dev_priv->dma_status_page);
411 DRM_DEBUG("Enabled hardware status page\n");
412
413 /* Now we need to init our freelist */
414 if (i810_freelist_init(dev, dev_priv) != 0) {
415 dev->dev_private = (void *)dev_priv;
416 i810_dma_cleanup(dev);
417 DRM_ERROR("Not enough space in the status page for"
418 " the freelist\n");
419 return -ENOMEM;
420 }
421 dev->dev_private = (void *)dev_priv;
422
423 return 0;
424 }
425
426 static int i810_dma_init(struct drm_device *dev, void *data,
427 struct drm_file *file_priv)
428 {
429 drm_i810_private_t *dev_priv;
430 drm_i810_init_t *init = data;
431 int retcode = 0;
432
433 switch (init->func) {
434 case I810_INIT_DMA_1_4:
435 DRM_INFO("Using v1.4 init.\n");
436 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
437 if (dev_priv == NULL)
438 return -ENOMEM;
439 retcode = i810_dma_initialize(dev, dev_priv, init);
440 break;
441
442 case I810_CLEANUP_DMA:
443 DRM_INFO("DMA Cleanup\n");
444 retcode = i810_dma_cleanup(dev);
445 break;
446 default:
447 return -EINVAL;
448 }
449
450 return retcode;
451 }
452
453 /* Most efficient way to verify state for the i810 is as it is
454 * emitted. Non-conformant state is silently dropped.
455 *
456 * Use 'volatile' & local var tmp to force the emitted values to be
457 * identical to the verified ones.
458 */
459 static void i810EmitContextVerified(struct drm_device *dev,
460 volatile unsigned int *code)
461 {
462 drm_i810_private_t *dev_priv = dev->dev_private;
463 int i, j = 0;
464 unsigned int tmp;
465 RING_LOCALS;
466
467 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
468
469 OUT_RING(GFX_OP_COLOR_FACTOR);
470 OUT_RING(code[I810_CTXREG_CF1]);
471
472 OUT_RING(GFX_OP_STIPPLE);
473 OUT_RING(code[I810_CTXREG_ST1]);
474
475 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
476 tmp = code[i];
477
478 if ((tmp & (7 << 29)) == (3 << 29) &&
479 (tmp & (0x1f << 24)) < (0x1d << 24)) {
480 OUT_RING(tmp);
481 j++;
482 } else
483 printk("constext state dropped!!!\n");
484 }
485
486 if (j & 1)
487 OUT_RING(0);
488
489 ADVANCE_LP_RING();
490 }
491
492 static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
493 {
494 drm_i810_private_t *dev_priv = dev->dev_private;
495 int i, j = 0;
496 unsigned int tmp;
497 RING_LOCALS;
498
499 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
500
501 OUT_RING(GFX_OP_MAP_INFO);
502 OUT_RING(code[I810_TEXREG_MI1]);
503 OUT_RING(code[I810_TEXREG_MI2]);
504 OUT_RING(code[I810_TEXREG_MI3]);
505
506 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
507 tmp = code[i];
508
509 if ((tmp & (7 << 29)) == (3 << 29) &&
510 (tmp & (0x1f << 24)) < (0x1d << 24)) {
511 OUT_RING(tmp);
512 j++;
513 } else
514 printk("texture state dropped!!!\n");
515 }
516
517 if (j & 1)
518 OUT_RING(0);
519
520 ADVANCE_LP_RING();
521 }
522
523 /* Need to do some additional checking when setting the dest buffer.
524 */
525 static void i810EmitDestVerified(struct drm_device *dev,
526 volatile unsigned int *code)
527 {
528 drm_i810_private_t *dev_priv = dev->dev_private;
529 unsigned int tmp;
530 RING_LOCALS;
531
532 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
533
534 tmp = code[I810_DESTREG_DI1];
535 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
536 OUT_RING(CMD_OP_DESTBUFFER_INFO);
537 OUT_RING(tmp);
538 } else
539 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
540 tmp, dev_priv->front_di1, dev_priv->back_di1);
541
542 /* invarient:
543 */
544 OUT_RING(CMD_OP_Z_BUFFER_INFO);
545 OUT_RING(dev_priv->zi1);
546
547 OUT_RING(GFX_OP_DESTBUFFER_VARS);
548 OUT_RING(code[I810_DESTREG_DV1]);
549
550 OUT_RING(GFX_OP_DRAWRECT_INFO);
551 OUT_RING(code[I810_DESTREG_DR1]);
552 OUT_RING(code[I810_DESTREG_DR2]);
553 OUT_RING(code[I810_DESTREG_DR3]);
554 OUT_RING(code[I810_DESTREG_DR4]);
555 OUT_RING(0);
556
557 ADVANCE_LP_RING();
558 }
559
560 static void i810EmitState(struct drm_device *dev)
561 {
562 drm_i810_private_t *dev_priv = dev->dev_private;
563 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
564 unsigned int dirty = sarea_priv->dirty;
565
566 DRM_DEBUG("%x\n", dirty);
567
568 if (dirty & I810_UPLOAD_BUFFERS) {
569 i810EmitDestVerified(dev, sarea_priv->BufferState);
570 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
571 }
572
573 if (dirty & I810_UPLOAD_CTX) {
574 i810EmitContextVerified(dev, sarea_priv->ContextState);
575 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
576 }
577
578 if (dirty & I810_UPLOAD_TEX0) {
579 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
580 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
581 }
582
583 if (dirty & I810_UPLOAD_TEX1) {
584 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
585 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
586 }
587 }
588
589 /* need to verify
590 */
591 static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
592 unsigned int clear_color,
593 unsigned int clear_zval)
594 {
595 drm_i810_private_t *dev_priv = dev->dev_private;
596 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
597 int nbox = sarea_priv->nbox;
598 struct drm_clip_rect *pbox = sarea_priv->boxes;
599 int pitch = dev_priv->pitch;
600 int cpp = 2;
601 int i;
602 RING_LOCALS;
603
604 if (dev_priv->current_page == 1) {
605 unsigned int tmp = flags;
606
607 flags &= ~(I810_FRONT | I810_BACK);
608 if (tmp & I810_FRONT)
609 flags |= I810_BACK;
610 if (tmp & I810_BACK)
611 flags |= I810_FRONT;
612 }
613
614 i810_kernel_lost_context(dev);
615
616 if (nbox > I810_NR_SAREA_CLIPRECTS)
617 nbox = I810_NR_SAREA_CLIPRECTS;
618
619 for (i = 0; i < nbox; i++, pbox++) {
620 unsigned int x = pbox->x1;
621 unsigned int y = pbox->y1;
622 unsigned int width = (pbox->x2 - x) * cpp;
623 unsigned int height = pbox->y2 - y;
624 unsigned int start = y * pitch + x * cpp;
625
626 if (pbox->x1 > pbox->x2 ||
627 pbox->y1 > pbox->y2 ||
628 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
629 continue;
630
631 if (flags & I810_FRONT) {
632 BEGIN_LP_RING(6);
633 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
634 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
635 OUT_RING((height << 16) | width);
636 OUT_RING(start);
637 OUT_RING(clear_color);
638 OUT_RING(0);
639 ADVANCE_LP_RING();
640 }
641
642 if (flags & I810_BACK) {
643 BEGIN_LP_RING(6);
644 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
645 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
646 OUT_RING((height << 16) | width);
647 OUT_RING(dev_priv->back_offset + start);
648 OUT_RING(clear_color);
649 OUT_RING(0);
650 ADVANCE_LP_RING();
651 }
652
653 if (flags & I810_DEPTH) {
654 BEGIN_LP_RING(6);
655 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
656 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
657 OUT_RING((height << 16) | width);
658 OUT_RING(dev_priv->depth_offset + start);
659 OUT_RING(clear_zval);
660 OUT_RING(0);
661 ADVANCE_LP_RING();
662 }
663 }
664 }
665
666 static void i810_dma_dispatch_swap(struct drm_device *dev)
667 {
668 drm_i810_private_t *dev_priv = dev->dev_private;
669 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
670 int nbox = sarea_priv->nbox;
671 struct drm_clip_rect *pbox = sarea_priv->boxes;
672 int pitch = dev_priv->pitch;
673 int cpp = 2;
674 int i;
675 RING_LOCALS;
676
677 DRM_DEBUG("swapbuffers\n");
678
679 i810_kernel_lost_context(dev);
680
681 if (nbox > I810_NR_SAREA_CLIPRECTS)
682 nbox = I810_NR_SAREA_CLIPRECTS;
683
684 for (i = 0; i < nbox; i++, pbox++) {
685 unsigned int w = pbox->x2 - pbox->x1;
686 unsigned int h = pbox->y2 - pbox->y1;
687 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
688 unsigned int start = dst;
689
690 if (pbox->x1 > pbox->x2 ||
691 pbox->y1 > pbox->y2 ||
692 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
693 continue;
694
695 BEGIN_LP_RING(6);
696 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
697 OUT_RING(pitch | (0xCC << 16));
698 OUT_RING((h << 16) | (w * cpp));
699 if (dev_priv->current_page == 0)
700 OUT_RING(dev_priv->front_offset + start);
701 else
702 OUT_RING(dev_priv->back_offset + start);
703 OUT_RING(pitch);
704 if (dev_priv->current_page == 0)
705 OUT_RING(dev_priv->back_offset + start);
706 else
707 OUT_RING(dev_priv->front_offset + start);
708 ADVANCE_LP_RING();
709 }
710 }
711
712 static void i810_dma_dispatch_vertex(struct drm_device *dev,
713 struct drm_buf *buf, int discard, int used)
714 {
715 drm_i810_private_t *dev_priv = dev->dev_private;
716 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
717 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
718 struct drm_clip_rect *box = sarea_priv->boxes;
719 int nbox = sarea_priv->nbox;
720 unsigned long address = (unsigned long)buf->bus_address;
721 unsigned long start = address - dev->agp->base;
722 int i = 0;
723 RING_LOCALS;
724
725 i810_kernel_lost_context(dev);
726
727 if (nbox > I810_NR_SAREA_CLIPRECTS)
728 nbox = I810_NR_SAREA_CLIPRECTS;
729
730 if (used > 4 * 1024)
731 used = 0;
732
733 if (sarea_priv->dirty)
734 i810EmitState(dev);
735
736 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
737 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
738
739 *(u32 *) buf_priv->kernel_virtual =
740 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
741
742 if (used & 4) {
743 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
744 used += 4;
745 }
746
747 i810_unmap_buffer(buf);
748 }
749
750 if (used) {
751 do {
752 if (i < nbox) {
753 BEGIN_LP_RING(4);
754 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
755 SC_ENABLE);
756 OUT_RING(GFX_OP_SCISSOR_INFO);
757 OUT_RING(box[i].x1 | (box[i].y1 << 16));
758 OUT_RING((box[i].x2 -
759 1) | ((box[i].y2 - 1) << 16));
760 ADVANCE_LP_RING();
761 }
762
763 BEGIN_LP_RING(4);
764 OUT_RING(CMD_OP_BATCH_BUFFER);
765 OUT_RING(start | BB1_PROTECTED);
766 OUT_RING(start + used - 4);
767 OUT_RING(0);
768 ADVANCE_LP_RING();
769
770 } while (++i < nbox);
771 }
772
773 if (discard) {
774 dev_priv->counter++;
775
776 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
777 I810_BUF_HARDWARE);
778
779 BEGIN_LP_RING(8);
780 OUT_RING(CMD_STORE_DWORD_IDX);
781 OUT_RING(20);
782 OUT_RING(dev_priv->counter);
783 OUT_RING(CMD_STORE_DWORD_IDX);
784 OUT_RING(buf_priv->my_use_idx);
785 OUT_RING(I810_BUF_FREE);
786 OUT_RING(CMD_REPORT_HEAD);
787 OUT_RING(0);
788 ADVANCE_LP_RING();
789 }
790 }
791
792 static void i810_dma_dispatch_flip(struct drm_device *dev)
793 {
794 drm_i810_private_t *dev_priv = dev->dev_private;
795 int pitch = dev_priv->pitch;
796 RING_LOCALS;
797
798 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
799 dev_priv->current_page,
800 dev_priv->sarea_priv->pf_current_page);
801
802 i810_kernel_lost_context(dev);
803
804 BEGIN_LP_RING(2);
805 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
806 OUT_RING(0);
807 ADVANCE_LP_RING();
808
809 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
810 /* On i815 at least ASYNC is buggy */
811 /* pitch<<5 is from 11.2.8 p158,
812 its the pitch / 8 then left shifted 8,
813 so (pitch >> 3) << 8 */
814 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
815 if (dev_priv->current_page == 0) {
816 OUT_RING(dev_priv->back_offset);
817 dev_priv->current_page = 1;
818 } else {
819 OUT_RING(dev_priv->front_offset);
820 dev_priv->current_page = 0;
821 }
822 OUT_RING(0);
823 ADVANCE_LP_RING();
824
825 BEGIN_LP_RING(2);
826 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
827 OUT_RING(0);
828 ADVANCE_LP_RING();
829
830 /* Increment the frame counter. The client-side 3D driver must
831 * throttle the framerate by waiting for this value before
832 * performing the swapbuffer ioctl.
833 */
834 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
835
836 }
837
838 static void i810_dma_quiescent(struct drm_device *dev)
839 {
840 drm_i810_private_t *dev_priv = dev->dev_private;
841 RING_LOCALS;
842
843 i810_kernel_lost_context(dev);
844
845 BEGIN_LP_RING(4);
846 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
847 OUT_RING(CMD_REPORT_HEAD);
848 OUT_RING(0);
849 OUT_RING(0);
850 ADVANCE_LP_RING();
851
852 i810_wait_ring(dev, dev_priv->ring.Size - 8);
853 }
854
855 static int i810_flush_queue(struct drm_device *dev)
856 {
857 drm_i810_private_t *dev_priv = dev->dev_private;
858 struct drm_device_dma *dma = dev->dma;
859 int i, ret = 0;
860 RING_LOCALS;
861
862 i810_kernel_lost_context(dev);
863
864 BEGIN_LP_RING(2);
865 OUT_RING(CMD_REPORT_HEAD);
866 OUT_RING(0);
867 ADVANCE_LP_RING();
868
869 i810_wait_ring(dev, dev_priv->ring.Size - 8);
870
871 for (i = 0; i < dma->buf_count; i++) {
872 struct drm_buf *buf = dma->buflist[i];
873 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
874
875 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
876 I810_BUF_FREE);
877
878 if (used == I810_BUF_HARDWARE)
879 DRM_DEBUG("reclaimed from HARDWARE\n");
880 if (used == I810_BUF_CLIENT)
881 DRM_DEBUG("still on client\n");
882 }
883
884 return ret;
885 }
886
887 /* Must be called with the lock held */
888 static void i810_reclaim_buffers(struct drm_device *dev,
889 struct drm_file *file_priv)
890 {
891 struct drm_device_dma *dma = dev->dma;
892 int i;
893
894 if (!dma)
895 return;
896 if (!dev->dev_private)
897 return;
898 if (!dma->buflist)
899 return;
900
901 i810_flush_queue(dev);
902
903 for (i = 0; i < dma->buf_count; i++) {
904 struct drm_buf *buf = dma->buflist[i];
905 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
906
907 if (buf->file_priv == file_priv && buf_priv) {
908 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
909 I810_BUF_FREE);
910
911 if (used == I810_BUF_CLIENT)
912 DRM_DEBUG("reclaimed from client\n");
913 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
914 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
915 }
916 }
917 }
918
919 static int i810_flush_ioctl(struct drm_device *dev, void *data,
920 struct drm_file *file_priv)
921 {
922 LOCK_TEST_WITH_RETURN(dev, file_priv);
923
924 i810_flush_queue(dev);
925 return 0;
926 }
927
928 static int i810_dma_vertex(struct drm_device *dev, void *data,
929 struct drm_file *file_priv)
930 {
931 struct drm_device_dma *dma = dev->dma;
932 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
933 u32 *hw_status = dev_priv->hw_status_page;
934 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
935 dev_priv->sarea_priv;
936 drm_i810_vertex_t *vertex = data;
937
938 LOCK_TEST_WITH_RETURN(dev, file_priv);
939
940 DRM_DEBUG("idx %d used %d discard %d\n",
941 vertex->idx, vertex->used, vertex->discard);
942
943 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
944 return -EINVAL;
945
946 i810_dma_dispatch_vertex(dev,
947 dma->buflist[vertex->idx],
948 vertex->discard, vertex->used);
949
950 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
951 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
952 sarea_priv->last_enqueue = dev_priv->counter - 1;
953 sarea_priv->last_dispatch = (int)hw_status[5];
954
955 return 0;
956 }
957
958 static int i810_clear_bufs(struct drm_device *dev, void *data,
959 struct drm_file *file_priv)
960 {
961 drm_i810_clear_t *clear = data;
962
963 LOCK_TEST_WITH_RETURN(dev, file_priv);
964
965 /* GH: Someone's doing nasty things... */
966 if (!dev->dev_private)
967 return -EINVAL;
968
969 i810_dma_dispatch_clear(dev, clear->flags,
970 clear->clear_color, clear->clear_depth);
971 return 0;
972 }
973
974 static int i810_swap_bufs(struct drm_device *dev, void *data,
975 struct drm_file *file_priv)
976 {
977 DRM_DEBUG("\n");
978
979 LOCK_TEST_WITH_RETURN(dev, file_priv);
980
981 i810_dma_dispatch_swap(dev);
982 return 0;
983 }
984
985 static int i810_getage(struct drm_device *dev, void *data,
986 struct drm_file *file_priv)
987 {
988 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
989 u32 *hw_status = dev_priv->hw_status_page;
990 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
991 dev_priv->sarea_priv;
992
993 sarea_priv->last_dispatch = (int)hw_status[5];
994 return 0;
995 }
996
997 static int i810_getbuf(struct drm_device *dev, void *data,
998 struct drm_file *file_priv)
999 {
1000 int retcode = 0;
1001 drm_i810_dma_t *d = data;
1002 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1003 u32 *hw_status = dev_priv->hw_status_page;
1004 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1005 dev_priv->sarea_priv;
1006
1007 LOCK_TEST_WITH_RETURN(dev, file_priv);
1008
1009 d->granted = 0;
1010
1011 retcode = i810_dma_get_buffer(dev, d, file_priv);
1012
1013 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
1014 task_pid_nr(current), retcode, d->granted);
1015
1016 sarea_priv->last_dispatch = (int)hw_status[5];
1017
1018 return retcode;
1019 }
1020
1021 static int i810_copybuf(struct drm_device *dev, void *data,
1022 struct drm_file *file_priv)
1023 {
1024 /* Never copy - 2.4.x doesn't need it */
1025 return 0;
1026 }
1027
1028 static int i810_docopy(struct drm_device *dev, void *data,
1029 struct drm_file *file_priv)
1030 {
1031 /* Never copy - 2.4.x doesn't need it */
1032 return 0;
1033 }
1034
1035 static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1036 unsigned int last_render)
1037 {
1038 drm_i810_private_t *dev_priv = dev->dev_private;
1039 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1040 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1041 unsigned long address = (unsigned long)buf->bus_address;
1042 unsigned long start = address - dev->agp->base;
1043 int u;
1044 RING_LOCALS;
1045
1046 i810_kernel_lost_context(dev);
1047
1048 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1049 if (u != I810_BUF_CLIENT)
1050 DRM_DEBUG("MC found buffer that isn't mine!\n");
1051
1052 if (used > 4 * 1024)
1053 used = 0;
1054
1055 sarea_priv->dirty = 0x7f;
1056
1057 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1058
1059 dev_priv->counter++;
1060 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1061 DRM_DEBUG("start : %lx\n", start);
1062 DRM_DEBUG("used : %d\n", used);
1063 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1064
1065 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1066 if (used & 4) {
1067 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1068 used += 4;
1069 }
1070
1071 i810_unmap_buffer(buf);
1072 }
1073 BEGIN_LP_RING(4);
1074 OUT_RING(CMD_OP_BATCH_BUFFER);
1075 OUT_RING(start | BB1_PROTECTED);
1076 OUT_RING(start + used - 4);
1077 OUT_RING(0);
1078 ADVANCE_LP_RING();
1079
1080 BEGIN_LP_RING(8);
1081 OUT_RING(CMD_STORE_DWORD_IDX);
1082 OUT_RING(buf_priv->my_use_idx);
1083 OUT_RING(I810_BUF_FREE);
1084 OUT_RING(0);
1085
1086 OUT_RING(CMD_STORE_DWORD_IDX);
1087 OUT_RING(16);
1088 OUT_RING(last_render);
1089 OUT_RING(0);
1090 ADVANCE_LP_RING();
1091 }
1092
1093 static int i810_dma_mc(struct drm_device *dev, void *data,
1094 struct drm_file *file_priv)
1095 {
1096 struct drm_device_dma *dma = dev->dma;
1097 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1098 u32 *hw_status = dev_priv->hw_status_page;
1099 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1100 dev_priv->sarea_priv;
1101 drm_i810_mc_t *mc = data;
1102
1103 LOCK_TEST_WITH_RETURN(dev, file_priv);
1104
1105 if (mc->idx >= dma->buf_count || mc->idx < 0)
1106 return -EINVAL;
1107
1108 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1109 mc->last_render);
1110
1111 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1112 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
1113 sarea_priv->last_enqueue = dev_priv->counter - 1;
1114 sarea_priv->last_dispatch = (int)hw_status[5];
1115
1116 return 0;
1117 }
1118
1119 static int i810_rstatus(struct drm_device *dev, void *data,
1120 struct drm_file *file_priv)
1121 {
1122 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1123
1124 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1125 }
1126
1127 static int i810_ov0_info(struct drm_device *dev, void *data,
1128 struct drm_file *file_priv)
1129 {
1130 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1131 drm_i810_overlay_t *ov = data;
1132
1133 ov->offset = dev_priv->overlay_offset;
1134 ov->physical = dev_priv->overlay_physical;
1135
1136 return 0;
1137 }
1138
1139 static int i810_fstatus(struct drm_device *dev, void *data,
1140 struct drm_file *file_priv)
1141 {
1142 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1143
1144 LOCK_TEST_WITH_RETURN(dev, file_priv);
1145 return I810_READ(0x30008);
1146 }
1147
1148 static int i810_ov0_flip(struct drm_device *dev, void *data,
1149 struct drm_file *file_priv)
1150 {
1151 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1152
1153 LOCK_TEST_WITH_RETURN(dev, file_priv);
1154
1155 /* Tell the overlay to update */
1156 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1157
1158 return 0;
1159 }
1160
1161 /* Not sure why this isn't set all the time:
1162 */
1163 static void i810_do_init_pageflip(struct drm_device *dev)
1164 {
1165 drm_i810_private_t *dev_priv = dev->dev_private;
1166
1167 DRM_DEBUG("\n");
1168 dev_priv->page_flipping = 1;
1169 dev_priv->current_page = 0;
1170 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1171 }
1172
1173 static int i810_do_cleanup_pageflip(struct drm_device *dev)
1174 {
1175 drm_i810_private_t *dev_priv = dev->dev_private;
1176
1177 DRM_DEBUG("\n");
1178 if (dev_priv->current_page != 0)
1179 i810_dma_dispatch_flip(dev);
1180
1181 dev_priv->page_flipping = 0;
1182 return 0;
1183 }
1184
1185 static int i810_flip_bufs(struct drm_device *dev, void *data,
1186 struct drm_file *file_priv)
1187 {
1188 drm_i810_private_t *dev_priv = dev->dev_private;
1189
1190 DRM_DEBUG("\n");
1191
1192 LOCK_TEST_WITH_RETURN(dev, file_priv);
1193
1194 if (!dev_priv->page_flipping)
1195 i810_do_init_pageflip(dev);
1196
1197 i810_dma_dispatch_flip(dev);
1198 return 0;
1199 }
1200
1201 int i810_driver_load(struct drm_device *dev, unsigned long flags)
1202 {
1203 /* i810 has 4 more counters */
1204 dev->counters += 4;
1205 dev->types[6] = _DRM_STAT_IRQ;
1206 dev->types[7] = _DRM_STAT_PRIMARY;
1207 dev->types[8] = _DRM_STAT_SECONDARY;
1208 dev->types[9] = _DRM_STAT_DMA;
1209
1210 pci_set_master(dev->pdev);
1211
1212 return 0;
1213 }
1214
1215 void i810_driver_lastclose(struct drm_device *dev)
1216 {
1217 i810_dma_cleanup(dev);
1218 }
1219
1220 void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1221 {
1222 if (dev->dev_private) {
1223 drm_i810_private_t *dev_priv = dev->dev_private;
1224 if (dev_priv->page_flipping)
1225 i810_do_cleanup_pageflip(dev);
1226 }
1227 }
1228
1229 void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
1230 struct drm_file *file_priv)
1231 {
1232 i810_reclaim_buffers(dev, file_priv);
1233 }
1234
1235 int i810_driver_dma_quiescent(struct drm_device *dev)
1236 {
1237 i810_dma_quiescent(dev);
1238 return 0;
1239 }
1240
1241 struct drm_ioctl_desc i810_ioctls[] = {
1242 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1243 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1244 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1245 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1246 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1247 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1248 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1249 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1250 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1251 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1252 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1253 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1254 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1255 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1256 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1257 };
1258
1259 int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1260
1261 /**
1262 * Determine if the device really is AGP or not.
1263 *
1264 * All Intel graphics chipsets are treated as AGP, even if they are really
1265 * PCI-e.
1266 *
1267 * \param dev The device to be tested.
1268 *
1269 * \returns
1270 * A value of 1 is always retured to indictate every i810 is AGP.
1271 */
1272 int i810_driver_device_is_agp(struct drm_device *dev)
1273 {
1274 return 1;
1275 }