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[mirror_ubuntu-hirsute-kernel.git] / drivers / gpu / drm / i915 / display / intel_bios.c
1 /*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include <drm/drm_dp_helper.h>
29
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
33
34 #include "i915_drv.h"
35 #include <linux/dmi.h>
36
37 #define _INTEL_BIOS_PRIVATE
38 #include "intel_vbt_defs.h"
39
40 /**
41 * DOC: Video BIOS Table (VBT)
42 *
43 * The Video BIOS Table, or VBT, provides platform and board specific
44 * configuration information to the driver that is not discoverable or available
45 * through other means. The configuration is mostly related to display
46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
47 * the PCI ROM.
48 *
49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
51 * contain the actual configuration information. The VBT Header, and thus the
52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
53 * BDB Header. The data blocks are concatenated after the BDB Header. The data
54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
55 * data. (Block 53, the MIPI Sequence Block is an exception.)
56 *
57 * The driver parses the VBT during load. The relevant information is stored in
58 * driver private data for ease of use, and the actual VBT is not read after
59 * that.
60 */
61
62 /* Wrapper for VBT child device config */
63 struct display_device_data {
64 struct child_device_config child;
65 struct dsc_compression_parameters_entry *dsc;
66 struct list_head node;
67 };
68
69 #define SLAVE_ADDR1 0x70
70 #define SLAVE_ADDR2 0x72
71
72 /* Get BDB block size given a pointer to Block ID. */
73 static u32 _get_blocksize(const u8 *block_base)
74 {
75 /* The MIPI Sequence Block v3+ has a separate size field. */
76 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
77 return *((const u32 *)(block_base + 4));
78 else
79 return *((const u16 *)(block_base + 1));
80 }
81
82 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
83 static u32 get_blocksize(const void *block_data)
84 {
85 return _get_blocksize(block_data - 3);
86 }
87
88 static const void *
89 find_section(const void *_bdb, enum bdb_block_id section_id)
90 {
91 const struct bdb_header *bdb = _bdb;
92 const u8 *base = _bdb;
93 int index = 0;
94 u32 total, current_size;
95 enum bdb_block_id current_id;
96
97 /* skip to first section */
98 index += bdb->header_size;
99 total = bdb->bdb_size;
100
101 /* walk the sections looking for section_id */
102 while (index + 3 < total) {
103 current_id = *(base + index);
104 current_size = _get_blocksize(base + index);
105 index += 3;
106
107 if (index + current_size > total)
108 return NULL;
109
110 if (current_id == section_id)
111 return base + index;
112
113 index += current_size;
114 }
115
116 return NULL;
117 }
118
119 static void
120 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
121 const struct lvds_dvo_timing *dvo_timing)
122 {
123 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
124 dvo_timing->hactive_lo;
125 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
126 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
127 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
128 ((dvo_timing->hsync_pulse_width_hi << 8) |
129 dvo_timing->hsync_pulse_width_lo);
130 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
131 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
132
133 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
134 dvo_timing->vactive_lo;
135 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
136 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
137 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
138 ((dvo_timing->vsync_pulse_width_hi << 4) |
139 dvo_timing->vsync_pulse_width_lo);
140 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
141 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
142 panel_fixed_mode->clock = dvo_timing->clock * 10;
143 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
144
145 if (dvo_timing->hsync_positive)
146 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
147 else
148 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
149
150 if (dvo_timing->vsync_positive)
151 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
152 else
153 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
154
155 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
156 dvo_timing->himage_lo;
157 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
158 dvo_timing->vimage_lo;
159
160 /* Some VBTs have bogus h/vtotal values */
161 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
162 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
163 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
164 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
165
166 drm_mode_set_name(panel_fixed_mode);
167 }
168
169 static const struct lvds_dvo_timing *
170 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
171 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
172 int index)
173 {
174 /*
175 * the size of fp_timing varies on the different platform.
176 * So calculate the DVO timing relative offset in LVDS data
177 * entry to get the DVO timing entry
178 */
179
180 int lfp_data_size =
181 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
182 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
183 int dvo_timing_offset =
184 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
185 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
186 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
187
188 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
189 }
190
191 /* get lvds_fp_timing entry
192 * this function may return NULL if the corresponding entry is invalid
193 */
194 static const struct lvds_fp_timing *
195 get_lvds_fp_timing(const struct bdb_header *bdb,
196 const struct bdb_lvds_lfp_data *data,
197 const struct bdb_lvds_lfp_data_ptrs *ptrs,
198 int index)
199 {
200 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
201 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
202 size_t ofs;
203
204 if (index >= ARRAY_SIZE(ptrs->ptr))
205 return NULL;
206 ofs = ptrs->ptr[index].fp_timing_offset;
207 if (ofs < data_ofs ||
208 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
209 return NULL;
210 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
211 }
212
213 /* Parse general panel options */
214 static void
215 parse_panel_options(struct drm_i915_private *dev_priv,
216 const struct bdb_header *bdb)
217 {
218 const struct bdb_lvds_options *lvds_options;
219 int panel_type;
220 int drrs_mode;
221 int ret;
222
223 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
224 if (!lvds_options)
225 return;
226
227 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
228
229 ret = intel_opregion_get_panel_type(dev_priv);
230 if (ret >= 0) {
231 drm_WARN_ON(&dev_priv->drm, ret > 0xf);
232 panel_type = ret;
233 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
234 panel_type);
235 } else {
236 if (lvds_options->panel_type > 0xf) {
237 drm_dbg_kms(&dev_priv->drm,
238 "Invalid VBT panel type 0x%x\n",
239 lvds_options->panel_type);
240 return;
241 }
242 panel_type = lvds_options->panel_type;
243 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
244 panel_type);
245 }
246
247 dev_priv->vbt.panel_type = panel_type;
248
249 drrs_mode = (lvds_options->dps_panel_type_bits
250 >> (panel_type * 2)) & MODE_MASK;
251 /*
252 * VBT has static DRRS = 0 and seamless DRRS = 2.
253 * The below piece of code is required to adjust vbt.drrs_type
254 * to match the enum drrs_support_type.
255 */
256 switch (drrs_mode) {
257 case 0:
258 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
259 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
260 break;
261 case 2:
262 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
263 drm_dbg_kms(&dev_priv->drm,
264 "DRRS supported mode is seamless\n");
265 break;
266 default:
267 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
268 drm_dbg_kms(&dev_priv->drm,
269 "DRRS not supported (VBT input)\n");
270 break;
271 }
272 }
273
274 /* Try to find integrated panel timing data */
275 static void
276 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
277 const struct bdb_header *bdb)
278 {
279 const struct bdb_lvds_lfp_data *lvds_lfp_data;
280 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
281 const struct lvds_dvo_timing *panel_dvo_timing;
282 const struct lvds_fp_timing *fp_timing;
283 struct drm_display_mode *panel_fixed_mode;
284 int panel_type = dev_priv->vbt.panel_type;
285
286 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
287 if (!lvds_lfp_data)
288 return;
289
290 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
291 if (!lvds_lfp_data_ptrs)
292 return;
293
294 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
295 lvds_lfp_data_ptrs,
296 panel_type);
297
298 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
299 if (!panel_fixed_mode)
300 return;
301
302 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
303
304 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
305
306 drm_dbg_kms(&dev_priv->drm,
307 "Found panel mode in BIOS VBT legacy lfp table:\n");
308 drm_mode_debug_printmodeline(panel_fixed_mode);
309
310 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
311 lvds_lfp_data_ptrs,
312 panel_type);
313 if (fp_timing) {
314 /* check the resolution, just to be sure */
315 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
316 fp_timing->y_res == panel_fixed_mode->vdisplay) {
317 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
318 drm_dbg_kms(&dev_priv->drm,
319 "VBT initial LVDS value %x\n",
320 dev_priv->vbt.bios_lvds_val);
321 }
322 }
323 }
324
325 static void
326 parse_generic_dtd(struct drm_i915_private *dev_priv,
327 const struct bdb_header *bdb)
328 {
329 const struct bdb_generic_dtd *generic_dtd;
330 const struct generic_dtd_entry *dtd;
331 struct drm_display_mode *panel_fixed_mode;
332 int num_dtd;
333
334 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
335 if (!generic_dtd)
336 return;
337
338 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
339 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
340 generic_dtd->gdtd_size);
341 return;
342 } else if (generic_dtd->gdtd_size !=
343 sizeof(struct generic_dtd_entry)) {
344 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
345 generic_dtd->gdtd_size);
346 /* DTD has unknown fields, but keep going */
347 }
348
349 num_dtd = (get_blocksize(generic_dtd) -
350 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
351 if (dev_priv->vbt.panel_type >= num_dtd) {
352 drm_err(&dev_priv->drm,
353 "Panel type %d not found in table of %d DTD's\n",
354 dev_priv->vbt.panel_type, num_dtd);
355 return;
356 }
357
358 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
359
360 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
361 if (!panel_fixed_mode)
362 return;
363
364 panel_fixed_mode->hdisplay = dtd->hactive;
365 panel_fixed_mode->hsync_start =
366 panel_fixed_mode->hdisplay + dtd->hfront_porch;
367 panel_fixed_mode->hsync_end =
368 panel_fixed_mode->hsync_start + dtd->hsync;
369 panel_fixed_mode->htotal =
370 panel_fixed_mode->hdisplay + dtd->hblank;
371
372 panel_fixed_mode->vdisplay = dtd->vactive;
373 panel_fixed_mode->vsync_start =
374 panel_fixed_mode->vdisplay + dtd->vfront_porch;
375 panel_fixed_mode->vsync_end =
376 panel_fixed_mode->vsync_start + dtd->vsync;
377 panel_fixed_mode->vtotal =
378 panel_fixed_mode->vdisplay + dtd->vblank;
379
380 panel_fixed_mode->clock = dtd->pixel_clock;
381 panel_fixed_mode->width_mm = dtd->width_mm;
382 panel_fixed_mode->height_mm = dtd->height_mm;
383
384 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
385 drm_mode_set_name(panel_fixed_mode);
386
387 if (dtd->hsync_positive_polarity)
388 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
389 else
390 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
391
392 if (dtd->vsync_positive_polarity)
393 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
394 else
395 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
396
397 drm_dbg_kms(&dev_priv->drm,
398 "Found panel mode in BIOS VBT generic dtd table:\n");
399 drm_mode_debug_printmodeline(panel_fixed_mode);
400
401 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
402 }
403
404 static void
405 parse_panel_dtd(struct drm_i915_private *dev_priv,
406 const struct bdb_header *bdb)
407 {
408 /*
409 * Older VBTs provided provided DTD information for internal displays
410 * through the "LFP panel DTD" block (42). As of VBT revision 229,
411 * that block is now deprecated and DTD information should be provided
412 * via a newer "generic DTD" block (58). Just to be safe, we'll
413 * try the new generic DTD block first on VBT >= 229, but still fall
414 * back to trying the old LFP block if that fails.
415 */
416 if (bdb->version >= 229)
417 parse_generic_dtd(dev_priv, bdb);
418 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
419 parse_lfp_panel_dtd(dev_priv, bdb);
420 }
421
422 static void
423 parse_lfp_backlight(struct drm_i915_private *dev_priv,
424 const struct bdb_header *bdb)
425 {
426 const struct bdb_lfp_backlight_data *backlight_data;
427 const struct lfp_backlight_data_entry *entry;
428 int panel_type = dev_priv->vbt.panel_type;
429 u16 level;
430
431 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
432 if (!backlight_data)
433 return;
434
435 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
436 drm_dbg_kms(&dev_priv->drm,
437 "Unsupported backlight data entry size %u\n",
438 backlight_data->entry_size);
439 return;
440 }
441
442 entry = &backlight_data->data[panel_type];
443
444 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
445 if (!dev_priv->vbt.backlight.present) {
446 drm_dbg_kms(&dev_priv->drm,
447 "PWM backlight not present in VBT (type %u)\n",
448 entry->type);
449 return;
450 }
451
452 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
453 if (bdb->version >= 191 &&
454 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
455 const struct lfp_backlight_control_method *method;
456
457 method = &backlight_data->backlight_control[panel_type];
458 dev_priv->vbt.backlight.type = method->type;
459 dev_priv->vbt.backlight.controller = method->controller;
460 }
461
462 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
463 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
464
465 if (bdb->version >= 234) {
466 u16 min_level;
467 bool scale;
468
469 level = backlight_data->brightness_level[panel_type].level;
470 min_level = backlight_data->brightness_min_level[panel_type].level;
471
472 if (bdb->version >= 236)
473 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
474 else
475 scale = level > 255;
476
477 if (scale)
478 min_level = min_level / 255;
479
480 if (min_level > 255) {
481 drm_warn(&dev_priv->drm, "Brightness min level > 255\n");
482 level = 255;
483 }
484 dev_priv->vbt.backlight.min_brightness = min_level;
485 } else {
486 level = backlight_data->level[panel_type];
487 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
488 }
489
490 drm_dbg_kms(&dev_priv->drm,
491 "VBT backlight PWM modulation frequency %u Hz, "
492 "active %s, min brightness %u, level %u, controller %u\n",
493 dev_priv->vbt.backlight.pwm_freq_hz,
494 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
495 dev_priv->vbt.backlight.min_brightness,
496 level,
497 dev_priv->vbt.backlight.controller);
498 }
499
500 /* Try to find sdvo panel data */
501 static void
502 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
503 const struct bdb_header *bdb)
504 {
505 const struct bdb_sdvo_panel_dtds *dtds;
506 struct drm_display_mode *panel_fixed_mode;
507 int index;
508
509 index = dev_priv->params.vbt_sdvo_panel_type;
510 if (index == -2) {
511 drm_dbg_kms(&dev_priv->drm,
512 "Ignore SDVO panel mode from BIOS VBT tables.\n");
513 return;
514 }
515
516 if (index == -1) {
517 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
518
519 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
520 if (!sdvo_lvds_options)
521 return;
522
523 index = sdvo_lvds_options->panel_type;
524 }
525
526 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
527 if (!dtds)
528 return;
529
530 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
531 if (!panel_fixed_mode)
532 return;
533
534 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
535
536 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
537
538 drm_dbg_kms(&dev_priv->drm,
539 "Found SDVO panel mode in BIOS VBT tables:\n");
540 drm_mode_debug_printmodeline(panel_fixed_mode);
541 }
542
543 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
544 bool alternate)
545 {
546 switch (INTEL_GEN(dev_priv)) {
547 case 2:
548 return alternate ? 66667 : 48000;
549 case 3:
550 case 4:
551 return alternate ? 100000 : 96000;
552 default:
553 return alternate ? 100000 : 120000;
554 }
555 }
556
557 static void
558 parse_general_features(struct drm_i915_private *dev_priv,
559 const struct bdb_header *bdb)
560 {
561 const struct bdb_general_features *general;
562
563 general = find_section(bdb, BDB_GENERAL_FEATURES);
564 if (!general)
565 return;
566
567 dev_priv->vbt.int_tv_support = general->int_tv_support;
568 /* int_crt_support can't be trusted on earlier platforms */
569 if (bdb->version >= 155 &&
570 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
571 dev_priv->vbt.int_crt_support = general->int_crt_support;
572 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
573 dev_priv->vbt.lvds_ssc_freq =
574 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
575 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
576 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
577 if (bdb->version >= 181) {
578 dev_priv->vbt.orientation = general->rotate_180 ?
579 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
580 DRM_MODE_PANEL_ORIENTATION_NORMAL;
581 } else {
582 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
583 }
584 drm_dbg_kms(&dev_priv->drm,
585 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
586 dev_priv->vbt.int_tv_support,
587 dev_priv->vbt.int_crt_support,
588 dev_priv->vbt.lvds_use_ssc,
589 dev_priv->vbt.lvds_ssc_freq,
590 dev_priv->vbt.display_clock_mode,
591 dev_priv->vbt.fdi_rx_polarity_inverted);
592 }
593
594 static const struct child_device_config *
595 child_device_ptr(const struct bdb_general_definitions *defs, int i)
596 {
597 return (const void *) &defs->devices[i * defs->child_dev_size];
598 }
599
600 static void
601 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
602 {
603 struct sdvo_device_mapping *mapping;
604 const struct display_device_data *devdata;
605 const struct child_device_config *child;
606 int count = 0;
607
608 /*
609 * Only parse SDVO mappings on gens that could have SDVO. This isn't
610 * accurate and doesn't have to be, as long as it's not too strict.
611 */
612 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
613 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
614 return;
615 }
616
617 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
618 child = &devdata->child;
619
620 if (child->slave_addr != SLAVE_ADDR1 &&
621 child->slave_addr != SLAVE_ADDR2) {
622 /*
623 * If the slave address is neither 0x70 nor 0x72,
624 * it is not a SDVO device. Skip it.
625 */
626 continue;
627 }
628 if (child->dvo_port != DEVICE_PORT_DVOB &&
629 child->dvo_port != DEVICE_PORT_DVOC) {
630 /* skip the incorrect SDVO port */
631 drm_dbg_kms(&dev_priv->drm,
632 "Incorrect SDVO port. Skip it\n");
633 continue;
634 }
635 drm_dbg_kms(&dev_priv->drm,
636 "the SDVO device with slave addr %2x is found on"
637 " %s port\n",
638 child->slave_addr,
639 (child->dvo_port == DEVICE_PORT_DVOB) ?
640 "SDVOB" : "SDVOC");
641 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
642 if (!mapping->initialized) {
643 mapping->dvo_port = child->dvo_port;
644 mapping->slave_addr = child->slave_addr;
645 mapping->dvo_wiring = child->dvo_wiring;
646 mapping->ddc_pin = child->ddc_pin;
647 mapping->i2c_pin = child->i2c_pin;
648 mapping->initialized = 1;
649 drm_dbg_kms(&dev_priv->drm,
650 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
651 mapping->dvo_port, mapping->slave_addr,
652 mapping->dvo_wiring, mapping->ddc_pin,
653 mapping->i2c_pin);
654 } else {
655 drm_dbg_kms(&dev_priv->drm,
656 "Maybe one SDVO port is shared by "
657 "two SDVO device.\n");
658 }
659 if (child->slave2_addr) {
660 /* Maybe this is a SDVO device with multiple inputs */
661 /* And the mapping info is not added */
662 drm_dbg_kms(&dev_priv->drm,
663 "there exists the slave2_addr. Maybe this"
664 " is a SDVO device with multiple inputs.\n");
665 }
666 count++;
667 }
668
669 if (!count) {
670 /* No SDVO device info is found */
671 drm_dbg_kms(&dev_priv->drm,
672 "No SDVO device info is found in VBT\n");
673 }
674 }
675
676 static void
677 parse_driver_features(struct drm_i915_private *dev_priv,
678 const struct bdb_header *bdb)
679 {
680 const struct bdb_driver_features *driver;
681
682 driver = find_section(bdb, BDB_DRIVER_FEATURES);
683 if (!driver)
684 return;
685
686 if (INTEL_GEN(dev_priv) >= 5) {
687 /*
688 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
689 * to mean "eDP". The VBT spec doesn't agree with that
690 * interpretation, but real world VBTs seem to.
691 */
692 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
693 dev_priv->vbt.int_lvds_support = 0;
694 } else {
695 /*
696 * FIXME it's not clear which BDB version has the LVDS config
697 * bits defined. Revision history in the VBT spec says:
698 * "0.92 | Add two definitions for VBT value of LVDS Active
699 * Config (00b and 11b values defined) | 06/13/2005"
700 * but does not the specify the BDB version.
701 *
702 * So far version 134 (on i945gm) is the oldest VBT observed
703 * in the wild with the bits correctly populated. Version
704 * 108 (on i85x) does not have the bits correctly populated.
705 */
706 if (bdb->version >= 134 &&
707 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
708 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
709 dev_priv->vbt.int_lvds_support = 0;
710 }
711
712 if (bdb->version < 228) {
713 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
714 driver->drrs_enabled);
715 /*
716 * If DRRS is not supported, drrs_type has to be set to 0.
717 * This is because, VBT is configured in such a way that
718 * static DRRS is 0 and DRRS not supported is represented by
719 * driver->drrs_enabled=false
720 */
721 if (!driver->drrs_enabled)
722 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
723
724 dev_priv->vbt.psr.enable = driver->psr_enabled;
725 }
726 }
727
728 static void
729 parse_power_conservation_features(struct drm_i915_private *dev_priv,
730 const struct bdb_header *bdb)
731 {
732 const struct bdb_lfp_power *power;
733 u8 panel_type = dev_priv->vbt.panel_type;
734
735 if (bdb->version < 228)
736 return;
737
738 power = find_section(bdb, BDB_LFP_POWER);
739 if (!power)
740 return;
741
742 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
743
744 /*
745 * If DRRS is not supported, drrs_type has to be set to 0.
746 * This is because, VBT is configured in such a way that
747 * static DRRS is 0 and DRRS not supported is represented by
748 * power->drrs & BIT(panel_type)=false
749 */
750 if (!(power->drrs & BIT(panel_type)))
751 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
752
753 if (bdb->version >= 232)
754 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
755 }
756
757 static void
758 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
759 {
760 const struct bdb_edp *edp;
761 const struct edp_power_seq *edp_pps;
762 const struct edp_fast_link_params *edp_link_params;
763 int panel_type = dev_priv->vbt.panel_type;
764
765 edp = find_section(bdb, BDB_EDP);
766 if (!edp)
767 return;
768
769 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
770 case EDP_18BPP:
771 dev_priv->vbt.edp.bpp = 18;
772 break;
773 case EDP_24BPP:
774 dev_priv->vbt.edp.bpp = 24;
775 break;
776 case EDP_30BPP:
777 dev_priv->vbt.edp.bpp = 30;
778 break;
779 }
780
781 /* Get the eDP sequencing and link info */
782 edp_pps = &edp->power_seqs[panel_type];
783 edp_link_params = &edp->fast_link_params[panel_type];
784
785 dev_priv->vbt.edp.pps = *edp_pps;
786
787 switch (edp_link_params->rate) {
788 case EDP_RATE_1_62:
789 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
790 break;
791 case EDP_RATE_2_7:
792 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
793 break;
794 default:
795 drm_dbg_kms(&dev_priv->drm,
796 "VBT has unknown eDP link rate value %u\n",
797 edp_link_params->rate);
798 break;
799 }
800
801 switch (edp_link_params->lanes) {
802 case EDP_LANE_1:
803 dev_priv->vbt.edp.lanes = 1;
804 break;
805 case EDP_LANE_2:
806 dev_priv->vbt.edp.lanes = 2;
807 break;
808 case EDP_LANE_4:
809 dev_priv->vbt.edp.lanes = 4;
810 break;
811 default:
812 drm_dbg_kms(&dev_priv->drm,
813 "VBT has unknown eDP lane count value %u\n",
814 edp_link_params->lanes);
815 break;
816 }
817
818 switch (edp_link_params->preemphasis) {
819 case EDP_PREEMPHASIS_NONE:
820 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
821 break;
822 case EDP_PREEMPHASIS_3_5dB:
823 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
824 break;
825 case EDP_PREEMPHASIS_6dB:
826 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
827 break;
828 case EDP_PREEMPHASIS_9_5dB:
829 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
830 break;
831 default:
832 drm_dbg_kms(&dev_priv->drm,
833 "VBT has unknown eDP pre-emphasis value %u\n",
834 edp_link_params->preemphasis);
835 break;
836 }
837
838 switch (edp_link_params->vswing) {
839 case EDP_VSWING_0_4V:
840 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
841 break;
842 case EDP_VSWING_0_6V:
843 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
844 break;
845 case EDP_VSWING_0_8V:
846 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
847 break;
848 case EDP_VSWING_1_2V:
849 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
850 break;
851 default:
852 drm_dbg_kms(&dev_priv->drm,
853 "VBT has unknown eDP voltage swing value %u\n",
854 edp_link_params->vswing);
855 break;
856 }
857
858 if (bdb->version >= 173) {
859 u8 vswing;
860
861 /* Don't read from VBT if module parameter has valid value*/
862 if (dev_priv->params.edp_vswing) {
863 dev_priv->vbt.edp.low_vswing =
864 dev_priv->params.edp_vswing == 1;
865 } else {
866 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
867 dev_priv->vbt.edp.low_vswing = vswing == 0;
868 }
869 }
870 }
871
872 static void
873 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
874 {
875 const struct bdb_psr *psr;
876 const struct psr_table *psr_table;
877 int panel_type = dev_priv->vbt.panel_type;
878
879 psr = find_section(bdb, BDB_PSR);
880 if (!psr) {
881 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
882 return;
883 }
884
885 psr_table = &psr->psr_table[panel_type];
886
887 dev_priv->vbt.psr.full_link = psr_table->full_link;
888 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
889
890 /* Allowed VBT values goes from 0 to 15 */
891 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
892 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
893
894 switch (psr_table->lines_to_wait) {
895 case 0:
896 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
897 break;
898 case 1:
899 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
900 break;
901 case 2:
902 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
903 break;
904 case 3:
905 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
906 break;
907 default:
908 drm_dbg_kms(&dev_priv->drm,
909 "VBT has unknown PSR lines to wait %u\n",
910 psr_table->lines_to_wait);
911 break;
912 }
913
914 /*
915 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
916 * Old decimal value is wake up time in multiples of 100 us.
917 */
918 if (bdb->version >= 205 &&
919 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
920 INTEL_GEN(dev_priv) >= 10)) {
921 switch (psr_table->tp1_wakeup_time) {
922 case 0:
923 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
924 break;
925 case 1:
926 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
927 break;
928 case 3:
929 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
930 break;
931 default:
932 drm_dbg_kms(&dev_priv->drm,
933 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
934 psr_table->tp1_wakeup_time);
935 fallthrough;
936 case 2:
937 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
938 break;
939 }
940
941 switch (psr_table->tp2_tp3_wakeup_time) {
942 case 0:
943 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
944 break;
945 case 1:
946 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
947 break;
948 case 3:
949 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
950 break;
951 default:
952 drm_dbg_kms(&dev_priv->drm,
953 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
954 psr_table->tp2_tp3_wakeup_time);
955 fallthrough;
956 case 2:
957 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
958 break;
959 }
960 } else {
961 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
962 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
963 }
964
965 if (bdb->version >= 226) {
966 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
967
968 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
969 switch (wakeup_time) {
970 case 0:
971 wakeup_time = 500;
972 break;
973 case 1:
974 wakeup_time = 100;
975 break;
976 case 3:
977 wakeup_time = 50;
978 break;
979 default:
980 case 2:
981 wakeup_time = 2500;
982 break;
983 }
984 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
985 } else {
986 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
987 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
988 }
989 }
990
991 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
992 u16 version, enum port port)
993 {
994 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
995 dev_priv->vbt.dsi.bl_ports = BIT(port);
996 if (dev_priv->vbt.dsi.config->cabc_supported)
997 dev_priv->vbt.dsi.cabc_ports = BIT(port);
998
999 return;
1000 }
1001
1002 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
1003 case DL_DCS_PORT_A:
1004 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
1005 break;
1006 case DL_DCS_PORT_C:
1007 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
1008 break;
1009 default:
1010 case DL_DCS_PORT_A_AND_C:
1011 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1012 break;
1013 }
1014
1015 if (!dev_priv->vbt.dsi.config->cabc_supported)
1016 return;
1017
1018 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
1019 case DL_DCS_PORT_A:
1020 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
1021 break;
1022 case DL_DCS_PORT_C:
1023 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
1024 break;
1025 default:
1026 case DL_DCS_PORT_A_AND_C:
1027 dev_priv->vbt.dsi.cabc_ports =
1028 BIT(PORT_A) | BIT(PORT_C);
1029 break;
1030 }
1031 }
1032
1033 static void
1034 parse_mipi_config(struct drm_i915_private *dev_priv,
1035 const struct bdb_header *bdb)
1036 {
1037 const struct bdb_mipi_config *start;
1038 const struct mipi_config *config;
1039 const struct mipi_pps_data *pps;
1040 int panel_type = dev_priv->vbt.panel_type;
1041 enum port port;
1042
1043 /* parse MIPI blocks only if LFP type is MIPI */
1044 if (!intel_bios_is_dsi_present(dev_priv, &port))
1045 return;
1046
1047 /* Initialize this to undefined indicating no generic MIPI support */
1048 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1049
1050 /* Block #40 is already parsed and panel_fixed_mode is
1051 * stored in dev_priv->lfp_lvds_vbt_mode
1052 * resuse this when needed
1053 */
1054
1055 /* Parse #52 for panel index used from panel_type already
1056 * parsed
1057 */
1058 start = find_section(bdb, BDB_MIPI_CONFIG);
1059 if (!start) {
1060 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1061 return;
1062 }
1063
1064 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1065 panel_type);
1066
1067 /*
1068 * get hold of the correct configuration block and pps data as per
1069 * the panel_type as index
1070 */
1071 config = &start->config[panel_type];
1072 pps = &start->pps[panel_type];
1073
1074 /* store as of now full data. Trim when we realise all is not needed */
1075 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1076 if (!dev_priv->vbt.dsi.config)
1077 return;
1078
1079 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1080 if (!dev_priv->vbt.dsi.pps) {
1081 kfree(dev_priv->vbt.dsi.config);
1082 return;
1083 }
1084
1085 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1086
1087 /* FIXME is the 90 vs. 270 correct? */
1088 switch (config->rotation) {
1089 case ENABLE_ROTATION_0:
1090 /*
1091 * Most (all?) VBTs claim 0 degrees despite having
1092 * an upside down panel, thus we do not trust this.
1093 */
1094 dev_priv->vbt.dsi.orientation =
1095 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1096 break;
1097 case ENABLE_ROTATION_90:
1098 dev_priv->vbt.dsi.orientation =
1099 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1100 break;
1101 case ENABLE_ROTATION_180:
1102 dev_priv->vbt.dsi.orientation =
1103 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1104 break;
1105 case ENABLE_ROTATION_270:
1106 dev_priv->vbt.dsi.orientation =
1107 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1108 break;
1109 }
1110
1111 /* We have mandatory mipi config blocks. Initialize as generic panel */
1112 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1113 }
1114
1115 /* Find the sequence block and size for the given panel. */
1116 static const u8 *
1117 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1118 u16 panel_id, u32 *seq_size)
1119 {
1120 u32 total = get_blocksize(sequence);
1121 const u8 *data = &sequence->data[0];
1122 u8 current_id;
1123 u32 current_size;
1124 int header_size = sequence->version >= 3 ? 5 : 3;
1125 int index = 0;
1126 int i;
1127
1128 /* skip new block size */
1129 if (sequence->version >= 3)
1130 data += 4;
1131
1132 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1133 if (index + header_size > total) {
1134 DRM_ERROR("Invalid sequence block (header)\n");
1135 return NULL;
1136 }
1137
1138 current_id = *(data + index);
1139 if (sequence->version >= 3)
1140 current_size = *((const u32 *)(data + index + 1));
1141 else
1142 current_size = *((const u16 *)(data + index + 1));
1143
1144 index += header_size;
1145
1146 if (index + current_size > total) {
1147 DRM_ERROR("Invalid sequence block\n");
1148 return NULL;
1149 }
1150
1151 if (current_id == panel_id) {
1152 *seq_size = current_size;
1153 return data + index;
1154 }
1155
1156 index += current_size;
1157 }
1158
1159 DRM_ERROR("Sequence block detected but no valid configuration\n");
1160
1161 return NULL;
1162 }
1163
1164 static int goto_next_sequence(const u8 *data, int index, int total)
1165 {
1166 u16 len;
1167
1168 /* Skip Sequence Byte. */
1169 for (index = index + 1; index < total; index += len) {
1170 u8 operation_byte = *(data + index);
1171 index++;
1172
1173 switch (operation_byte) {
1174 case MIPI_SEQ_ELEM_END:
1175 return index;
1176 case MIPI_SEQ_ELEM_SEND_PKT:
1177 if (index + 4 > total)
1178 return 0;
1179
1180 len = *((const u16 *)(data + index + 2)) + 4;
1181 break;
1182 case MIPI_SEQ_ELEM_DELAY:
1183 len = 4;
1184 break;
1185 case MIPI_SEQ_ELEM_GPIO:
1186 len = 2;
1187 break;
1188 case MIPI_SEQ_ELEM_I2C:
1189 if (index + 7 > total)
1190 return 0;
1191 len = *(data + index + 6) + 7;
1192 break;
1193 default:
1194 DRM_ERROR("Unknown operation byte\n");
1195 return 0;
1196 }
1197 }
1198
1199 return 0;
1200 }
1201
1202 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1203 {
1204 int seq_end;
1205 u16 len;
1206 u32 size_of_sequence;
1207
1208 /*
1209 * Could skip sequence based on Size of Sequence alone, but also do some
1210 * checking on the structure.
1211 */
1212 if (total < 5) {
1213 DRM_ERROR("Too small sequence size\n");
1214 return 0;
1215 }
1216
1217 /* Skip Sequence Byte. */
1218 index++;
1219
1220 /*
1221 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1222 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1223 * byte.
1224 */
1225 size_of_sequence = *((const u32 *)(data + index));
1226 index += 4;
1227
1228 seq_end = index + size_of_sequence;
1229 if (seq_end > total) {
1230 DRM_ERROR("Invalid sequence size\n");
1231 return 0;
1232 }
1233
1234 for (; index < total; index += len) {
1235 u8 operation_byte = *(data + index);
1236 index++;
1237
1238 if (operation_byte == MIPI_SEQ_ELEM_END) {
1239 if (index != seq_end) {
1240 DRM_ERROR("Invalid element structure\n");
1241 return 0;
1242 }
1243 return index;
1244 }
1245
1246 len = *(data + index);
1247 index++;
1248
1249 /*
1250 * FIXME: Would be nice to check elements like for v1/v2 in
1251 * goto_next_sequence() above.
1252 */
1253 switch (operation_byte) {
1254 case MIPI_SEQ_ELEM_SEND_PKT:
1255 case MIPI_SEQ_ELEM_DELAY:
1256 case MIPI_SEQ_ELEM_GPIO:
1257 case MIPI_SEQ_ELEM_I2C:
1258 case MIPI_SEQ_ELEM_SPI:
1259 case MIPI_SEQ_ELEM_PMIC:
1260 break;
1261 default:
1262 DRM_ERROR("Unknown operation byte %u\n",
1263 operation_byte);
1264 break;
1265 }
1266 }
1267
1268 return 0;
1269 }
1270
1271 /*
1272 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1273 * skip all delay + gpio operands and stop at the first DSI packet op.
1274 */
1275 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1276 {
1277 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1278 int index, len;
1279
1280 if (drm_WARN_ON(&dev_priv->drm,
1281 !data || dev_priv->vbt.dsi.seq_version != 1))
1282 return 0;
1283
1284 /* index = 1 to skip sequence byte */
1285 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1286 switch (data[index]) {
1287 case MIPI_SEQ_ELEM_SEND_PKT:
1288 return index == 1 ? 0 : index;
1289 case MIPI_SEQ_ELEM_DELAY:
1290 len = 5; /* 1 byte for operand + uint32 */
1291 break;
1292 case MIPI_SEQ_ELEM_GPIO:
1293 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1294 break;
1295 default:
1296 return 0;
1297 }
1298 }
1299
1300 return 0;
1301 }
1302
1303 /*
1304 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1305 * The deassert must be done before calling intel_dsi_device_ready, so for
1306 * these devices we split the init OTP sequence into a deassert sequence and
1307 * the actual init OTP part.
1308 */
1309 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1310 {
1311 u8 *init_otp;
1312 int len;
1313
1314 /* Limit this to VLV for now. */
1315 if (!IS_VALLEYVIEW(dev_priv))
1316 return;
1317
1318 /* Limit this to v1 vid-mode sequences */
1319 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1320 dev_priv->vbt.dsi.seq_version != 1)
1321 return;
1322
1323 /* Only do this if there are otp and assert seqs and no deassert seq */
1324 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1325 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1326 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1327 return;
1328
1329 /* The deassert-sequence ends at the first DSI packet */
1330 len = get_init_otp_deassert_fragment_len(dev_priv);
1331 if (!len)
1332 return;
1333
1334 drm_dbg_kms(&dev_priv->drm,
1335 "Using init OTP fragment to deassert reset\n");
1336
1337 /* Copy the fragment, update seq byte and terminate it */
1338 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1339 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1340 if (!dev_priv->vbt.dsi.deassert_seq)
1341 return;
1342 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1343 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1344 /* Use the copy for deassert */
1345 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1346 dev_priv->vbt.dsi.deassert_seq;
1347 /* Replace the last byte of the fragment with init OTP seq byte */
1348 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1349 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1350 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1351 }
1352
1353 static void
1354 parse_mipi_sequence(struct drm_i915_private *dev_priv,
1355 const struct bdb_header *bdb)
1356 {
1357 int panel_type = dev_priv->vbt.panel_type;
1358 const struct bdb_mipi_sequence *sequence;
1359 const u8 *seq_data;
1360 u32 seq_size;
1361 u8 *data;
1362 int index = 0;
1363
1364 /* Only our generic panel driver uses the sequence block. */
1365 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1366 return;
1367
1368 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1369 if (!sequence) {
1370 drm_dbg_kms(&dev_priv->drm,
1371 "No MIPI Sequence found, parsing complete\n");
1372 return;
1373 }
1374
1375 /* Fail gracefully for forward incompatible sequence block. */
1376 if (sequence->version >= 4) {
1377 drm_err(&dev_priv->drm,
1378 "Unable to parse MIPI Sequence Block v%u\n",
1379 sequence->version);
1380 return;
1381 }
1382
1383 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1384 sequence->version);
1385
1386 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1387 if (!seq_data)
1388 return;
1389
1390 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1391 if (!data)
1392 return;
1393
1394 /* Parse the sequences, store pointers to each sequence. */
1395 for (;;) {
1396 u8 seq_id = *(data + index);
1397 if (seq_id == MIPI_SEQ_END)
1398 break;
1399
1400 if (seq_id >= MIPI_SEQ_MAX) {
1401 drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1402 seq_id);
1403 goto err;
1404 }
1405
1406 /* Log about presence of sequences we won't run. */
1407 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1408 drm_dbg_kms(&dev_priv->drm,
1409 "Unsupported sequence %u\n", seq_id);
1410
1411 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1412
1413 if (sequence->version >= 3)
1414 index = goto_next_sequence_v3(data, index, seq_size);
1415 else
1416 index = goto_next_sequence(data, index, seq_size);
1417 if (!index) {
1418 drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1419 seq_id);
1420 goto err;
1421 }
1422 }
1423
1424 dev_priv->vbt.dsi.data = data;
1425 dev_priv->vbt.dsi.size = seq_size;
1426 dev_priv->vbt.dsi.seq_version = sequence->version;
1427
1428 fixup_mipi_sequences(dev_priv);
1429
1430 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1431 return;
1432
1433 err:
1434 kfree(data);
1435 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1436 }
1437
1438 static void
1439 parse_compression_parameters(struct drm_i915_private *i915,
1440 const struct bdb_header *bdb)
1441 {
1442 const struct bdb_compression_parameters *params;
1443 struct display_device_data *devdata;
1444 const struct child_device_config *child;
1445 u16 block_size;
1446 int index;
1447
1448 if (bdb->version < 198)
1449 return;
1450
1451 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1452 if (params) {
1453 /* Sanity checks */
1454 if (params->entry_size != sizeof(params->data[0])) {
1455 drm_dbg_kms(&i915->drm,
1456 "VBT: unsupported compression param entry size\n");
1457 return;
1458 }
1459
1460 block_size = get_blocksize(params);
1461 if (block_size < sizeof(*params)) {
1462 drm_dbg_kms(&i915->drm,
1463 "VBT: expected 16 compression param entries\n");
1464 return;
1465 }
1466 }
1467
1468 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1469 child = &devdata->child;
1470
1471 if (!child->compression_enable)
1472 continue;
1473
1474 if (!params) {
1475 drm_dbg_kms(&i915->drm,
1476 "VBT: compression params not available\n");
1477 continue;
1478 }
1479
1480 if (child->compression_method_cps) {
1481 drm_dbg_kms(&i915->drm,
1482 "VBT: CPS compression not supported\n");
1483 continue;
1484 }
1485
1486 index = child->compression_structure_index;
1487
1488 devdata->dsc = kmemdup(&params->data[index],
1489 sizeof(*devdata->dsc), GFP_KERNEL);
1490 }
1491 }
1492
1493 static u8 translate_iboost(u8 val)
1494 {
1495 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1496
1497 if (val >= ARRAY_SIZE(mapping)) {
1498 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1499 return 0;
1500 }
1501 return mapping[val];
1502 }
1503
1504 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1505 {
1506 const struct ddi_vbt_port_info *info;
1507 enum port port;
1508
1509 for_each_port(port) {
1510 info = &i915->vbt.ddi_port_info[port];
1511
1512 if (info->child && ddc_pin == info->alternate_ddc_pin)
1513 return port;
1514 }
1515
1516 return PORT_NONE;
1517 }
1518
1519 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1520 enum port port)
1521 {
1522 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1523 enum port p;
1524
1525 if (!info->alternate_ddc_pin)
1526 return;
1527
1528 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1529 if (p != PORT_NONE) {
1530 drm_dbg_kms(&dev_priv->drm,
1531 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1532 "disabling port %c DVI/HDMI support\n",
1533 port_name(port), info->alternate_ddc_pin,
1534 port_name(p), port_name(p));
1535
1536 /*
1537 * If we have multiple ports supposedly sharing the
1538 * pin, then dvi/hdmi couldn't exist on the shared
1539 * port. Otherwise they share the same ddc bin and
1540 * system couldn't communicate with them separately.
1541 *
1542 * Give inverse child device order the priority,
1543 * last one wins. Yes, there are real machines
1544 * (eg. Asrock B250M-HDV) where VBT has both
1545 * port A and port E with the same AUX ch and
1546 * we must pick port E :(
1547 */
1548 info = &dev_priv->vbt.ddi_port_info[p];
1549
1550 info->supports_dvi = false;
1551 info->supports_hdmi = false;
1552 info->alternate_ddc_pin = 0;
1553 }
1554 }
1555
1556 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1557 {
1558 const struct ddi_vbt_port_info *info;
1559 enum port port;
1560
1561 for_each_port(port) {
1562 info = &i915->vbt.ddi_port_info[port];
1563
1564 if (info->child && aux_ch == info->alternate_aux_channel)
1565 return port;
1566 }
1567
1568 return PORT_NONE;
1569 }
1570
1571 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1572 enum port port)
1573 {
1574 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1575 enum port p;
1576
1577 if (!info->alternate_aux_channel)
1578 return;
1579
1580 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1581 if (p != PORT_NONE) {
1582 drm_dbg_kms(&dev_priv->drm,
1583 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1584 "disabling port %c DP support\n",
1585 port_name(port), info->alternate_aux_channel,
1586 port_name(p), port_name(p));
1587
1588 /*
1589 * If we have multiple ports supposedlt sharing the
1590 * aux channel, then DP couldn't exist on the shared
1591 * port. Otherwise they share the same aux channel
1592 * and system couldn't communicate with them separately.
1593 *
1594 * Give inverse child device order the priority,
1595 * last one wins. Yes, there are real machines
1596 * (eg. Asrock B250M-HDV) where VBT has both
1597 * port A and port E with the same AUX ch and
1598 * we must pick port E :(
1599 */
1600 info = &dev_priv->vbt.ddi_port_info[p];
1601
1602 info->supports_dp = false;
1603 info->alternate_aux_channel = 0;
1604 }
1605 }
1606
1607 static const u8 cnp_ddc_pin_map[] = {
1608 [0] = 0, /* N/A */
1609 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1610 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1611 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1612 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1613 };
1614
1615 static const u8 icp_ddc_pin_map[] = {
1616 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1617 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1618 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1619 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1620 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1621 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1622 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1623 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1624 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1625 };
1626
1627 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1628 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1629 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1630 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1631 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1632 };
1633
1634 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1635 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1636 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1637 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1638 };
1639
1640 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1641 {
1642 const u8 *ddc_pin_map;
1643 int n_entries;
1644
1645 if (INTEL_PCH_TYPE(dev_priv) >= PCH_DG1) {
1646 return vbt_pin;
1647 } else if (IS_ROCKETLAKE(dev_priv) && INTEL_PCH_TYPE(dev_priv) == PCH_TGP) {
1648 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1649 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1650 } else if (HAS_PCH_TGP(dev_priv) && IS_GEN9_BC(dev_priv)) {
1651 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1652 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1653 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1654 ddc_pin_map = icp_ddc_pin_map;
1655 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1656 } else if (HAS_PCH_CNP(dev_priv)) {
1657 ddc_pin_map = cnp_ddc_pin_map;
1658 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1659 } else {
1660 /* Assuming direct map */
1661 return vbt_pin;
1662 }
1663
1664 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1665 return ddc_pin_map[vbt_pin];
1666
1667 drm_dbg_kms(&dev_priv->drm,
1668 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1669 vbt_pin);
1670 return 0;
1671 }
1672
1673 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1674 const int port_mapping[][3], u8 dvo_port)
1675 {
1676 enum port port;
1677 int i;
1678
1679 for (port = PORT_A; port < n_ports; port++) {
1680 for (i = 0; i < n_dvo; i++) {
1681 if (port_mapping[port][i] == -1)
1682 break;
1683
1684 if (dvo_port == port_mapping[port][i])
1685 return port;
1686 }
1687 }
1688
1689 return PORT_NONE;
1690 }
1691
1692 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1693 u8 dvo_port)
1694 {
1695 /*
1696 * Each DDI port can have more than one value on the "DVO Port" field,
1697 * so look for all the possible values for each port.
1698 */
1699 static const int port_mapping[][3] = {
1700 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1701 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1702 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1703 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1704 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1705 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1706 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1707 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1708 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1709 };
1710 /*
1711 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1712 * map to DDI A,B,TC1,TC2 respectively.
1713 */
1714 static const int rkl_port_mapping[][3] = {
1715 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1716 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1717 [PORT_C] = { -1 },
1718 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1719 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1720 };
1721
1722 if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
1723 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1724 ARRAY_SIZE(rkl_port_mapping[0]),
1725 rkl_port_mapping,
1726 dvo_port);
1727 else
1728 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1729 ARRAY_SIZE(port_mapping[0]),
1730 port_mapping,
1731 dvo_port);
1732 }
1733
1734 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1735 {
1736 switch (vbt_max_link_rate) {
1737 default:
1738 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1739 return 0;
1740 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1741 return 2000000;
1742 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1743 return 1350000;
1744 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1745 return 1000000;
1746 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1747 return 810000;
1748 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1749 return 540000;
1750 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1751 return 270000;
1752 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1753 return 162000;
1754 }
1755 }
1756
1757 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1758 {
1759 switch (vbt_max_link_rate) {
1760 default:
1761 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1762 return 810000;
1763 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1764 return 540000;
1765 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1766 return 270000;
1767 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1768 return 162000;
1769 }
1770 }
1771
1772 static void parse_ddi_port(struct drm_i915_private *dev_priv,
1773 struct display_device_data *devdata,
1774 u8 bdb_version)
1775 {
1776 const struct child_device_config *child = &devdata->child;
1777 struct ddi_vbt_port_info *info;
1778 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1779 enum port port;
1780
1781 port = dvo_port_to_port(dev_priv, child->dvo_port);
1782 if (port == PORT_NONE)
1783 return;
1784
1785 info = &dev_priv->vbt.ddi_port_info[port];
1786
1787 if (info->child) {
1788 drm_dbg_kms(&dev_priv->drm,
1789 "More than one child device for port %c in VBT, using the first.\n",
1790 port_name(port));
1791 return;
1792 }
1793
1794 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1795 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1796 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1797 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1798 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1799
1800 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1801 drm_dbg_kms(&dev_priv->drm,
1802 "VBT claims port A supports DVI%s, ignoring\n",
1803 is_hdmi ? "/HDMI" : "");
1804 is_dvi = false;
1805 is_hdmi = false;
1806 }
1807
1808 info->supports_dvi = is_dvi;
1809 info->supports_hdmi = is_hdmi;
1810 info->supports_dp = is_dp;
1811 info->supports_edp = is_edp;
1812
1813 if (bdb_version >= 195)
1814 info->supports_typec_usb = child->dp_usb_type_c;
1815
1816 if (bdb_version >= 209)
1817 info->supports_tbt = child->tbt;
1818
1819 drm_dbg_kms(&dev_priv->drm,
1820 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1821 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1822 HAS_LSPCON(dev_priv) && child->lspcon,
1823 info->supports_typec_usb, info->supports_tbt,
1824 devdata->dsc != NULL);
1825
1826 if (is_dvi) {
1827 u8 ddc_pin;
1828
1829 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1830 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1831 info->alternate_ddc_pin = ddc_pin;
1832 sanitize_ddc_pin(dev_priv, port);
1833 } else {
1834 drm_dbg_kms(&dev_priv->drm,
1835 "Port %c has invalid DDC pin %d, "
1836 "sticking to defaults\n",
1837 port_name(port), ddc_pin);
1838 }
1839 }
1840
1841 if (is_dp) {
1842 info->alternate_aux_channel = child->aux_channel;
1843
1844 sanitize_aux_ch(dev_priv, port);
1845 }
1846
1847 if (bdb_version >= 158) {
1848 /* The VBT HDMI level shift values match the table we have. */
1849 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1850 drm_dbg_kms(&dev_priv->drm,
1851 "VBT HDMI level shift for port %c: %d\n",
1852 port_name(port),
1853 hdmi_level_shift);
1854 info->hdmi_level_shift = hdmi_level_shift;
1855 info->hdmi_level_shift_set = true;
1856 }
1857
1858 if (bdb_version >= 204) {
1859 int max_tmds_clock;
1860
1861 switch (child->hdmi_max_data_rate) {
1862 default:
1863 MISSING_CASE(child->hdmi_max_data_rate);
1864 fallthrough;
1865 case HDMI_MAX_DATA_RATE_PLATFORM:
1866 max_tmds_clock = 0;
1867 break;
1868 case HDMI_MAX_DATA_RATE_297:
1869 max_tmds_clock = 297000;
1870 break;
1871 case HDMI_MAX_DATA_RATE_165:
1872 max_tmds_clock = 165000;
1873 break;
1874 }
1875
1876 if (max_tmds_clock)
1877 drm_dbg_kms(&dev_priv->drm,
1878 "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1879 port_name(port), max_tmds_clock);
1880 info->max_tmds_clock = max_tmds_clock;
1881 }
1882
1883 /* Parse the I_boost config for SKL and above */
1884 if (bdb_version >= 196 && child->iboost) {
1885 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1886 drm_dbg_kms(&dev_priv->drm,
1887 "VBT (e)DP boost level for port %c: %d\n",
1888 port_name(port), info->dp_boost_level);
1889 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1890 drm_dbg_kms(&dev_priv->drm,
1891 "VBT HDMI boost level for port %c: %d\n",
1892 port_name(port), info->hdmi_boost_level);
1893 }
1894
1895 /* DP max link rate for CNL+ */
1896 if (bdb_version >= 216) {
1897 if (bdb_version >= 230)
1898 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
1899 else
1900 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
1901
1902 drm_dbg_kms(&dev_priv->drm,
1903 "VBT DP max link rate for port %c: %d\n",
1904 port_name(port), info->dp_max_link_rate);
1905 }
1906
1907 info->child = child;
1908 }
1909
1910 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1911 {
1912 struct display_device_data *devdata;
1913
1914 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1915 return;
1916
1917 if (bdb_version < 155)
1918 return;
1919
1920 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1921 parse_ddi_port(dev_priv, devdata, bdb_version);
1922 }
1923
1924 static void
1925 parse_general_definitions(struct drm_i915_private *dev_priv,
1926 const struct bdb_header *bdb)
1927 {
1928 const struct bdb_general_definitions *defs;
1929 struct display_device_data *devdata;
1930 const struct child_device_config *child;
1931 int i, child_device_num;
1932 u8 expected_size;
1933 u16 block_size;
1934 int bus_pin;
1935
1936 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1937 if (!defs) {
1938 drm_dbg_kms(&dev_priv->drm,
1939 "No general definition block is found, no devices defined.\n");
1940 return;
1941 }
1942
1943 block_size = get_blocksize(defs);
1944 if (block_size < sizeof(*defs)) {
1945 drm_dbg_kms(&dev_priv->drm,
1946 "General definitions block too small (%u)\n",
1947 block_size);
1948 return;
1949 }
1950
1951 bus_pin = defs->crt_ddc_gmbus_pin;
1952 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1953 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1954 dev_priv->vbt.crt_ddc_pin = bus_pin;
1955
1956 if (bdb->version < 106) {
1957 expected_size = 22;
1958 } else if (bdb->version < 111) {
1959 expected_size = 27;
1960 } else if (bdb->version < 195) {
1961 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1962 } else if (bdb->version == 195) {
1963 expected_size = 37;
1964 } else if (bdb->version <= 215) {
1965 expected_size = 38;
1966 } else if (bdb->version <= 237) {
1967 expected_size = 39;
1968 } else {
1969 expected_size = sizeof(*child);
1970 BUILD_BUG_ON(sizeof(*child) < 39);
1971 drm_dbg(&dev_priv->drm,
1972 "Expected child device config size for VBT version %u not known; assuming %u\n",
1973 bdb->version, expected_size);
1974 }
1975
1976 /* Flag an error for unexpected size, but continue anyway. */
1977 if (defs->child_dev_size != expected_size)
1978 drm_err(&dev_priv->drm,
1979 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
1980 defs->child_dev_size, expected_size, bdb->version);
1981
1982 /* The legacy sized child device config is the minimum we need. */
1983 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1984 drm_dbg_kms(&dev_priv->drm,
1985 "Child device config size %u is too small.\n",
1986 defs->child_dev_size);
1987 return;
1988 }
1989
1990 /* get the number of child device */
1991 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1992
1993 for (i = 0; i < child_device_num; i++) {
1994 child = child_device_ptr(defs, i);
1995 if (!child->device_type)
1996 continue;
1997
1998 drm_dbg_kms(&dev_priv->drm,
1999 "Found VBT child device with type 0x%x\n",
2000 child->device_type);
2001
2002 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2003 if (!devdata)
2004 break;
2005
2006 /*
2007 * Copy as much as we know (sizeof) and is available
2008 * (child_dev_size) of the child device config. Accessing the
2009 * data must depend on VBT version.
2010 */
2011 memcpy(&devdata->child, child,
2012 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2013
2014 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
2015 }
2016
2017 if (list_empty(&dev_priv->vbt.display_devices))
2018 drm_dbg_kms(&dev_priv->drm,
2019 "no child dev is parsed from VBT\n");
2020 }
2021
2022 /* Common defaults which may be overridden by VBT. */
2023 static void
2024 init_vbt_defaults(struct drm_i915_private *dev_priv)
2025 {
2026 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2027
2028 /* Default to having backlight */
2029 dev_priv->vbt.backlight.present = true;
2030
2031 /* LFP panel data */
2032 dev_priv->vbt.lvds_dither = 1;
2033
2034 /* SDVO panel data */
2035 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2036
2037 /* general features */
2038 dev_priv->vbt.int_tv_support = 1;
2039 dev_priv->vbt.int_crt_support = 1;
2040
2041 /* driver features */
2042 dev_priv->vbt.int_lvds_support = 1;
2043
2044 /* Default to using SSC */
2045 dev_priv->vbt.lvds_use_ssc = 1;
2046 /*
2047 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2048 * clock for LVDS.
2049 */
2050 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
2051 !HAS_PCH_SPLIT(dev_priv));
2052 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
2053 dev_priv->vbt.lvds_ssc_freq);
2054 }
2055
2056 /* Defaults to initialize only if there is no VBT. */
2057 static void
2058 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
2059 {
2060 enum port port;
2061
2062 for_each_port(port) {
2063 struct ddi_vbt_port_info *info =
2064 &dev_priv->vbt.ddi_port_info[port];
2065 enum phy phy = intel_port_to_phy(dev_priv, port);
2066
2067 /*
2068 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2069 * to detect it.
2070 */
2071 if (intel_phy_is_tc(dev_priv, phy))
2072 continue;
2073
2074 info->supports_dvi = (port != PORT_A && port != PORT_E);
2075 info->supports_hdmi = info->supports_dvi;
2076 info->supports_dp = (port != PORT_E);
2077 info->supports_edp = (port == PORT_A);
2078 }
2079 }
2080
2081 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2082 {
2083 const void *_vbt = vbt;
2084
2085 return _vbt + vbt->bdb_offset;
2086 }
2087
2088 /**
2089 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2090 * @buf: pointer to a buffer to validate
2091 * @size: size of the buffer
2092 *
2093 * Returns true on valid VBT.
2094 */
2095 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2096 {
2097 const struct vbt_header *vbt = buf;
2098 const struct bdb_header *bdb;
2099
2100 if (!vbt)
2101 return false;
2102
2103 if (sizeof(struct vbt_header) > size) {
2104 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2105 return false;
2106 }
2107
2108 if (memcmp(vbt->signature, "$VBT", 4)) {
2109 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2110 return false;
2111 }
2112
2113 if (vbt->vbt_size > size) {
2114 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2115 return false;
2116 }
2117
2118 size = vbt->vbt_size;
2119
2120 if (range_overflows_t(size_t,
2121 vbt->bdb_offset,
2122 sizeof(struct bdb_header),
2123 size)) {
2124 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2125 return false;
2126 }
2127
2128 bdb = get_bdb_header(vbt);
2129 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2130 DRM_DEBUG_DRIVER("BDB incomplete\n");
2131 return false;
2132 }
2133
2134 return vbt;
2135 }
2136
2137 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2138 {
2139 struct pci_dev *pdev = dev_priv->drm.pdev;
2140 void __iomem *p = NULL, *oprom;
2141 struct vbt_header *vbt;
2142 u16 vbt_size;
2143 size_t i, size;
2144
2145 oprom = pci_map_rom(pdev, &size);
2146 if (!oprom)
2147 return NULL;
2148
2149 /* Scour memory looking for the VBT signature. */
2150 for (i = 0; i + 4 < size; i += 4) {
2151 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2152 continue;
2153
2154 p = oprom + i;
2155 size -= i;
2156 break;
2157 }
2158
2159 if (!p)
2160 goto err_unmap_oprom;
2161
2162 if (sizeof(struct vbt_header) > size) {
2163 drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2164 goto err_unmap_oprom;
2165 }
2166
2167 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2168 if (vbt_size > size) {
2169 drm_dbg(&dev_priv->drm,
2170 "VBT incomplete (vbt_size overflows)\n");
2171 goto err_unmap_oprom;
2172 }
2173
2174 /* The rest will be validated by intel_bios_is_valid_vbt() */
2175 vbt = kmalloc(vbt_size, GFP_KERNEL);
2176 if (!vbt)
2177 goto err_unmap_oprom;
2178
2179 memcpy_fromio(vbt, p, vbt_size);
2180
2181 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2182 goto err_free_vbt;
2183
2184 pci_unmap_rom(pdev, oprom);
2185
2186 return vbt;
2187
2188 err_free_vbt:
2189 kfree(vbt);
2190 err_unmap_oprom:
2191 pci_unmap_rom(pdev, oprom);
2192
2193 return NULL;
2194 }
2195
2196 #define DRM_DMI_PRODUCT_VERSION 0x6
2197
2198 static void parse_product_info(struct drm_i915_private *dev_priv)
2199 {
2200 const char *product_ver = dmi_get_system_info(DRM_DMI_PRODUCT_VERSION);
2201 if (!product_ver)
2202 return;
2203
2204 if (!strncmp(product_ver, "ThinkPad X1", 11)) {
2205 DRM_DEBUG_KMS("dmi: %s, Bypassing TMDS_OE write\n", product_ver);
2206 dev_priv->bypass_tmds_oe = true;
2207 }
2208
2209 return;
2210 }
2211
2212 /**
2213 * intel_bios_init - find VBT and initialize settings from the BIOS
2214 * @dev_priv: i915 device instance
2215 *
2216 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2217 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2218 * initialize some defaults if the VBT is not present at all.
2219 */
2220 void intel_bios_init(struct drm_i915_private *dev_priv)
2221 {
2222 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2223 struct vbt_header *oprom_vbt = NULL;
2224 const struct bdb_header *bdb;
2225
2226 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2227
2228 if (!HAS_DISPLAY(dev_priv)) {
2229 drm_dbg_kms(&dev_priv->drm,
2230 "Skipping VBT init due to disabled display.\n");
2231 return;
2232 }
2233
2234 init_vbt_defaults(dev_priv);
2235
2236 /* If the OpRegion does not have VBT, look in PCI ROM. */
2237 if (!vbt) {
2238 oprom_vbt = oprom_get_vbt(dev_priv);
2239 if (!oprom_vbt)
2240 goto out;
2241
2242 vbt = oprom_vbt;
2243
2244 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2245 }
2246
2247 bdb = get_bdb_header(vbt);
2248
2249 drm_dbg_kms(&dev_priv->drm,
2250 "VBT signature \"%.*s\", BDB version %d\n",
2251 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2252
2253 /* Grab useful general definitions */
2254 parse_general_features(dev_priv, bdb);
2255 parse_general_definitions(dev_priv, bdb);
2256 parse_panel_options(dev_priv, bdb);
2257 parse_panel_dtd(dev_priv, bdb);
2258 parse_lfp_backlight(dev_priv, bdb);
2259 parse_sdvo_panel_data(dev_priv, bdb);
2260 parse_driver_features(dev_priv, bdb);
2261 parse_power_conservation_features(dev_priv, bdb);
2262 parse_edp(dev_priv, bdb);
2263 parse_psr(dev_priv, bdb);
2264 parse_mipi_config(dev_priv, bdb);
2265 parse_mipi_sequence(dev_priv, bdb);
2266
2267 /* Depends on child device list */
2268 parse_compression_parameters(dev_priv, bdb);
2269
2270 /* Further processing on pre-parsed data */
2271 parse_sdvo_device_mapping(dev_priv, bdb->version);
2272 parse_ddi_ports(dev_priv, bdb->version);
2273
2274 parse_product_info(dev_priv);
2275
2276 out:
2277 if (!vbt) {
2278 drm_info(&dev_priv->drm,
2279 "Failed to find VBIOS tables (VBT)\n");
2280 init_vbt_missing_defaults(dev_priv);
2281 }
2282
2283 kfree(oprom_vbt);
2284 }
2285
2286 /**
2287 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2288 * @dev_priv: i915 device instance
2289 */
2290 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2291 {
2292 struct display_device_data *devdata, *n;
2293
2294 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2295 list_del(&devdata->node);
2296 kfree(devdata->dsc);
2297 kfree(devdata);
2298 }
2299
2300 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2301 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2302 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2303 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2304 kfree(dev_priv->vbt.dsi.data);
2305 dev_priv->vbt.dsi.data = NULL;
2306 kfree(dev_priv->vbt.dsi.pps);
2307 dev_priv->vbt.dsi.pps = NULL;
2308 kfree(dev_priv->vbt.dsi.config);
2309 dev_priv->vbt.dsi.config = NULL;
2310 kfree(dev_priv->vbt.dsi.deassert_seq);
2311 dev_priv->vbt.dsi.deassert_seq = NULL;
2312 }
2313
2314 /**
2315 * intel_bios_is_tv_present - is integrated TV present in VBT
2316 * @dev_priv: i915 device instance
2317 *
2318 * Return true if TV is present. If no child devices were parsed from VBT,
2319 * assume TV is present.
2320 */
2321 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2322 {
2323 const struct display_device_data *devdata;
2324 const struct child_device_config *child;
2325
2326 if (!dev_priv->vbt.int_tv_support)
2327 return false;
2328
2329 if (list_empty(&dev_priv->vbt.display_devices))
2330 return true;
2331
2332 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2333 child = &devdata->child;
2334
2335 /*
2336 * If the device type is not TV, continue.
2337 */
2338 switch (child->device_type) {
2339 case DEVICE_TYPE_INT_TV:
2340 case DEVICE_TYPE_TV:
2341 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2342 break;
2343 default:
2344 continue;
2345 }
2346 /* Only when the addin_offset is non-zero, it is regarded
2347 * as present.
2348 */
2349 if (child->addin_offset)
2350 return true;
2351 }
2352
2353 return false;
2354 }
2355
2356 /**
2357 * intel_bios_is_lvds_present - is LVDS present in VBT
2358 * @dev_priv: i915 device instance
2359 * @i2c_pin: i2c pin for LVDS if present
2360 *
2361 * Return true if LVDS is present. If no child devices were parsed from VBT,
2362 * assume LVDS is present.
2363 */
2364 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2365 {
2366 const struct display_device_data *devdata;
2367 const struct child_device_config *child;
2368
2369 if (list_empty(&dev_priv->vbt.display_devices))
2370 return true;
2371
2372 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2373 child = &devdata->child;
2374
2375 /* If the device type is not LFP, continue.
2376 * We have to check both the new identifiers as well as the
2377 * old for compatibility with some BIOSes.
2378 */
2379 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2380 child->device_type != DEVICE_TYPE_LFP)
2381 continue;
2382
2383 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2384 *i2c_pin = child->i2c_pin;
2385
2386 /* However, we cannot trust the BIOS writers to populate
2387 * the VBT correctly. Since LVDS requires additional
2388 * information from AIM blocks, a non-zero addin offset is
2389 * a good indicator that the LVDS is actually present.
2390 */
2391 if (child->addin_offset)
2392 return true;
2393
2394 /* But even then some BIOS writers perform some black magic
2395 * and instantiate the device without reference to any
2396 * additional data. Trust that if the VBT was written into
2397 * the OpRegion then they have validated the LVDS's existence.
2398 */
2399 if (dev_priv->opregion.vbt)
2400 return true;
2401 }
2402
2403 return false;
2404 }
2405
2406 /**
2407 * intel_bios_is_port_present - is the specified digital port present
2408 * @dev_priv: i915 device instance
2409 * @port: port to check
2410 *
2411 * Return true if the device in %port is present.
2412 */
2413 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2414 {
2415 const struct display_device_data *devdata;
2416 const struct child_device_config *child;
2417 static const struct {
2418 u16 dp, hdmi;
2419 } port_mapping[] = {
2420 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2421 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2422 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2423 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2424 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2425 };
2426
2427 if (HAS_DDI(dev_priv)) {
2428 const struct ddi_vbt_port_info *port_info =
2429 &dev_priv->vbt.ddi_port_info[port];
2430
2431 return port_info->child;
2432 }
2433
2434 /* FIXME maybe deal with port A as well? */
2435 if (drm_WARN_ON(&dev_priv->drm,
2436 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2437 return false;
2438
2439 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2440 child = &devdata->child;
2441
2442 if ((child->dvo_port == port_mapping[port].dp ||
2443 child->dvo_port == port_mapping[port].hdmi) &&
2444 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2445 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2446 return true;
2447 }
2448
2449 return false;
2450 }
2451
2452 /**
2453 * intel_bios_is_port_edp - is the device in given port eDP
2454 * @dev_priv: i915 device instance
2455 * @port: port to check
2456 *
2457 * Return true if the device in %port is eDP.
2458 */
2459 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2460 {
2461 const struct display_device_data *devdata;
2462 const struct child_device_config *child;
2463 static const short port_mapping[] = {
2464 [PORT_B] = DVO_PORT_DPB,
2465 [PORT_C] = DVO_PORT_DPC,
2466 [PORT_D] = DVO_PORT_DPD,
2467 [PORT_E] = DVO_PORT_DPE,
2468 [PORT_F] = DVO_PORT_DPF,
2469 };
2470
2471 if (HAS_DDI(dev_priv))
2472 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2473
2474 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2475 child = &devdata->child;
2476
2477 if (child->dvo_port == port_mapping[port] &&
2478 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2479 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2480 return true;
2481 }
2482
2483 return false;
2484 }
2485
2486 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2487 enum port port)
2488 {
2489 static const struct {
2490 u16 dp, hdmi;
2491 } port_mapping[] = {
2492 /*
2493 * Buggy VBTs may declare DP ports as having
2494 * HDMI type dvo_port :( So let's check both.
2495 */
2496 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2497 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2498 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2499 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2500 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2501 };
2502
2503 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2504 return false;
2505
2506 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2507 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2508 return false;
2509
2510 if (child->dvo_port == port_mapping[port].dp)
2511 return true;
2512
2513 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2514 if (child->dvo_port == port_mapping[port].hdmi &&
2515 child->aux_channel != 0)
2516 return true;
2517
2518 return false;
2519 }
2520
2521 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2522 enum port port)
2523 {
2524 const struct display_device_data *devdata;
2525
2526 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2527 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2528 return true;
2529 }
2530
2531 return false;
2532 }
2533
2534 /**
2535 * intel_bios_is_dsi_present - is DSI present in VBT
2536 * @dev_priv: i915 device instance
2537 * @port: port for DSI if present
2538 *
2539 * Return true if DSI is present, and return the port in %port.
2540 */
2541 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2542 enum port *port)
2543 {
2544 const struct display_device_data *devdata;
2545 const struct child_device_config *child;
2546 u8 dvo_port;
2547
2548 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2549 child = &devdata->child;
2550
2551 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2552 continue;
2553
2554 dvo_port = child->dvo_port;
2555
2556 if (dvo_port == DVO_PORT_MIPIA ||
2557 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2558 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2559 if (port)
2560 *port = dvo_port - DVO_PORT_MIPIA;
2561 return true;
2562 } else if (dvo_port == DVO_PORT_MIPIB ||
2563 dvo_port == DVO_PORT_MIPIC ||
2564 dvo_port == DVO_PORT_MIPID) {
2565 drm_dbg_kms(&dev_priv->drm,
2566 "VBT has unsupported DSI port %c\n",
2567 port_name(dvo_port - DVO_PORT_MIPIA));
2568 }
2569 }
2570
2571 return false;
2572 }
2573
2574 static void fill_dsc(struct intel_crtc_state *crtc_state,
2575 struct dsc_compression_parameters_entry *dsc,
2576 int dsc_max_bpc)
2577 {
2578 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2579 int bpc = 8;
2580
2581 vdsc_cfg->dsc_version_major = dsc->version_major;
2582 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2583
2584 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2585 bpc = 12;
2586 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2587 bpc = 10;
2588 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2589 bpc = 8;
2590 else
2591 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2592 dsc_max_bpc);
2593
2594 crtc_state->pipe_bpp = bpc * 3;
2595
2596 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2597 VBT_DSC_MAX_BPP(dsc->max_bpp));
2598
2599 /*
2600 * FIXME: This is ugly, and slice count should take DSC engine
2601 * throughput etc. into account.
2602 *
2603 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2604 */
2605 if (dsc->slices_per_line & BIT(2)) {
2606 crtc_state->dsc.slice_count = 4;
2607 } else if (dsc->slices_per_line & BIT(1)) {
2608 crtc_state->dsc.slice_count = 2;
2609 } else {
2610 /* FIXME */
2611 if (!(dsc->slices_per_line & BIT(0)))
2612 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2613
2614 crtc_state->dsc.slice_count = 1;
2615 }
2616
2617 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2618 crtc_state->dsc.slice_count != 0)
2619 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2620 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2621 crtc_state->dsc.slice_count);
2622
2623 /*
2624 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2625 * implementation specific physical rate buffer size. Currently we use
2626 * the required rate buffer model size calculated in
2627 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2628 *
2629 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2630 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2631 * implementation should also use the DPCD (or perhaps VBT for eDP)
2632 * provided value for the buffer size.
2633 */
2634
2635 /* FIXME: DSI spec says bpc + 1 for this one */
2636 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2637
2638 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2639
2640 vdsc_cfg->slice_height = dsc->slice_height;
2641 }
2642
2643 /* FIXME: initially DSI specific */
2644 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2645 struct intel_crtc_state *crtc_state,
2646 int dsc_max_bpc)
2647 {
2648 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2649 const struct display_device_data *devdata;
2650 const struct child_device_config *child;
2651
2652 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2653 child = &devdata->child;
2654
2655 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2656 continue;
2657
2658 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2659 if (!devdata->dsc)
2660 return false;
2661
2662 if (crtc_state)
2663 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2664
2665 return true;
2666 }
2667 }
2668
2669 return false;
2670 }
2671
2672 /**
2673 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2674 * @i915: i915 device instance
2675 * @port: port to check
2676 *
2677 * Return true if HPD should be inverted for %port.
2678 */
2679 bool
2680 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2681 enum port port)
2682 {
2683 const struct child_device_config *child =
2684 i915->vbt.ddi_port_info[port].child;
2685
2686 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2687 return false;
2688
2689 return child && child->hpd_invert;
2690 }
2691
2692 /**
2693 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2694 * @i915: i915 device instance
2695 * @port: port to check
2696 *
2697 * Return true if LSPCON is present on this port
2698 */
2699 bool
2700 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2701 enum port port)
2702 {
2703 const struct child_device_config *child =
2704 i915->vbt.ddi_port_info[port].child;
2705
2706 return HAS_LSPCON(i915) && child && child->lspcon;
2707 }
2708
2709 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2710 enum port port)
2711 {
2712 const struct ddi_vbt_port_info *info =
2713 &dev_priv->vbt.ddi_port_info[port];
2714 enum aux_ch aux_ch;
2715
2716 if (!info->alternate_aux_channel) {
2717 aux_ch = (enum aux_ch)port;
2718
2719 drm_dbg_kms(&dev_priv->drm,
2720 "using AUX %c for port %c (platform default)\n",
2721 aux_ch_name(aux_ch), port_name(port));
2722 return aux_ch;
2723 }
2724
2725 switch (info->alternate_aux_channel) {
2726 case DP_AUX_A:
2727 aux_ch = AUX_CH_A;
2728 break;
2729 case DP_AUX_B:
2730 aux_ch = AUX_CH_B;
2731 break;
2732 case DP_AUX_C:
2733 /*
2734 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2735 * map to DDI A,B,TC1,TC2 respectively.
2736 */
2737 aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2738 AUX_CH_USBC1 : AUX_CH_C;
2739 break;
2740 case DP_AUX_D:
2741 aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ?
2742 AUX_CH_USBC2 : AUX_CH_D;
2743 break;
2744 case DP_AUX_E:
2745 aux_ch = AUX_CH_E;
2746 break;
2747 case DP_AUX_F:
2748 aux_ch = AUX_CH_F;
2749 break;
2750 case DP_AUX_G:
2751 aux_ch = AUX_CH_G;
2752 break;
2753 case DP_AUX_H:
2754 aux_ch = AUX_CH_H;
2755 break;
2756 case DP_AUX_I:
2757 aux_ch = AUX_CH_I;
2758 break;
2759 default:
2760 MISSING_CASE(info->alternate_aux_channel);
2761 aux_ch = AUX_CH_A;
2762 break;
2763 }
2764
2765 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2766 aux_ch_name(aux_ch), port_name(port));
2767
2768 return aux_ch;
2769 }
2770
2771 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2772 {
2773 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2774
2775 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2776 }
2777
2778 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2779 {
2780 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2781 const struct ddi_vbt_port_info *info =
2782 &i915->vbt.ddi_port_info[encoder->port];
2783
2784 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2785 }
2786
2787 int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2788 {
2789 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2790
2791 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2792 }
2793
2794 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2795 {
2796 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2797
2798 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2799 }
2800
2801 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2802 {
2803 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2804
2805 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2806 }
2807
2808 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2809 {
2810 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2811
2812 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2813 }
2814
2815 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2816 {
2817 return i915->vbt.ddi_port_info[port].supports_dvi;
2818 }
2819
2820 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2821 {
2822 return i915->vbt.ddi_port_info[port].supports_hdmi;
2823 }
2824
2825 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2826 {
2827 return i915->vbt.ddi_port_info[port].supports_dp;
2828 }
2829
2830 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2831 enum port port)
2832 {
2833 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2834 }
2835
2836 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2837 {
2838 return i915->vbt.ddi_port_info[port].supports_tbt;
2839 }
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