drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic_helper.h>
  27 #include <drm/drm_edid.h>
  28 #include <drm/drm_probe_helper.h>
  29
  30 #include "i915_drv.h"
  31 #include "intel_atomic.h"
  32 #include "intel_audio.h"
  33 #include "intel_connector.h"
  34 #include "intel_ddi.h"
  35 #include "intel_display_types.h"
  36 #include "intel_hotplug.h"
  37 #include "intel_dp.h"
  38 #include "intel_dp_mst.h"
  39 #include "intel_dpio_phy.h"
  40
  41 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  42                                             struct intel_crtc_state *crtc_state,
  43                                             struct drm_connector_state *conn_state,
  44                                             struct link_config_limits *limits)
  45 {
  46         struct drm_atomic_state *state = crtc_state->uapi.state;
  47         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  48         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  49         struct intel_connector *connector =
  50                 to_intel_connector(conn_state->connector);
  51         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  52         const struct drm_display_mode *adjusted_mode =
  53                 &crtc_state->hw.adjusted_mode;
  54         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
  55                                            DP_DPCD_QUIRK_CONSTANT_N);
  56         int bpp, slots = -EINVAL;
  57
  58         crtc_state->lane_count = limits->max_lane_count;
  59         crtc_state->port_clock = limits->max_clock;
  60
  61         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  62                 crtc_state->pipe_bpp = bpp;
  63
  64                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  65                                                        crtc_state->pipe_bpp,
  66                                                        false);
  67
  68                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  69                                                       connector->port,
  70                                                       crtc_state->pbn, 0);
  71                 if (slots == -EDEADLK)
  72                         return slots;
  73                 if (slots >= 0)
  74                         break;
  75         }
  76
  77         if (slots < 0) {
  78                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  79                             slots);
  80                 return slots;
  81         }
  82
  83         intel_link_compute_m_n(crtc_state->pipe_bpp,
  84                                crtc_state->lane_count,
  85                                adjusted_mode->crtc_clock,
  86                                crtc_state->port_clock,
  87                                &crtc_state->dp_m_n,
  88                                constant_n, crtc_state->fec_enable);
  89         crtc_state->dp_m_n.tu = slots;
  90
  91         return 0;
  92 }
  93
  94 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
  95                                        struct intel_crtc_state *pipe_config,
  96                                        struct drm_connector_state *conn_state)
  97 {
  98         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  99         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 100         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 101         struct intel_connector *connector =
 102                 to_intel_connector(conn_state->connector);
 103         struct intel_digital_connector_state *intel_conn_state =
 104                 to_intel_digital_connector_state(conn_state);
 105         const struct drm_display_mode *adjusted_mode =
 106                 &pipe_config->hw.adjusted_mode;
 107         struct link_config_limits limits;
 108         int ret;
 109
 110         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 111                 return -EINVAL;
 112
 113         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 114         pipe_config->has_pch_encoder = false;
 115
 116         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 117                 pipe_config->has_audio = connector->port->has_audio;
 118         else
 119                 pipe_config->has_audio =
 120                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 121
 122         /*
 123          * for MST we always configure max link bw - the spec doesn't
 124          * seem to suggest we should do otherwise.
 125          */
 126         limits.min_clock =
 127         limits.max_clock = intel_dp_max_link_rate(intel_dp);
 128
 129         limits.min_lane_count =
 130         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 131
 132         limits.min_bpp = intel_dp_min_bpp(pipe_config);
 133         /*
 134          * FIXME: If all the streams can't fit into the link with
 135          * their current pipe_bpp we should reduce pipe_bpp across
 136          * the board until things start to fit. Until then we
 137          * limit to <= 8bpc since that's what was hardcoded for all
 138          * MST streams previously. This hack should be removed once
 139          * we have the proper retry logic in place.
 140          */
 141         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 142
 143         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 144
 145         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 146                                                conn_state, &limits);
 147         if (ret)
 148                 return ret;
 149
 150         pipe_config->limited_color_range =
 151                 intel_dp_limited_color_range(pipe_config, conn_state);
 152
 153         if (IS_GEN9_LP(dev_priv))
 154                 pipe_config->lane_lat_optim_mask =
 155                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 156
 157         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 158
 159         return 0;
 160 }
 161
 162 /*
 163  * Iterate over all connectors and return a mask of
 164  * all CPU transcoders streaming over the same DP link.
 165  */
 166 static unsigned int
 167 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 168                              struct intel_dp *mst_port)
 169 {
 170         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 171         const struct intel_digital_connector_state *conn_state;
 172         struct intel_connector *connector;
 173         u8 transcoders = 0;
 174         int i;
 175
 176         if (INTEL_GEN(dev_priv) < 12)
 177                 return 0;
 178
 179         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 180                 const struct intel_crtc_state *crtc_state;
 181                 struct intel_crtc *crtc;
 182
 183                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 184                         continue;
 185
 186                 crtc = to_intel_crtc(conn_state->base.crtc);
 187                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 188
 189                 if (!crtc_state->hw.active)
 190                         continue;
 191
 192                 transcoders |= BIT(crtc_state->cpu_transcoder);
 193         }
 194
 195         return transcoders;
 196 }
 197
 198 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 199                                             struct intel_crtc_state *crtc_state,
 200                                             struct drm_connector_state *conn_state)
 201 {
 202         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 203         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 204         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 205
 206         /* lowest numbered transcoder will be designated master */
 207         crtc_state->mst_master_transcoder =
 208                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 209
 210         return 0;
 211 }
 212
 213 /*
 214  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 215  * that shares the same MST stream as mode changed,
 216  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 217  * a fastset when possible.
 218  */
 219 static int
 220 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 221                                        struct intel_atomic_state *state)
 222 {
 223         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 224         struct drm_connector_list_iter connector_list_iter;
 225         struct intel_connector *connector_iter;
 226
 227         if (INTEL_GEN(dev_priv) < 12)
 228                 return  0;
 229
 230         if (!intel_connector_needs_modeset(state, &connector->base))
 231                 return 0;
 232
 233         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 234         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 235                 struct intel_digital_connector_state *conn_iter_state;
 236                 struct intel_crtc_state *crtc_state;
 237                 struct intel_crtc *crtc;
 238                 int ret;
 239
 240                 if (connector_iter->mst_port != connector->mst_port ||
 241                     connector_iter == connector)
 242                         continue;
 243
 244                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 245                                                                            connector_iter);
 246                 if (IS_ERR(conn_iter_state)) {
 247                         drm_connector_list_iter_end(&connector_list_iter);
 248                         return PTR_ERR(conn_iter_state);
 249                 }
 250
 251                 if (!conn_iter_state->base.crtc)
 252                         continue;
 253
 254                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 255                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 256                 if (IS_ERR(crtc_state)) {
 257                         drm_connector_list_iter_end(&connector_list_iter);
 258                         return PTR_ERR(crtc_state);
 259                 }
 260
 261                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 262                 if (ret) {
 263                         drm_connector_list_iter_end(&connector_list_iter);
 264                         return ret;
 265                 }
 266                 crtc_state->uapi.mode_changed = true;
 267         }
 268         drm_connector_list_iter_end(&connector_list_iter);
 269
 270         return 0;
 271 }
 272
 273 static int
 274 intel_dp_mst_atomic_check(struct drm_connector *connector,
 275                           struct drm_atomic_state *_state)
 276 {
 277         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 278         struct drm_connector_state *new_conn_state =
 279                 drm_atomic_get_new_connector_state(&state->base, connector);
 280         struct drm_connector_state *old_conn_state =
 281                 drm_atomic_get_old_connector_state(&state->base, connector);
 282         struct intel_connector *intel_connector =
 283                 to_intel_connector(connector);
 284         struct drm_crtc *new_crtc = new_conn_state->crtc;
 285         struct drm_dp_mst_topology_mgr *mgr;
 286         int ret;
 287
 288         ret = intel_digital_connector_atomic_check(connector, &state->base);
 289         if (ret)
 290                 return ret;
 291
 292         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 293         if (ret)
 294                 return ret;
 295
 296         if (!old_conn_state->crtc)
 297                 return 0;
 298
 299         /* We only want to free VCPI if this state disables the CRTC on this
 300          * connector
 301          */
 302         if (new_crtc) {
 303                 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
 304                 struct intel_crtc_state *crtc_state =
 305                         intel_atomic_get_new_crtc_state(state, intel_crtc);
 306
 307                 if (!crtc_state ||
 308                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
 309                     crtc_state->uapi.enable)
 310                         return 0;
 311         }
 312
 313         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
 314         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
 315                                                intel_connector->port);
 316
 317         return ret;
 318 }
 319
 320 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 321                                  struct intel_encoder *encoder,
 322                                  const struct intel_crtc_state *old_crtc_state,
 323                                  const struct drm_connector_state *old_conn_state)
 324 {
 325         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 326         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 327         struct intel_dp *intel_dp = &intel_dig_port->dp;
 328         struct intel_connector *connector =
 329                 to_intel_connector(old_conn_state->connector);
 330         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 331         int ret;
 332
 333         drm_dbg_kms(&i915->drm, "active links %d\n",
 334                     intel_dp->active_mst_links);
 335
 336         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
 337
 338         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 339         if (ret) {
 340                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 341         }
 342         if (old_crtc_state->has_audio)
 343                 intel_audio_codec_disable(encoder,
 344                                           old_crtc_state, old_conn_state);
 345 }
 346
 347 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 348                                       struct intel_encoder *encoder,
 349                                       const struct intel_crtc_state *old_crtc_state,
 350                                       const struct drm_connector_state *old_conn_state)
 351 {
 352         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 353         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 354         struct intel_dp *intel_dp = &intel_dig_port->dp;
 355         struct intel_connector *connector =
 356                 to_intel_connector(old_conn_state->connector);
 357         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 358         bool last_mst_stream;
 359         u32 val;
 360
 361         intel_dp->active_mst_links--;
 362         last_mst_stream = intel_dp->active_mst_links == 0;
 363         drm_WARN_ON(&dev_priv->drm,
 364                     INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
 365                     !intel_dp_mst_is_master_trans(old_crtc_state));
 366
 367         intel_crtc_vblank_off(old_crtc_state);
 368
 369         intel_disable_pipe(old_crtc_state);
 370
 371         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 372
 373         val = intel_de_read(dev_priv,
 374                             TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
 375         val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
 376         intel_de_write(dev_priv,
 377                        TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 378                        val);
 379
 380         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 381                                   DP_TP_STATUS_ACT_SENT, 1))
 382                 drm_err(&dev_priv->drm,
 383                         "Timed out waiting for ACT sent when disabling\n");
 384         drm_dp_check_act_status(&intel_dp->mst_mgr);
 385
 386         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
 387
 388         intel_ddi_disable_transcoder_func(old_crtc_state);
 389
 390         if (INTEL_GEN(dev_priv) >= 9)
 391                 skl_scaler_disable(old_crtc_state);
 392         else
 393                 ilk_pfit_disable(old_crtc_state);
 394
 395         /*
 396          * Power down mst path before disabling the port, otherwise we end
 397          * up getting interrupts from the sink upon detecting link loss.
 398          */
 399         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 400                                      false);
 401
 402         /*
 403          * BSpec 4287: disable DIP after the transcoder is disabled and before
 404          * the transcoder clock select is set to none.
 405          */
 406         if (last_mst_stream)
 407                 intel_dp_set_infoframes(&intel_dig_port->base, false,
 408                                         old_crtc_state, NULL);
 409         /*
 410          * From TGL spec: "If multi-stream slave transcoder: Configure
 411          * Transcoder Clock Select to direct no clock to the transcoder"
 412          *
 413          * From older GENs spec: "Configure Transcoder Clock Select to direct
 414          * no clock to the transcoder"
 415          */
 416         if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
 417                 intel_ddi_disable_pipe_clock(old_crtc_state);
 418
 419
 420         intel_mst->connector = NULL;
 421         if (last_mst_stream)
 422                 intel_dig_port->base.post_disable(state, &intel_dig_port->base,
 423                                                   old_crtc_state, NULL);
 424
 425         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 426                     intel_dp->active_mst_links);
 427 }
 428
 429 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 430                                         struct intel_encoder *encoder,
 431                                         const struct intel_crtc_state *pipe_config,
 432                                         const struct drm_connector_state *conn_state)
 433 {
 434         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 435         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 436         struct intel_dp *intel_dp = &intel_dig_port->dp;
 437
 438         if (intel_dp->active_mst_links == 0)
 439                 intel_dig_port->base.pre_pll_enable(state, &intel_dig_port->base,
 440                                                     pipe_config, NULL);
 441 }
 442
 443 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 444                                     struct intel_encoder *encoder,
 445                                     const struct intel_crtc_state *pipe_config,
 446                                     const struct drm_connector_state *conn_state)
 447 {
 448         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 449         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 450         struct intel_dp *intel_dp = &intel_dig_port->dp;
 451         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 452         struct intel_connector *connector =
 453                 to_intel_connector(conn_state->connector);
 454         int ret;
 455         u32 temp;
 456         bool first_mst_stream;
 457
 458         /* MST encoders are bound to a crtc, not to a connector,
 459          * force the mapping here for get_hw_state.
 460          */
 461         connector->encoder = encoder;
 462         intel_mst->connector = connector;
 463         first_mst_stream = intel_dp->active_mst_links == 0;
 464         drm_WARN_ON(&dev_priv->drm,
 465                     INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
 466                     !intel_dp_mst_is_master_trans(pipe_config));
 467
 468         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 469                     intel_dp->active_mst_links);
 470
 471         if (first_mst_stream)
 472                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
 473
 474         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 475
 476         if (first_mst_stream)
 477                 intel_dig_port->base.pre_enable(state, &intel_dig_port->base,
 478                                                 pipe_config, NULL);
 479
 480         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
 481                                        connector->port,
 482                                        pipe_config->pbn,
 483                                        pipe_config->dp_m_n.tu);
 484         if (!ret)
 485                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
 486
 487         intel_dp->active_mst_links++;
 488         temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
 489         intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
 490
 491         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 492
 493         /*
 494          * Before Gen 12 this is not done as part of
 495          * intel_dig_port->base.pre_enable() and should be done here. For
 496          * Gen 12+ the step in which this should be done is different for the
 497          * first MST stream, so it's done on the DDI for the first stream and
 498          * here for the following ones.
 499          */
 500         if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
 501                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
 502
 503         intel_ddi_set_dp_msa(pipe_config, conn_state);
 504
 505         intel_dp_set_m_n(pipe_config, M1_N1);
 506 }
 507
 508 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 509                                 struct intel_encoder *encoder,
 510                                 const struct intel_crtc_state *pipe_config,
 511                                 const struct drm_connector_state *conn_state)
 512 {
 513         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 514         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 515         struct intel_dp *intel_dp = &intel_dig_port->dp;
 516         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 517
 518         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 519
 520         intel_ddi_enable_transcoder_func(encoder, pipe_config);
 521
 522         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 523                     intel_dp->active_mst_links);
 524
 525         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 526                                   DP_TP_STATUS_ACT_SENT, 1))
 527                 drm_err(&dev_priv->drm, "Timed out waiting for ACT sent\n");
 528
 529         drm_dp_check_act_status(&intel_dp->mst_mgr);
 530
 531         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 532
 533         intel_enable_pipe(pipe_config);
 534
 535         intel_crtc_vblank_on(pipe_config);
 536
 537         if (pipe_config->has_audio)
 538                 intel_audio_codec_enable(encoder, pipe_config, conn_state);
 539 }
 540
 541 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 542                                       enum pipe *pipe)
 543 {
 544         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 545         *pipe = intel_mst->pipe;
 546         if (intel_mst->connector)
 547                 return true;
 548         return false;
 549 }
 550
 551 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 552                                         struct intel_crtc_state *pipe_config)
 553 {
 554         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 555         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 556
 557         intel_ddi_get_config(&intel_dig_port->base, pipe_config);
 558 }
 559
 560 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 561 {
 562         struct intel_connector *intel_connector = to_intel_connector(connector);
 563         struct intel_dp *intel_dp = intel_connector->mst_port;
 564         struct edid *edid;
 565         int ret;
 566
 567         if (drm_connector_is_unregistered(connector))
 568                 return intel_connector_update_modes(connector, NULL);
 569
 570         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 571         ret = intel_connector_update_modes(connector, edid);
 572         kfree(edid);
 573
 574         return ret;
 575 }
 576
 577 static int
 578 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 579 {
 580         struct intel_connector *intel_connector = to_intel_connector(connector);
 581         int ret;
 582
 583         ret = drm_dp_mst_connector_late_register(connector,
 584                                                  intel_connector->port);
 585         if (ret < 0)
 586                 return ret;
 587
 588         ret = intel_connector_register(connector);
 589         if (ret < 0)
 590                 drm_dp_mst_connector_early_unregister(connector,
 591                                                       intel_connector->port);
 592
 593         return ret;
 594 }
 595
 596 static void
 597 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 598 {
 599         struct intel_connector *intel_connector = to_intel_connector(connector);
 600
 601         intel_connector_unregister(connector);
 602         drm_dp_mst_connector_early_unregister(connector,
 603                                               intel_connector->port);
 604 }
 605
 606 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 607         .fill_modes = drm_helper_probe_single_connector_modes,
 608         .atomic_get_property = intel_digital_connector_atomic_get_property,
 609         .atomic_set_property = intel_digital_connector_atomic_set_property,
 610         .late_register = intel_dp_mst_connector_late_register,
 611         .early_unregister = intel_dp_mst_connector_early_unregister,
 612         .destroy = intel_connector_destroy,
 613         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 614         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 615 };
 616
 617 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 618 {
 619         return intel_dp_mst_get_ddc_modes(connector);
 620 }
 621
 622 static enum drm_mode_status
 623 intel_dp_mst_mode_valid(struct drm_connector *connector,
 624                         struct drm_display_mode *mode)
 625 {
 626         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 627         struct intel_connector *intel_connector = to_intel_connector(connector);
 628         struct intel_dp *intel_dp = intel_connector->mst_port;
 629         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 630         int max_rate, mode_rate, max_lanes, max_link_clock;
 631
 632         if (drm_connector_is_unregistered(connector))
 633                 return MODE_ERROR;
 634
 635         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 636                 return MODE_NO_DBLESCAN;
 637
 638         max_link_clock = intel_dp_max_link_rate(intel_dp);
 639         max_lanes = intel_dp_max_lane_count(intel_dp);
 640
 641         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 642         mode_rate = intel_dp_link_required(mode->clock, 18);
 643
 644         /* TODO - validate mode against available PBN for link */
 645         if (mode->clock < 10000)
 646                 return MODE_CLOCK_LOW;
 647
 648         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 649                 return MODE_H_ILLEGAL;
 650
 651         if (mode_rate > max_rate || mode->clock > max_dotclk)
 652                 return MODE_CLOCK_HIGH;
 653
 654         return intel_mode_valid_max_plane_size(dev_priv, mode);
 655 }
 656
 657 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 658                                                          struct drm_connector_state *state)
 659 {
 660         struct intel_connector *intel_connector = to_intel_connector(connector);
 661         struct intel_dp *intel_dp = intel_connector->mst_port;
 662         struct intel_crtc *crtc = to_intel_crtc(state->crtc);
 663
 664         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 665 }
 666
 667 static int
 668 intel_dp_mst_detect(struct drm_connector *connector,
 669                     struct drm_modeset_acquire_ctx *ctx, bool force)
 670 {
 671         struct intel_connector *intel_connector = to_intel_connector(connector);
 672         struct intel_dp *intel_dp = intel_connector->mst_port;
 673
 674         if (drm_connector_is_unregistered(connector))
 675                 return connector_status_disconnected;
 676
 677         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 678                                       intel_connector->port);
 679 }
 680
 681 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 682         .get_modes = intel_dp_mst_get_modes,
 683         .mode_valid = intel_dp_mst_mode_valid,
 684         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 685         .atomic_check = intel_dp_mst_atomic_check,
 686         .detect_ctx = intel_dp_mst_detect,
 687 };
 688
 689 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 690 {
 691         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 692
 693         drm_encoder_cleanup(encoder);
 694         kfree(intel_mst);
 695 }
 696
 697 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 698         .destroy = intel_dp_mst_encoder_destroy,
 699 };
 700
 701 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 702 {
 703         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 704                 enum pipe pipe;
 705                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 706                         return false;
 707                 return true;
 708         }
 709         return false;
 710 }
 711
 712 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 713 {
 714         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 715         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 716         struct drm_device *dev = intel_dig_port->base.base.dev;
 717         struct drm_i915_private *dev_priv = to_i915(dev);
 718         struct intel_connector *intel_connector;
 719         struct drm_connector *connector;
 720         enum pipe pipe;
 721         int ret;
 722
 723         intel_connector = intel_connector_alloc();
 724         if (!intel_connector)
 725                 return NULL;
 726
 727         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 728         intel_connector->mst_port = intel_dp;
 729         intel_connector->port = port;
 730         drm_dp_mst_get_port_malloc(port);
 731
 732         connector = &intel_connector->base;
 733         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 734                                  DRM_MODE_CONNECTOR_DisplayPort);
 735         if (ret) {
 736                 intel_connector_free(intel_connector);
 737                 return NULL;
 738         }
 739
 740         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 741
 742         for_each_pipe(dev_priv, pipe) {
 743                 struct drm_encoder *enc =
 744                         &intel_dp->mst_encoders[pipe]->base.base;
 745
 746                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 747                 if (ret)
 748                         goto err;
 749         }
 750
 751         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 752         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 753
 754         ret = drm_connector_set_path_property(connector, pathprop);
 755         if (ret)
 756                 goto err;
 757
 758         intel_attach_force_audio_property(connector);
 759         intel_attach_broadcast_rgb_property(connector);
 760
 761         /*
 762          * Reuse the prop from the SST connector because we're
 763          * not allowed to create new props after device registration.
 764          */
 765         connector->max_bpc_property =
 766                 intel_dp->attached_connector->base.max_bpc_property;
 767         if (connector->max_bpc_property)
 768                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 769
 770         return connector;
 771
 772 err:
 773         drm_connector_cleanup(connector);
 774         return NULL;
 775 }
 776
 777 static void
 778 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
 779 {
 780         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 781
 782         intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
 783 }
 784
 785 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 786         .add_connector = intel_dp_add_mst_connector,
 787         .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
 788 };
 789
 790 static struct intel_dp_mst_encoder *
 791 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
 792 {
 793         struct intel_dp_mst_encoder *intel_mst;
 794         struct intel_encoder *intel_encoder;
 795         struct drm_device *dev = intel_dig_port->base.base.dev;
 796
 797         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 798
 799         if (!intel_mst)
 800                 return NULL;
 801
 802         intel_mst->pipe = pipe;
 803         intel_encoder = &intel_mst->base;
 804         intel_mst->primary = intel_dig_port;
 805
 806         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 807                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 808
 809         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 810         intel_encoder->power_domain = intel_dig_port->base.power_domain;
 811         intel_encoder->port = intel_dig_port->base.port;
 812         intel_encoder->cloneable = 0;
 813         /*
 814          * This is wrong, but broken userspace uses the intersection
 815          * of possible_crtcs of all the encoders of a given connector
 816          * to figure out which crtcs can drive said connector. What
 817          * should be used instead is the union of possible_crtcs.
 818          * To keep such userspace functioning we must misconfigure
 819          * this to make sure the intersection is not empty :(
 820          */
 821         intel_encoder->pipe_mask = ~0;
 822
 823         intel_encoder->compute_config = intel_dp_mst_compute_config;
 824         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 825         intel_encoder->disable = intel_mst_disable_dp;
 826         intel_encoder->post_disable = intel_mst_post_disable_dp;
 827         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 828         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 829         intel_encoder->enable = intel_mst_enable_dp;
 830         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 831         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 832
 833         return intel_mst;
 834
 835 }
 836
 837 static bool
 838 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
 839 {
 840         struct intel_dp *intel_dp = &intel_dig_port->dp;
 841         struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 842         enum pipe pipe;
 843
 844         for_each_pipe(dev_priv, pipe)
 845                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
 846         return true;
 847 }
 848
 849 int
 850 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
 851 {
 852         return intel_dig_port->dp.active_mst_links;
 853 }
 854
 855 int
 856 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
 857 {
 858         struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
 859         struct intel_dp *intel_dp = &intel_dig_port->dp;
 860         enum port port = intel_dig_port->base.port;
 861         int ret;
 862
 863         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 864                 return 0;
 865
 866         if (INTEL_GEN(i915) < 12 && port == PORT_A)
 867                 return 0;
 868
 869         if (INTEL_GEN(i915) < 11 && port == PORT_E)
 870                 return 0;
 871
 872         intel_dp->mst_mgr.cbs = &mst_cbs;
 873
 874         /* create encoders */
 875         intel_dp_create_fake_mst_encoders(intel_dig_port);
 876         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 877                                            &intel_dp->aux, 16, 3, conn_base_id);
 878         if (ret)
 879                 return ret;
 880
 881         intel_dp->can_mst = true;
 882
 883         return 0;
 884 }
 885
 886 void
 887 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
 888 {
 889         struct intel_dp *intel_dp = &intel_dig_port->dp;
 890
 891         if (!intel_dp->can_mst)
 892                 return;
 893
 894         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
 895         /* encoders will get killed by normal cleanup */
 896 }
 897
 898 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
 899 {
 900         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
 901 }
 902
 903 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
 904 {
 905         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
 906                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
 907 }