drivers/gpu/drm/i915/gvt/firmware.c

   1 /*
   2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Zhi Wang <zhi.a.wang@intel.com>
  25  *
  26  * Contributors:
  27  *    Changbin Du <changbin.du@intel.com>
  28  *
  29  */
  30
  31 #include <linux/firmware.h>
  32 #include <linux/crc32.h>
  33
  34 #include "i915_drv.h"
  35 #include "gvt.h"
  36 #include "i915_pvinfo.h"
  37
  38 #define FIRMWARE_VERSION (0x0)
  39
  40 struct gvt_firmware_header {
  41         u64 magic;
  42         u32 crc32;              /* protect the data after this field */
  43         u32 version;
  44         u64 cfg_space_size;
  45         u64 cfg_space_offset;   /* offset in the file */
  46         u64 mmio_size;
  47         u64 mmio_offset;        /* offset in the file */
  48         unsigned char data[1];
  49 };
  50
  51 #define dev_to_drm_minor(d) dev_get_drvdata((d))
  52
  53 static ssize_t
  54 gvt_firmware_read(struct file *filp, struct kobject *kobj,
  55              struct bin_attribute *attr, char *buf,
  56              loff_t offset, size_t count)
  57 {
  58         memcpy(buf, attr->private + offset, count);
  59         return count;
  60 }
  61
  62 static struct bin_attribute firmware_attr = {
  63         .attr = {.name = "gvt_firmware", .mode = (S_IRUSR)},
  64         .read = gvt_firmware_read,
  65         .write = NULL,
  66         .mmap = NULL,
  67 };
  68
  69 static int expose_firmware_sysfs(struct intel_gvt *gvt)
  70 {
  71         struct drm_i915_private *dev_priv = gvt->dev_priv;
  72         struct intel_gvt_device_info *info = &gvt->device_info;
  73         struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
  74         struct intel_gvt_mmio_info *e;
  75         struct gvt_firmware_header *h;
  76         void *firmware;
  77         void *p;
  78         unsigned long size, crc32_start;
  79         int i;
  80         int ret;
  81
  82         size = sizeof(*h) + info->mmio_size + info->cfg_space_size;
  83         firmware = vzalloc(size);
  84         if (!firmware)
  85                 return -ENOMEM;
  86
  87         h = firmware;
  88
  89         h->magic = VGT_MAGIC;
  90         h->version = FIRMWARE_VERSION;
  91         h->cfg_space_size = info->cfg_space_size;
  92         h->cfg_space_offset = offsetof(struct gvt_firmware_header, data);
  93         h->mmio_size = info->mmio_size;
  94         h->mmio_offset = h->cfg_space_offset + h->cfg_space_size;
  95
  96         p = firmware + h->cfg_space_offset;
  97
  98         for (i = 0; i < h->cfg_space_size; i += 4)
  99                 pci_read_config_dword(pdev, i, p + i);
 100
 101         memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size);
 102
 103         p = firmware + h->mmio_offset;
 104
 105         hash_for_each(gvt->mmio.mmio_info_table, i, e, node)
 106                 *(u32 *)(p + e->offset) = I915_READ_NOTRACE(_MMIO(e->offset));
 107
 108         memcpy(gvt->firmware.mmio, p, info->mmio_size);
 109
 110         crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
 111         h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start);
 112
 113         firmware_attr.size = size;
 114         firmware_attr.private = firmware;
 115
 116         ret = device_create_bin_file(&pdev->dev, &firmware_attr);
 117         if (ret) {
 118                 vfree(firmware);
 119                 return ret;
 120         }
 121         return 0;
 122 }
 123
 124 static void clean_firmware_sysfs(struct intel_gvt *gvt)
 125 {
 126         struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
 127
 128         device_remove_bin_file(&pdev->dev, &firmware_attr);
 129         vfree(firmware_attr.private);
 130 }
 131
 132 /**
 133  * intel_gvt_free_firmware - free GVT firmware
 134  * @gvt: intel gvt device
 135  *
 136  */
 137 void intel_gvt_free_firmware(struct intel_gvt *gvt)
 138 {
 139         if (!gvt->firmware.firmware_loaded)
 140                 clean_firmware_sysfs(gvt);
 141
 142         kfree(gvt->firmware.cfg_space);
 143         kfree(gvt->firmware.mmio);
 144 }
 145
 146 static int verify_firmware(struct intel_gvt *gvt,
 147                            const struct firmware *fw)
 148 {
 149         struct intel_gvt_device_info *info = &gvt->device_info;
 150         struct drm_i915_private *dev_priv = gvt->dev_priv;
 151         struct pci_dev *pdev = dev_priv->drm.pdev;
 152         struct gvt_firmware_header *h;
 153         unsigned long id, crc32_start;
 154         const void *mem;
 155         const char *item;
 156         u64 file, request;
 157
 158         h = (struct gvt_firmware_header *)fw->data;
 159
 160         crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
 161         mem = fw->data + crc32_start;
 162
 163 #define VERIFY(s, a, b) do { \
 164         item = (s); file = (u64)(a); request = (u64)(b); \
 165         if ((a) != (b)) \
 166                 goto invalid_firmware; \
 167 } while (0)
 168
 169         VERIFY("magic number", h->magic, VGT_MAGIC);
 170         VERIFY("version", h->version, FIRMWARE_VERSION);
 171         VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start));
 172         VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size);
 173         VERIFY("mmio size", h->mmio_size, info->mmio_size);
 174
 175         mem = (fw->data + h->cfg_space_offset);
 176
 177         id = *(u16 *)(mem + PCI_VENDOR_ID);
 178         VERIFY("vender id", id, pdev->vendor);
 179
 180         id = *(u16 *)(mem + PCI_DEVICE_ID);
 181         VERIFY("device id", id, pdev->device);
 182
 183         id = *(u8 *)(mem + PCI_REVISION_ID);
 184         VERIFY("revision id", id, pdev->revision);
 185
 186 #undef VERIFY
 187         return 0;
 188
 189 invalid_firmware:
 190         gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
 191                      item, file, request);
 192         return -EINVAL;
 193 }
 194
 195 #define GVT_FIRMWARE_PATH "i915/gvt"
 196
 197 /**
 198  * intel_gvt_load_firmware - load GVT firmware
 199  * @gvt: intel gvt device
 200  *
 201  */
 202 int intel_gvt_load_firmware(struct intel_gvt *gvt)
 203 {
 204         struct intel_gvt_device_info *info = &gvt->device_info;
 205         struct drm_i915_private *dev_priv = gvt->dev_priv;
 206         struct pci_dev *pdev = dev_priv->drm.pdev;
 207         struct intel_gvt_firmware *firmware = &gvt->firmware;
 208         struct gvt_firmware_header *h;
 209         const struct firmware *fw;
 210         char *path;
 211         void *mem;
 212         int ret;
 213
 214         path = kmalloc(PATH_MAX, GFP_KERNEL);
 215         if (!path)
 216                 return -ENOMEM;
 217
 218         mem = kmalloc(info->cfg_space_size, GFP_KERNEL);
 219         if (!mem) {
 220                 kfree(path);
 221                 return -ENOMEM;
 222         }
 223
 224         firmware->cfg_space = mem;
 225
 226         mem = kmalloc(info->mmio_size, GFP_KERNEL);
 227         if (!mem) {
 228                 kfree(path);
 229                 kfree(firmware->cfg_space);
 230                 return -ENOMEM;
 231         }
 232
 233         firmware->mmio = mem;
 234
 235         sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state",
 236                  GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
 237                  pdev->revision);
 238
 239         gvt_dbg_core("request hw state firmware %s...\n", path);
 240
 241         ret = request_firmware(&fw, path, &dev_priv->drm.pdev->dev);
 242         kfree(path);
 243
 244         if (ret)
 245                 goto expose_firmware;
 246
 247         gvt_dbg_core("success.\n");
 248
 249         ret = verify_firmware(gvt, fw);
 250         if (ret)
 251                 goto out_free_fw;
 252
 253         gvt_dbg_core("verified.\n");
 254
 255         h = (struct gvt_firmware_header *)fw->data;
 256
 257         memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset,
 258                h->cfg_space_size);
 259         memcpy(firmware->mmio, fw->data + h->mmio_offset,
 260                h->mmio_size);
 261
 262         release_firmware(fw);
 263         firmware->firmware_loaded = true;
 264         return 0;
 265
 266 out_free_fw:
 267         release_firmware(fw);
 268 expose_firmware:
 269         expose_firmware_sysfs(gvt);
 270         return 0;
 271 }