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[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / i915 / gvt / firmware.c
1 /*
2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Zhi Wang <zhi.a.wang@intel.com>
25 *
26 * Contributors:
27 * Changbin Du <changbin.du@intel.com>
28 *
29 */
30
31 #include <linux/firmware.h>
32 #include <linux/crc32.h>
33
34 #include "i915_drv.h"
35 #include "gvt.h"
36 #include "i915_pvinfo.h"
37
38 #define FIRMWARE_VERSION (0x0)
39
40 struct gvt_firmware_header {
41 u64 magic;
42 u32 crc32; /* protect the data after this field */
43 u32 version;
44 u64 cfg_space_size;
45 u64 cfg_space_offset; /* offset in the file */
46 u64 mmio_size;
47 u64 mmio_offset; /* offset in the file */
48 unsigned char data[1];
49 };
50
51 #define dev_to_drm_minor(d) dev_get_drvdata((d))
52
53 static ssize_t
54 gvt_firmware_read(struct file *filp, struct kobject *kobj,
55 struct bin_attribute *attr, char *buf,
56 loff_t offset, size_t count)
57 {
58 memcpy(buf, attr->private + offset, count);
59 return count;
60 }
61
62 static struct bin_attribute firmware_attr = {
63 .attr = {.name = "gvt_firmware", .mode = (S_IRUSR)},
64 .read = gvt_firmware_read,
65 .write = NULL,
66 .mmap = NULL,
67 };
68
69 static int expose_firmware_sysfs(struct intel_gvt *gvt)
70 {
71 struct drm_i915_private *dev_priv = gvt->dev_priv;
72 struct intel_gvt_device_info *info = &gvt->device_info;
73 struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
74 struct intel_gvt_mmio_info *e;
75 struct gvt_firmware_header *h;
76 void *firmware;
77 void *p;
78 unsigned long size;
79 int i;
80 int ret;
81
82 size = sizeof(*h) + info->mmio_size + info->cfg_space_size - 1;
83 firmware = vzalloc(size);
84 if (!firmware)
85 return -ENOMEM;
86
87 h = firmware;
88
89 h->magic = VGT_MAGIC;
90 h->version = FIRMWARE_VERSION;
91 h->cfg_space_size = info->cfg_space_size;
92 h->cfg_space_offset = offsetof(struct gvt_firmware_header, data);
93 h->mmio_size = info->mmio_size;
94 h->mmio_offset = h->cfg_space_offset + h->cfg_space_size;
95
96 p = firmware + h->cfg_space_offset;
97
98 for (i = 0; i < h->cfg_space_size; i += 4)
99 pci_read_config_dword(pdev, i, p + i);
100
101 memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size);
102
103 p = firmware + h->mmio_offset;
104
105 hash_for_each(gvt->mmio.mmio_info_table, i, e, node) {
106 int j;
107
108 for (j = 0; j < e->length; j += 4)
109 *(u32 *)(p + e->offset + j) =
110 I915_READ_NOTRACE(_MMIO(e->offset + j));
111 }
112
113 memcpy(gvt->firmware.mmio, p, info->mmio_size);
114
115 firmware_attr.size = size;
116 firmware_attr.private = firmware;
117
118 ret = device_create_bin_file(&pdev->dev, &firmware_attr);
119 if (ret) {
120 vfree(firmware);
121 return ret;
122 }
123 return 0;
124 }
125
126 static void clean_firmware_sysfs(struct intel_gvt *gvt)
127 {
128 struct pci_dev *pdev = gvt->dev_priv->drm.pdev;
129
130 device_remove_bin_file(&pdev->dev, &firmware_attr);
131 vfree(firmware_attr.private);
132 }
133
134 /**
135 * intel_gvt_free_firmware - free GVT firmware
136 * @gvt: intel gvt device
137 *
138 */
139 void intel_gvt_free_firmware(struct intel_gvt *gvt)
140 {
141 if (!gvt->firmware.firmware_loaded)
142 clean_firmware_sysfs(gvt);
143
144 kfree(gvt->firmware.cfg_space);
145 kfree(gvt->firmware.mmio);
146 }
147
148 static int verify_firmware(struct intel_gvt *gvt,
149 const struct firmware *fw)
150 {
151 struct intel_gvt_device_info *info = &gvt->device_info;
152 struct drm_i915_private *dev_priv = gvt->dev_priv;
153 struct pci_dev *pdev = dev_priv->drm.pdev;
154 struct gvt_firmware_header *h;
155 unsigned long id, crc32_start;
156 const void *mem;
157 const char *item;
158 u64 file, request;
159
160 h = (struct gvt_firmware_header *)fw->data;
161
162 crc32_start = offsetof(struct gvt_firmware_header, crc32) + 4;
163 mem = fw->data + crc32_start;
164
165 #define VERIFY(s, a, b) do { \
166 item = (s); file = (u64)(a); request = (u64)(b); \
167 if ((a) != (b)) \
168 goto invalid_firmware; \
169 } while (0)
170
171 VERIFY("magic number", h->magic, VGT_MAGIC);
172 VERIFY("version", h->version, FIRMWARE_VERSION);
173 VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start));
174 VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size);
175 VERIFY("mmio size", h->mmio_size, info->mmio_size);
176
177 mem = (fw->data + h->cfg_space_offset);
178
179 id = *(u16 *)(mem + PCI_VENDOR_ID);
180 VERIFY("vender id", id, pdev->vendor);
181
182 id = *(u16 *)(mem + PCI_DEVICE_ID);
183 VERIFY("device id", id, pdev->device);
184
185 id = *(u8 *)(mem + PCI_REVISION_ID);
186 VERIFY("revision id", id, pdev->revision);
187
188 #undef VERIFY
189 return 0;
190
191 invalid_firmware:
192 gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n",
193 item, file, request);
194 return -EINVAL;
195 }
196
197 #define GVT_FIRMWARE_PATH "i915/gvt"
198
199 /**
200 * intel_gvt_load_firmware - load GVT firmware
201 * @gvt: intel gvt device
202 *
203 */
204 int intel_gvt_load_firmware(struct intel_gvt *gvt)
205 {
206 struct intel_gvt_device_info *info = &gvt->device_info;
207 struct drm_i915_private *dev_priv = gvt->dev_priv;
208 struct pci_dev *pdev = dev_priv->drm.pdev;
209 struct intel_gvt_firmware *firmware = &gvt->firmware;
210 struct gvt_firmware_header *h;
211 const struct firmware *fw;
212 char *path;
213 void *mem;
214 int ret;
215
216 path = kmalloc(PATH_MAX, GFP_KERNEL);
217 if (!path)
218 return -ENOMEM;
219
220 mem = kmalloc(info->cfg_space_size, GFP_KERNEL);
221 if (!mem) {
222 kfree(path);
223 return -ENOMEM;
224 }
225
226 firmware->cfg_space = mem;
227
228 mem = kmalloc(info->mmio_size, GFP_KERNEL);
229 if (!mem) {
230 kfree(path);
231 kfree(firmware->cfg_space);
232 return -ENOMEM;
233 }
234
235 firmware->mmio = mem;
236
237 sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%04x.golden_hw_state",
238 GVT_FIRMWARE_PATH, pdev->vendor, pdev->device,
239 pdev->revision);
240
241 gvt_dbg_core("request hw state firmware %s...\n", path);
242
243 ret = request_firmware(&fw, path, &dev_priv->drm.pdev->dev);
244 kfree(path);
245
246 if (ret)
247 goto expose_firmware;
248
249 gvt_dbg_core("success.\n");
250
251 ret = verify_firmware(gvt, fw);
252 if (ret)
253 goto out_free_fw;
254
255 gvt_dbg_core("verified.\n");
256
257 h = (struct gvt_firmware_header *)fw->data;
258
259 memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset,
260 h->cfg_space_size);
261 memcpy(firmware->mmio, fw->data + h->mmio_offset,
262 h->mmio_size);
263
264 release_firmware(fw);
265 firmware->firmware_loaded = true;
266 return 0;
267
268 out_free_fw:
269 release_firmware(fw);
270 expose_firmware:
271 expose_firmware_sysfs(gvt);
272 return 0;
273 }