2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
34 #include "intel_drv.h"
35 #include "intel_ringbuffer.h"
36 #include <drm/i915_drm.h>
39 #define DRM_I915_RING_DEBUG 1
42 #if defined(CONFIG_DEBUG_FS)
50 static const char *yesno(int v
)
52 return v
? "yes" : "no";
55 static int i915_capabilities(struct seq_file
*m
, void *data
)
57 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
58 struct drm_device
*dev
= node
->minor
->dev
;
59 const struct intel_device_info
*info
= INTEL_INFO(dev
);
61 seq_printf(m
, "gen: %d\n", info
->gen
);
62 seq_printf(m
, "pch: %d\n", INTEL_PCH_TYPE(dev
));
63 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
64 #define DEV_INFO_SEP ;
72 static const char *get_pin_flag(struct drm_i915_gem_object
*obj
)
74 if (obj
->user_pin_count
> 0)
76 else if (obj
->pin_count
> 0)
82 static const char *get_tiling_flag(struct drm_i915_gem_object
*obj
)
84 switch (obj
->tiling_mode
) {
86 case I915_TILING_NONE
: return " ";
87 case I915_TILING_X
: return "X";
88 case I915_TILING_Y
: return "Y";
92 static const char *cache_level_str(int type
)
95 case I915_CACHE_NONE
: return " uncached";
96 case I915_CACHE_LLC
: return " snooped (LLC)";
97 case I915_CACHE_LLC_MLC
: return " snooped (LLC+MLC)";
103 describe_obj(struct seq_file
*m
, struct drm_i915_gem_object
*obj
)
105 seq_printf(m
, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
108 get_tiling_flag(obj
),
109 obj
->base
.size
/ 1024,
110 obj
->base
.read_domains
,
111 obj
->base
.write_domain
,
112 obj
->last_read_seqno
,
113 obj
->last_write_seqno
,
114 obj
->last_fenced_seqno
,
115 cache_level_str(obj
->cache_level
),
116 obj
->dirty
? " dirty" : "",
117 obj
->madv
== I915_MADV_DONTNEED
? " purgeable" : "");
119 seq_printf(m
, " (name: %d)", obj
->base
.name
);
121 seq_printf(m
, " (pinned x %d)", obj
->pin_count
);
122 if (obj
->fence_reg
!= I915_FENCE_REG_NONE
)
123 seq_printf(m
, " (fence: %d)", obj
->fence_reg
);
124 if (obj
->gtt_space
!= NULL
)
125 seq_printf(m
, " (gtt offset: %08x, size: %08x)",
126 obj
->gtt_offset
, (unsigned int)obj
->gtt_space
->size
);
127 if (obj
->pin_mappable
|| obj
->fault_mappable
) {
129 if (obj
->pin_mappable
)
131 if (obj
->fault_mappable
)
134 seq_printf(m
, " (%s mappable)", s
);
136 if (obj
->ring
!= NULL
)
137 seq_printf(m
, " (%s)", obj
->ring
->name
);
140 static int i915_gem_object_list_info(struct seq_file
*m
, void *data
)
142 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
143 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
144 struct list_head
*head
;
145 struct drm_device
*dev
= node
->minor
->dev
;
146 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
147 struct drm_i915_gem_object
*obj
;
148 size_t total_obj_size
, total_gtt_size
;
151 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
157 seq_printf(m
, "Active:\n");
158 head
= &dev_priv
->mm
.active_list
;
161 seq_printf(m
, "Inactive:\n");
162 head
= &dev_priv
->mm
.inactive_list
;
165 mutex_unlock(&dev
->struct_mutex
);
169 total_obj_size
= total_gtt_size
= count
= 0;
170 list_for_each_entry(obj
, head
, mm_list
) {
172 describe_obj(m
, obj
);
174 total_obj_size
+= obj
->base
.size
;
175 total_gtt_size
+= obj
->gtt_space
->size
;
178 mutex_unlock(&dev
->struct_mutex
);
180 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
181 count
, total_obj_size
, total_gtt_size
);
185 #define count_objects(list, member) do { \
186 list_for_each_entry(obj, list, member) { \
187 size += obj->gtt_space->size; \
189 if (obj->map_and_fenceable) { \
190 mappable_size += obj->gtt_space->size; \
196 static int i915_gem_object_info(struct seq_file
*m
, void* data
)
198 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
199 struct drm_device
*dev
= node
->minor
->dev
;
200 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
201 u32 count
, mappable_count
, purgeable_count
;
202 size_t size
, mappable_size
, purgeable_size
;
203 struct drm_i915_gem_object
*obj
;
206 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
210 seq_printf(m
, "%u objects, %zu bytes\n",
211 dev_priv
->mm
.object_count
,
212 dev_priv
->mm
.object_memory
);
214 size
= count
= mappable_size
= mappable_count
= 0;
215 count_objects(&dev_priv
->mm
.bound_list
, gtt_list
);
216 seq_printf(m
, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
217 count
, mappable_count
, size
, mappable_size
);
219 size
= count
= mappable_size
= mappable_count
= 0;
220 count_objects(&dev_priv
->mm
.active_list
, mm_list
);
221 seq_printf(m
, " %u [%u] active objects, %zu [%zu] bytes\n",
222 count
, mappable_count
, size
, mappable_size
);
224 size
= count
= mappable_size
= mappable_count
= 0;
225 count_objects(&dev_priv
->mm
.inactive_list
, mm_list
);
226 seq_printf(m
, " %u [%u] inactive objects, %zu [%zu] bytes\n",
227 count
, mappable_count
, size
, mappable_size
);
229 size
= count
= purgeable_size
= purgeable_count
= 0;
230 list_for_each_entry(obj
, &dev_priv
->mm
.unbound_list
, gtt_list
) {
231 size
+= obj
->base
.size
, ++count
;
232 if (obj
->madv
== I915_MADV_DONTNEED
)
233 purgeable_size
+= obj
->base
.size
, ++purgeable_count
;
235 seq_printf(m
, "%u unbound objects, %zu bytes\n", count
, size
);
237 size
= count
= mappable_size
= mappable_count
= 0;
238 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, gtt_list
) {
239 if (obj
->fault_mappable
) {
240 size
+= obj
->gtt_space
->size
;
243 if (obj
->pin_mappable
) {
244 mappable_size
+= obj
->gtt_space
->size
;
247 if (obj
->madv
== I915_MADV_DONTNEED
) {
248 purgeable_size
+= obj
->base
.size
;
252 seq_printf(m
, "%u purgeable objects, %zu bytes\n",
253 purgeable_count
, purgeable_size
);
254 seq_printf(m
, "%u pinned mappable objects, %zu bytes\n",
255 mappable_count
, mappable_size
);
256 seq_printf(m
, "%u fault mappable objects, %zu bytes\n",
259 seq_printf(m
, "%zu [%zu] gtt total\n",
260 dev_priv
->mm
.gtt_total
, dev_priv
->mm
.mappable_gtt_total
);
262 mutex_unlock(&dev
->struct_mutex
);
267 static int i915_gem_gtt_info(struct seq_file
*m
, void* data
)
269 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
270 struct drm_device
*dev
= node
->minor
->dev
;
271 uintptr_t list
= (uintptr_t) node
->info_ent
->data
;
272 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
273 struct drm_i915_gem_object
*obj
;
274 size_t total_obj_size
, total_gtt_size
;
277 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
281 total_obj_size
= total_gtt_size
= count
= 0;
282 list_for_each_entry(obj
, &dev_priv
->mm
.bound_list
, gtt_list
) {
283 if (list
== PINNED_LIST
&& obj
->pin_count
== 0)
287 describe_obj(m
, obj
);
289 total_obj_size
+= obj
->base
.size
;
290 total_gtt_size
+= obj
->gtt_space
->size
;
294 mutex_unlock(&dev
->struct_mutex
);
296 seq_printf(m
, "Total %d objects, %zu bytes, %zu GTT size\n",
297 count
, total_obj_size
, total_gtt_size
);
302 static int i915_gem_pageflip_info(struct seq_file
*m
, void *data
)
304 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
305 struct drm_device
*dev
= node
->minor
->dev
;
307 struct intel_crtc
*crtc
;
309 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, base
.head
) {
310 const char pipe
= pipe_name(crtc
->pipe
);
311 const char plane
= plane_name(crtc
->plane
);
312 struct intel_unpin_work
*work
;
314 spin_lock_irqsave(&dev
->event_lock
, flags
);
315 work
= crtc
->unpin_work
;
317 seq_printf(m
, "No flip due on pipe %c (plane %c)\n",
320 if (atomic_read(&work
->pending
) < INTEL_FLIP_COMPLETE
) {
321 seq_printf(m
, "Flip queued on pipe %c (plane %c)\n",
324 seq_printf(m
, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
327 if (work
->enable_stall_check
)
328 seq_printf(m
, "Stall check enabled, ");
330 seq_printf(m
, "Stall check waiting for page flip ioctl, ");
331 seq_printf(m
, "%d prepares\n", atomic_read(&work
->pending
));
333 if (work
->old_fb_obj
) {
334 struct drm_i915_gem_object
*obj
= work
->old_fb_obj
;
336 seq_printf(m
, "Old framebuffer gtt_offset 0x%08x\n", obj
->gtt_offset
);
338 if (work
->pending_flip_obj
) {
339 struct drm_i915_gem_object
*obj
= work
->pending_flip_obj
;
341 seq_printf(m
, "New framebuffer gtt_offset 0x%08x\n", obj
->gtt_offset
);
344 spin_unlock_irqrestore(&dev
->event_lock
, flags
);
350 static int i915_gem_request_info(struct seq_file
*m
, void *data
)
352 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
353 struct drm_device
*dev
= node
->minor
->dev
;
354 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
355 struct intel_ring_buffer
*ring
;
356 struct drm_i915_gem_request
*gem_request
;
359 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
364 for_each_ring(ring
, dev_priv
, i
) {
365 if (list_empty(&ring
->request_list
))
368 seq_printf(m
, "%s requests:\n", ring
->name
);
369 list_for_each_entry(gem_request
,
372 seq_printf(m
, " %d @ %d\n",
374 (int) (jiffies
- gem_request
->emitted_jiffies
));
378 mutex_unlock(&dev
->struct_mutex
);
381 seq_printf(m
, "No requests\n");
386 static void i915_ring_seqno_info(struct seq_file
*m
,
387 struct intel_ring_buffer
*ring
)
389 if (ring
->get_seqno
) {
390 seq_printf(m
, "Current sequence (%s): %d\n",
391 ring
->name
, ring
->get_seqno(ring
, false));
395 static int i915_gem_seqno_info(struct seq_file
*m
, void *data
)
397 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
398 struct drm_device
*dev
= node
->minor
->dev
;
399 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
400 struct intel_ring_buffer
*ring
;
403 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
407 for_each_ring(ring
, dev_priv
, i
)
408 i915_ring_seqno_info(m
, ring
);
410 mutex_unlock(&dev
->struct_mutex
);
416 static int i915_interrupt_info(struct seq_file
*m
, void *data
)
418 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
419 struct drm_device
*dev
= node
->minor
->dev
;
420 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
421 struct intel_ring_buffer
*ring
;
424 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
428 if (IS_VALLEYVIEW(dev
)) {
429 seq_printf(m
, "Display IER:\t%08x\n",
431 seq_printf(m
, "Display IIR:\t%08x\n",
433 seq_printf(m
, "Display IIR_RW:\t%08x\n",
434 I915_READ(VLV_IIR_RW
));
435 seq_printf(m
, "Display IMR:\t%08x\n",
438 seq_printf(m
, "Pipe %c stat:\t%08x\n",
440 I915_READ(PIPESTAT(pipe
)));
442 seq_printf(m
, "Master IER:\t%08x\n",
443 I915_READ(VLV_MASTER_IER
));
445 seq_printf(m
, "Render IER:\t%08x\n",
447 seq_printf(m
, "Render IIR:\t%08x\n",
449 seq_printf(m
, "Render IMR:\t%08x\n",
452 seq_printf(m
, "PM IER:\t\t%08x\n",
453 I915_READ(GEN6_PMIER
));
454 seq_printf(m
, "PM IIR:\t\t%08x\n",
455 I915_READ(GEN6_PMIIR
));
456 seq_printf(m
, "PM IMR:\t\t%08x\n",
457 I915_READ(GEN6_PMIMR
));
459 seq_printf(m
, "Port hotplug:\t%08x\n",
460 I915_READ(PORT_HOTPLUG_EN
));
461 seq_printf(m
, "DPFLIPSTAT:\t%08x\n",
462 I915_READ(VLV_DPFLIPSTAT
));
463 seq_printf(m
, "DPINVGTT:\t%08x\n",
464 I915_READ(DPINVGTT
));
466 } else if (!HAS_PCH_SPLIT(dev
)) {
467 seq_printf(m
, "Interrupt enable: %08x\n",
469 seq_printf(m
, "Interrupt identity: %08x\n",
471 seq_printf(m
, "Interrupt mask: %08x\n",
474 seq_printf(m
, "Pipe %c stat: %08x\n",
476 I915_READ(PIPESTAT(pipe
)));
478 seq_printf(m
, "North Display Interrupt enable: %08x\n",
480 seq_printf(m
, "North Display Interrupt identity: %08x\n",
482 seq_printf(m
, "North Display Interrupt mask: %08x\n",
484 seq_printf(m
, "South Display Interrupt enable: %08x\n",
486 seq_printf(m
, "South Display Interrupt identity: %08x\n",
488 seq_printf(m
, "South Display Interrupt mask: %08x\n",
490 seq_printf(m
, "Graphics Interrupt enable: %08x\n",
492 seq_printf(m
, "Graphics Interrupt identity: %08x\n",
494 seq_printf(m
, "Graphics Interrupt mask: %08x\n",
497 seq_printf(m
, "Interrupts received: %d\n",
498 atomic_read(&dev_priv
->irq_received
));
499 for_each_ring(ring
, dev_priv
, i
) {
500 if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
502 "Graphics Interrupt mask (%s): %08x\n",
503 ring
->name
, I915_READ_IMR(ring
));
505 i915_ring_seqno_info(m
, ring
);
507 mutex_unlock(&dev
->struct_mutex
);
512 static int i915_gem_fence_regs_info(struct seq_file
*m
, void *data
)
514 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
515 struct drm_device
*dev
= node
->minor
->dev
;
516 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
519 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
523 seq_printf(m
, "Reserved fences = %d\n", dev_priv
->fence_reg_start
);
524 seq_printf(m
, "Total fences = %d\n", dev_priv
->num_fence_regs
);
525 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++) {
526 struct drm_i915_gem_object
*obj
= dev_priv
->fence_regs
[i
].obj
;
528 seq_printf(m
, "Fence %d, pin count = %d, object = ",
529 i
, dev_priv
->fence_regs
[i
].pin_count
);
531 seq_printf(m
, "unused");
533 describe_obj(m
, obj
);
537 mutex_unlock(&dev
->struct_mutex
);
541 static int i915_hws_info(struct seq_file
*m
, void *data
)
543 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
544 struct drm_device
*dev
= node
->minor
->dev
;
545 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
546 struct intel_ring_buffer
*ring
;
547 const volatile u32 __iomem
*hws
;
550 ring
= &dev_priv
->ring
[(uintptr_t)node
->info_ent
->data
];
551 hws
= (volatile u32 __iomem
*)ring
->status_page
.page_addr
;
555 for (i
= 0; i
< 4096 / sizeof(u32
) / 4; i
+= 4) {
556 seq_printf(m
, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
558 hws
[i
], hws
[i
+ 1], hws
[i
+ 2], hws
[i
+ 3]);
563 static const char *ring_str(int ring
)
566 case RCS
: return "render";
567 case VCS
: return "bsd";
568 case BCS
: return "blt";
573 static const char *pin_flag(int pinned
)
583 static const char *tiling_flag(int tiling
)
587 case I915_TILING_NONE
: return "";
588 case I915_TILING_X
: return " X";
589 case I915_TILING_Y
: return " Y";
593 static const char *dirty_flag(int dirty
)
595 return dirty
? " dirty" : "";
598 static const char *purgeable_flag(int purgeable
)
600 return purgeable
? " purgeable" : "";
603 static void print_error_buffers(struct seq_file
*m
,
605 struct drm_i915_error_buffer
*err
,
608 seq_printf(m
, "%s [%d]:\n", name
, count
);
611 seq_printf(m
, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
616 err
->rseqno
, err
->wseqno
,
617 pin_flag(err
->pinned
),
618 tiling_flag(err
->tiling
),
619 dirty_flag(err
->dirty
),
620 purgeable_flag(err
->purgeable
),
621 err
->ring
!= -1 ? " " : "",
623 cache_level_str(err
->cache_level
));
626 seq_printf(m
, " (name: %d)", err
->name
);
627 if (err
->fence_reg
!= I915_FENCE_REG_NONE
)
628 seq_printf(m
, " (fence: %d)", err
->fence_reg
);
635 static void i915_ring_error_state(struct seq_file
*m
,
636 struct drm_device
*dev
,
637 struct drm_i915_error_state
*error
,
640 BUG_ON(ring
>= I915_NUM_RINGS
); /* shut up confused gcc */
641 seq_printf(m
, "%s command stream:\n", ring_str(ring
));
642 seq_printf(m
, " HEAD: 0x%08x\n", error
->head
[ring
]);
643 seq_printf(m
, " TAIL: 0x%08x\n", error
->tail
[ring
]);
644 seq_printf(m
, " CTL: 0x%08x\n", error
->ctl
[ring
]);
645 seq_printf(m
, " ACTHD: 0x%08x\n", error
->acthd
[ring
]);
646 seq_printf(m
, " IPEIR: 0x%08x\n", error
->ipeir
[ring
]);
647 seq_printf(m
, " IPEHR: 0x%08x\n", error
->ipehr
[ring
]);
648 seq_printf(m
, " INSTDONE: 0x%08x\n", error
->instdone
[ring
]);
649 if (ring
== RCS
&& INTEL_INFO(dev
)->gen
>= 4)
650 seq_printf(m
, " BBADDR: 0x%08llx\n", error
->bbaddr
);
652 if (INTEL_INFO(dev
)->gen
>= 4)
653 seq_printf(m
, " INSTPS: 0x%08x\n", error
->instps
[ring
]);
654 seq_printf(m
, " INSTPM: 0x%08x\n", error
->instpm
[ring
]);
655 seq_printf(m
, " FADDR: 0x%08x\n", error
->faddr
[ring
]);
656 if (INTEL_INFO(dev
)->gen
>= 6) {
657 seq_printf(m
, " RC PSMI: 0x%08x\n", error
->rc_psmi
[ring
]);
658 seq_printf(m
, " FAULT_REG: 0x%08x\n", error
->fault_reg
[ring
]);
659 seq_printf(m
, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
660 error
->semaphore_mboxes
[ring
][0],
661 error
->semaphore_seqno
[ring
][0]);
662 seq_printf(m
, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
663 error
->semaphore_mboxes
[ring
][1],
664 error
->semaphore_seqno
[ring
][1]);
666 seq_printf(m
, " seqno: 0x%08x\n", error
->seqno
[ring
]);
667 seq_printf(m
, " waiting: %s\n", yesno(error
->waiting
[ring
]));
668 seq_printf(m
, " ring->head: 0x%08x\n", error
->cpu_ring_head
[ring
]);
669 seq_printf(m
, " ring->tail: 0x%08x\n", error
->cpu_ring_tail
[ring
]);
672 struct i915_error_state_file_priv
{
673 struct drm_device
*dev
;
674 struct drm_i915_error_state
*error
;
677 static int i915_error_state(struct seq_file
*m
, void *unused
)
679 struct i915_error_state_file_priv
*error_priv
= m
->private;
680 struct drm_device
*dev
= error_priv
->dev
;
681 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
682 struct drm_i915_error_state
*error
= error_priv
->error
;
683 struct intel_ring_buffer
*ring
;
684 int i
, j
, page
, offset
, elt
;
687 seq_printf(m
, "no error state collected\n");
691 seq_printf(m
, "Time: %ld s %ld us\n", error
->time
.tv_sec
,
692 error
->time
.tv_usec
);
693 seq_printf(m
, "PCI ID: 0x%04x\n", dev
->pci_device
);
694 seq_printf(m
, "EIR: 0x%08x\n", error
->eir
);
695 seq_printf(m
, "IER: 0x%08x\n", error
->ier
);
696 seq_printf(m
, "PGTBL_ER: 0x%08x\n", error
->pgtbl_er
);
697 seq_printf(m
, "FORCEWAKE: 0x%08x\n", error
->forcewake
);
698 seq_printf(m
, "DERRMR: 0x%08x\n", error
->derrmr
);
699 seq_printf(m
, "CCID: 0x%08x\n", error
->ccid
);
701 for (i
= 0; i
< dev_priv
->num_fence_regs
; i
++)
702 seq_printf(m
, " fence[%d] = %08llx\n", i
, error
->fence
[i
]);
704 for (i
= 0; i
< ARRAY_SIZE(error
->extra_instdone
); i
++)
705 seq_printf(m
, " INSTDONE_%d: 0x%08x\n", i
, error
->extra_instdone
[i
]);
707 if (INTEL_INFO(dev
)->gen
>= 6) {
708 seq_printf(m
, "ERROR: 0x%08x\n", error
->error
);
709 seq_printf(m
, "DONE_REG: 0x%08x\n", error
->done_reg
);
712 if (INTEL_INFO(dev
)->gen
== 7)
713 seq_printf(m
, "ERR_INT: 0x%08x\n", error
->err_int
);
715 for_each_ring(ring
, dev_priv
, i
)
716 i915_ring_error_state(m
, dev
, error
, i
);
718 if (error
->active_bo
)
719 print_error_buffers(m
, "Active",
721 error
->active_bo_count
);
723 if (error
->pinned_bo
)
724 print_error_buffers(m
, "Pinned",
726 error
->pinned_bo_count
);
728 for (i
= 0; i
< ARRAY_SIZE(error
->ring
); i
++) {
729 struct drm_i915_error_object
*obj
;
731 if ((obj
= error
->ring
[i
].batchbuffer
)) {
732 seq_printf(m
, "%s --- gtt_offset = 0x%08x\n",
733 dev_priv
->ring
[i
].name
,
736 for (page
= 0; page
< obj
->page_count
; page
++) {
737 for (elt
= 0; elt
< PAGE_SIZE
/4; elt
++) {
738 seq_printf(m
, "%08x : %08x\n", offset
, obj
->pages
[page
][elt
]);
744 if (error
->ring
[i
].num_requests
) {
745 seq_printf(m
, "%s --- %d requests\n",
746 dev_priv
->ring
[i
].name
,
747 error
->ring
[i
].num_requests
);
748 for (j
= 0; j
< error
->ring
[i
].num_requests
; j
++) {
749 seq_printf(m
, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
750 error
->ring
[i
].requests
[j
].seqno
,
751 error
->ring
[i
].requests
[j
].jiffies
,
752 error
->ring
[i
].requests
[j
].tail
);
756 if ((obj
= error
->ring
[i
].ringbuffer
)) {
757 seq_printf(m
, "%s --- ringbuffer = 0x%08x\n",
758 dev_priv
->ring
[i
].name
,
761 for (page
= 0; page
< obj
->page_count
; page
++) {
762 for (elt
= 0; elt
< PAGE_SIZE
/4; elt
++) {
763 seq_printf(m
, "%08x : %08x\n",
765 obj
->pages
[page
][elt
]);
773 intel_overlay_print_error_state(m
, error
->overlay
);
776 intel_display_print_error_state(m
, dev
, error
->display
);
782 i915_error_state_write(struct file
*filp
,
783 const char __user
*ubuf
,
787 struct seq_file
*m
= filp
->private_data
;
788 struct i915_error_state_file_priv
*error_priv
= m
->private;
789 struct drm_device
*dev
= error_priv
->dev
;
792 DRM_DEBUG_DRIVER("Resetting error state\n");
794 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
798 i915_destroy_error_state(dev
);
799 mutex_unlock(&dev
->struct_mutex
);
804 static int i915_error_state_open(struct inode
*inode
, struct file
*file
)
806 struct drm_device
*dev
= inode
->i_private
;
807 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
808 struct i915_error_state_file_priv
*error_priv
;
811 error_priv
= kzalloc(sizeof(*error_priv
), GFP_KERNEL
);
815 error_priv
->dev
= dev
;
817 spin_lock_irqsave(&dev_priv
->error_lock
, flags
);
818 error_priv
->error
= dev_priv
->first_error
;
819 if (error_priv
->error
)
820 kref_get(&error_priv
->error
->ref
);
821 spin_unlock_irqrestore(&dev_priv
->error_lock
, flags
);
823 return single_open(file
, i915_error_state
, error_priv
);
826 static int i915_error_state_release(struct inode
*inode
, struct file
*file
)
828 struct seq_file
*m
= file
->private_data
;
829 struct i915_error_state_file_priv
*error_priv
= m
->private;
831 if (error_priv
->error
)
832 kref_put(&error_priv
->error
->ref
, i915_error_state_free
);
835 return single_release(inode
, file
);
838 static const struct file_operations i915_error_state_fops
= {
839 .owner
= THIS_MODULE
,
840 .open
= i915_error_state_open
,
842 .write
= i915_error_state_write
,
843 .llseek
= default_llseek
,
844 .release
= i915_error_state_release
,
847 static int i915_rstdby_delays(struct seq_file
*m
, void *unused
)
849 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
850 struct drm_device
*dev
= node
->minor
->dev
;
851 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
855 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
859 crstanddelay
= I915_READ16(CRSTANDVID
);
861 mutex_unlock(&dev
->struct_mutex
);
863 seq_printf(m
, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay
>> 8) & 0x3f, (crstanddelay
& 0x3f));
868 static int i915_cur_delayinfo(struct seq_file
*m
, void *unused
)
870 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
871 struct drm_device
*dev
= node
->minor
->dev
;
872 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
876 u16 rgvswctl
= I915_READ16(MEMSWCTL
);
877 u16 rgvstat
= I915_READ16(MEMSTAT_ILK
);
879 seq_printf(m
, "Requested P-state: %d\n", (rgvswctl
>> 8) & 0xf);
880 seq_printf(m
, "Requested VID: %d\n", rgvswctl
& 0x3f);
881 seq_printf(m
, "Current VID: %d\n", (rgvstat
& MEMSTAT_VID_MASK
) >>
883 seq_printf(m
, "Current P-state: %d\n",
884 (rgvstat
& MEMSTAT_PSTATE_MASK
) >> MEMSTAT_PSTATE_SHIFT
);
885 } else if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
886 u32 gt_perf_status
= I915_READ(GEN6_GT_PERF_STATUS
);
887 u32 rp_state_limits
= I915_READ(GEN6_RP_STATE_LIMITS
);
888 u32 rp_state_cap
= I915_READ(GEN6_RP_STATE_CAP
);
890 u32 rpupei
, rpcurup
, rpprevup
;
891 u32 rpdownei
, rpcurdown
, rpprevdown
;
894 /* RPSTAT1 is in the GT power well */
895 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
899 gen6_gt_force_wake_get(dev_priv
);
901 rpstat
= I915_READ(GEN6_RPSTAT1
);
902 rpupei
= I915_READ(GEN6_RP_CUR_UP_EI
);
903 rpcurup
= I915_READ(GEN6_RP_CUR_UP
);
904 rpprevup
= I915_READ(GEN6_RP_PREV_UP
);
905 rpdownei
= I915_READ(GEN6_RP_CUR_DOWN_EI
);
906 rpcurdown
= I915_READ(GEN6_RP_CUR_DOWN
);
907 rpprevdown
= I915_READ(GEN6_RP_PREV_DOWN
);
909 gen6_gt_force_wake_put(dev_priv
);
910 mutex_unlock(&dev
->struct_mutex
);
912 seq_printf(m
, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status
);
913 seq_printf(m
, "RPSTAT1: 0x%08x\n", rpstat
);
914 seq_printf(m
, "Render p-state ratio: %d\n",
915 (gt_perf_status
& 0xff00) >> 8);
916 seq_printf(m
, "Render p-state VID: %d\n",
917 gt_perf_status
& 0xff);
918 seq_printf(m
, "Render p-state limit: %d\n",
919 rp_state_limits
& 0xff);
920 seq_printf(m
, "CAGF: %dMHz\n", ((rpstat
& GEN6_CAGF_MASK
) >>
921 GEN6_CAGF_SHIFT
) * GT_FREQUENCY_MULTIPLIER
);
922 seq_printf(m
, "RP CUR UP EI: %dus\n", rpupei
&
924 seq_printf(m
, "RP CUR UP: %dus\n", rpcurup
&
925 GEN6_CURBSYTAVG_MASK
);
926 seq_printf(m
, "RP PREV UP: %dus\n", rpprevup
&
927 GEN6_CURBSYTAVG_MASK
);
928 seq_printf(m
, "RP CUR DOWN EI: %dus\n", rpdownei
&
930 seq_printf(m
, "RP CUR DOWN: %dus\n", rpcurdown
&
931 GEN6_CURBSYTAVG_MASK
);
932 seq_printf(m
, "RP PREV DOWN: %dus\n", rpprevdown
&
933 GEN6_CURBSYTAVG_MASK
);
935 max_freq
= (rp_state_cap
& 0xff0000) >> 16;
936 seq_printf(m
, "Lowest (RPN) frequency: %dMHz\n",
937 max_freq
* GT_FREQUENCY_MULTIPLIER
);
939 max_freq
= (rp_state_cap
& 0xff00) >> 8;
940 seq_printf(m
, "Nominal (RP1) frequency: %dMHz\n",
941 max_freq
* GT_FREQUENCY_MULTIPLIER
);
943 max_freq
= rp_state_cap
& 0xff;
944 seq_printf(m
, "Max non-overclocked (RP0) frequency: %dMHz\n",
945 max_freq
* GT_FREQUENCY_MULTIPLIER
);
947 seq_printf(m
, "no P-state info available\n");
953 static int i915_delayfreq_table(struct seq_file
*m
, void *unused
)
955 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
956 struct drm_device
*dev
= node
->minor
->dev
;
957 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
961 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
965 for (i
= 0; i
< 16; i
++) {
966 delayfreq
= I915_READ(PXVFREQ_BASE
+ i
* 4);
967 seq_printf(m
, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i
, delayfreq
,
968 (delayfreq
& PXVFREQ_PX_MASK
) >> PXVFREQ_PX_SHIFT
);
971 mutex_unlock(&dev
->struct_mutex
);
976 static inline int MAP_TO_MV(int map
)
978 return 1250 - (map
* 25);
981 static int i915_inttoext_table(struct seq_file
*m
, void *unused
)
983 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
984 struct drm_device
*dev
= node
->minor
->dev
;
985 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
989 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
993 for (i
= 1; i
<= 32; i
++) {
994 inttoext
= I915_READ(INTTOEXT_BASE_ILK
+ i
* 4);
995 seq_printf(m
, "INTTOEXT%02d: 0x%08x\n", i
, inttoext
);
998 mutex_unlock(&dev
->struct_mutex
);
1003 static int ironlake_drpc_info(struct seq_file
*m
)
1005 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1006 struct drm_device
*dev
= node
->minor
->dev
;
1007 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1008 u32 rgvmodectl
, rstdbyctl
;
1012 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1016 rgvmodectl
= I915_READ(MEMMODECTL
);
1017 rstdbyctl
= I915_READ(RSTDBYCTL
);
1018 crstandvid
= I915_READ16(CRSTANDVID
);
1020 mutex_unlock(&dev
->struct_mutex
);
1022 seq_printf(m
, "HD boost: %s\n", (rgvmodectl
& MEMMODE_BOOST_EN
) ?
1024 seq_printf(m
, "Boost freq: %d\n",
1025 (rgvmodectl
& MEMMODE_BOOST_FREQ_MASK
) >>
1026 MEMMODE_BOOST_FREQ_SHIFT
);
1027 seq_printf(m
, "HW control enabled: %s\n",
1028 rgvmodectl
& MEMMODE_HWIDLE_EN
? "yes" : "no");
1029 seq_printf(m
, "SW control enabled: %s\n",
1030 rgvmodectl
& MEMMODE_SWMODE_EN
? "yes" : "no");
1031 seq_printf(m
, "Gated voltage change: %s\n",
1032 rgvmodectl
& MEMMODE_RCLK_GATE
? "yes" : "no");
1033 seq_printf(m
, "Starting frequency: P%d\n",
1034 (rgvmodectl
& MEMMODE_FSTART_MASK
) >> MEMMODE_FSTART_SHIFT
);
1035 seq_printf(m
, "Max P-state: P%d\n",
1036 (rgvmodectl
& MEMMODE_FMAX_MASK
) >> MEMMODE_FMAX_SHIFT
);
1037 seq_printf(m
, "Min P-state: P%d\n", (rgvmodectl
& MEMMODE_FMIN_MASK
));
1038 seq_printf(m
, "RS1 VID: %d\n", (crstandvid
& 0x3f));
1039 seq_printf(m
, "RS2 VID: %d\n", ((crstandvid
>> 8) & 0x3f));
1040 seq_printf(m
, "Render standby enabled: %s\n",
1041 (rstdbyctl
& RCX_SW_EXIT
) ? "no" : "yes");
1042 seq_printf(m
, "Current RS state: ");
1043 switch (rstdbyctl
& RSX_STATUS_MASK
) {
1045 seq_printf(m
, "on\n");
1047 case RSX_STATUS_RC1
:
1048 seq_printf(m
, "RC1\n");
1050 case RSX_STATUS_RC1E
:
1051 seq_printf(m
, "RC1E\n");
1053 case RSX_STATUS_RS1
:
1054 seq_printf(m
, "RS1\n");
1056 case RSX_STATUS_RS2
:
1057 seq_printf(m
, "RS2 (RC6)\n");
1059 case RSX_STATUS_RS3
:
1060 seq_printf(m
, "RC3 (RC6+)\n");
1063 seq_printf(m
, "unknown\n");
1070 static int gen6_drpc_info(struct seq_file
*m
)
1073 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1074 struct drm_device
*dev
= node
->minor
->dev
;
1075 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1076 u32 rpmodectl1
, gt_core_status
, rcctl1
, rc6vids
= 0;
1077 unsigned forcewake_count
;
1081 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1085 spin_lock_irq(&dev_priv
->gt_lock
);
1086 forcewake_count
= dev_priv
->forcewake_count
;
1087 spin_unlock_irq(&dev_priv
->gt_lock
);
1089 if (forcewake_count
) {
1090 seq_printf(m
, "RC information inaccurate because somebody "
1091 "holds a forcewake reference \n");
1093 /* NB: we cannot use forcewake, else we read the wrong values */
1094 while (count
++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK
) & 1))
1096 seq_printf(m
, "RC information accurate: %s\n", yesno(count
< 51));
1099 gt_core_status
= readl(dev_priv
->regs
+ GEN6_GT_CORE_STATUS
);
1100 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS
, gt_core_status
, 4);
1102 rpmodectl1
= I915_READ(GEN6_RP_CONTROL
);
1103 rcctl1
= I915_READ(GEN6_RC_CONTROL
);
1104 mutex_unlock(&dev
->struct_mutex
);
1105 mutex_lock(&dev_priv
->rps
.hw_lock
);
1106 sandybridge_pcode_read(dev_priv
, GEN6_PCODE_READ_RC6VIDS
, &rc6vids
);
1107 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1109 seq_printf(m
, "Video Turbo Mode: %s\n",
1110 yesno(rpmodectl1
& GEN6_RP_MEDIA_TURBO
));
1111 seq_printf(m
, "HW control enabled: %s\n",
1112 yesno(rpmodectl1
& GEN6_RP_ENABLE
));
1113 seq_printf(m
, "SW control enabled: %s\n",
1114 yesno((rpmodectl1
& GEN6_RP_MEDIA_MODE_MASK
) ==
1115 GEN6_RP_MEDIA_SW_MODE
));
1116 seq_printf(m
, "RC1e Enabled: %s\n",
1117 yesno(rcctl1
& GEN6_RC_CTL_RC1e_ENABLE
));
1118 seq_printf(m
, "RC6 Enabled: %s\n",
1119 yesno(rcctl1
& GEN6_RC_CTL_RC6_ENABLE
));
1120 seq_printf(m
, "Deep RC6 Enabled: %s\n",
1121 yesno(rcctl1
& GEN6_RC_CTL_RC6p_ENABLE
));
1122 seq_printf(m
, "Deepest RC6 Enabled: %s\n",
1123 yesno(rcctl1
& GEN6_RC_CTL_RC6pp_ENABLE
));
1124 seq_printf(m
, "Current RC state: ");
1125 switch (gt_core_status
& GEN6_RCn_MASK
) {
1127 if (gt_core_status
& GEN6_CORE_CPD_STATE_MASK
)
1128 seq_printf(m
, "Core Power Down\n");
1130 seq_printf(m
, "on\n");
1133 seq_printf(m
, "RC3\n");
1136 seq_printf(m
, "RC6\n");
1139 seq_printf(m
, "RC7\n");
1142 seq_printf(m
, "Unknown\n");
1146 seq_printf(m
, "Core Power Down: %s\n",
1147 yesno(gt_core_status
& GEN6_CORE_CPD_STATE_MASK
));
1149 /* Not exactly sure what this is */
1150 seq_printf(m
, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1151 I915_READ(GEN6_GT_GFX_RC6_LOCKED
));
1152 seq_printf(m
, "RC6 residency since boot: %u\n",
1153 I915_READ(GEN6_GT_GFX_RC6
));
1154 seq_printf(m
, "RC6+ residency since boot: %u\n",
1155 I915_READ(GEN6_GT_GFX_RC6p
));
1156 seq_printf(m
, "RC6++ residency since boot: %u\n",
1157 I915_READ(GEN6_GT_GFX_RC6pp
));
1159 seq_printf(m
, "RC6 voltage: %dmV\n",
1160 GEN6_DECODE_RC6_VID(((rc6vids
>> 0) & 0xff)));
1161 seq_printf(m
, "RC6+ voltage: %dmV\n",
1162 GEN6_DECODE_RC6_VID(((rc6vids
>> 8) & 0xff)));
1163 seq_printf(m
, "RC6++ voltage: %dmV\n",
1164 GEN6_DECODE_RC6_VID(((rc6vids
>> 16) & 0xff)));
1168 static int i915_drpc_info(struct seq_file
*m
, void *unused
)
1170 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1171 struct drm_device
*dev
= node
->minor
->dev
;
1173 if (IS_GEN6(dev
) || IS_GEN7(dev
))
1174 return gen6_drpc_info(m
);
1176 return ironlake_drpc_info(m
);
1179 static int i915_fbc_status(struct seq_file
*m
, void *unused
)
1181 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1182 struct drm_device
*dev
= node
->minor
->dev
;
1183 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1185 if (!I915_HAS_FBC(dev
)) {
1186 seq_printf(m
, "FBC unsupported on this chipset\n");
1190 if (intel_fbc_enabled(dev
)) {
1191 seq_printf(m
, "FBC enabled\n");
1193 seq_printf(m
, "FBC disabled: ");
1194 switch (dev_priv
->no_fbc_reason
) {
1196 seq_printf(m
, "no outputs");
1198 case FBC_STOLEN_TOO_SMALL
:
1199 seq_printf(m
, "not enough stolen memory");
1201 case FBC_UNSUPPORTED_MODE
:
1202 seq_printf(m
, "mode not supported");
1204 case FBC_MODE_TOO_LARGE
:
1205 seq_printf(m
, "mode too large");
1208 seq_printf(m
, "FBC unsupported on plane");
1211 seq_printf(m
, "scanout buffer not tiled");
1213 case FBC_MULTIPLE_PIPES
:
1214 seq_printf(m
, "multiple pipes are enabled");
1216 case FBC_MODULE_PARAM
:
1217 seq_printf(m
, "disabled per module param (default off)");
1220 seq_printf(m
, "unknown reason");
1222 seq_printf(m
, "\n");
1227 static int i915_sr_status(struct seq_file
*m
, void *unused
)
1229 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1230 struct drm_device
*dev
= node
->minor
->dev
;
1231 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1232 bool sr_enabled
= false;
1234 if (HAS_PCH_SPLIT(dev
))
1235 sr_enabled
= I915_READ(WM1_LP_ILK
) & WM1_LP_SR_EN
;
1236 else if (IS_CRESTLINE(dev
) || IS_I945G(dev
) || IS_I945GM(dev
))
1237 sr_enabled
= I915_READ(FW_BLC_SELF
) & FW_BLC_SELF_EN
;
1238 else if (IS_I915GM(dev
))
1239 sr_enabled
= I915_READ(INSTPM
) & INSTPM_SELF_EN
;
1240 else if (IS_PINEVIEW(dev
))
1241 sr_enabled
= I915_READ(DSPFW3
) & PINEVIEW_SELF_REFRESH_EN
;
1243 seq_printf(m
, "self-refresh: %s\n",
1244 sr_enabled
? "enabled" : "disabled");
1249 static int i915_emon_status(struct seq_file
*m
, void *unused
)
1251 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1252 struct drm_device
*dev
= node
->minor
->dev
;
1253 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1254 unsigned long temp
, chipset
, gfx
;
1260 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1264 temp
= i915_mch_val(dev_priv
);
1265 chipset
= i915_chipset_val(dev_priv
);
1266 gfx
= i915_gfx_val(dev_priv
);
1267 mutex_unlock(&dev
->struct_mutex
);
1269 seq_printf(m
, "GMCH temp: %ld\n", temp
);
1270 seq_printf(m
, "Chipset power: %ld\n", chipset
);
1271 seq_printf(m
, "GFX power: %ld\n", gfx
);
1272 seq_printf(m
, "Total power: %ld\n", chipset
+ gfx
);
1277 static int i915_ring_freq_table(struct seq_file
*m
, void *unused
)
1279 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1280 struct drm_device
*dev
= node
->minor
->dev
;
1281 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1283 int gpu_freq
, ia_freq
;
1285 if (!(IS_GEN6(dev
) || IS_GEN7(dev
))) {
1286 seq_printf(m
, "unsupported on this chipset\n");
1290 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1294 seq_printf(m
, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1296 for (gpu_freq
= dev_priv
->rps
.min_delay
;
1297 gpu_freq
<= dev_priv
->rps
.max_delay
;
1300 sandybridge_pcode_read(dev_priv
,
1301 GEN6_PCODE_READ_MIN_FREQ_TABLE
,
1303 seq_printf(m
, "%d\t\t%d\n", gpu_freq
* GT_FREQUENCY_MULTIPLIER
, ia_freq
* 100);
1306 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1311 static int i915_gfxec(struct seq_file
*m
, void *unused
)
1313 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1314 struct drm_device
*dev
= node
->minor
->dev
;
1315 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1318 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1322 seq_printf(m
, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1324 mutex_unlock(&dev
->struct_mutex
);
1329 static int i915_opregion(struct seq_file
*m
, void *unused
)
1331 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1332 struct drm_device
*dev
= node
->minor
->dev
;
1333 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1334 struct intel_opregion
*opregion
= &dev_priv
->opregion
;
1335 void *data
= kmalloc(OPREGION_SIZE
, GFP_KERNEL
);
1341 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1345 if (opregion
->header
) {
1346 memcpy_fromio(data
, opregion
->header
, OPREGION_SIZE
);
1347 seq_write(m
, data
, OPREGION_SIZE
);
1350 mutex_unlock(&dev
->struct_mutex
);
1357 static int i915_gem_framebuffer_info(struct seq_file
*m
, void *data
)
1359 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1360 struct drm_device
*dev
= node
->minor
->dev
;
1361 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1362 struct intel_fbdev
*ifbdev
;
1363 struct intel_framebuffer
*fb
;
1366 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1370 ifbdev
= dev_priv
->fbdev
;
1371 fb
= to_intel_framebuffer(ifbdev
->helper
.fb
);
1373 seq_printf(m
, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1377 fb
->base
.bits_per_pixel
);
1378 describe_obj(m
, fb
->obj
);
1379 seq_printf(m
, "\n");
1381 list_for_each_entry(fb
, &dev
->mode_config
.fb_list
, base
.head
) {
1382 if (&fb
->base
== ifbdev
->helper
.fb
)
1385 seq_printf(m
, "user size: %d x %d, depth %d, %d bpp, obj ",
1389 fb
->base
.bits_per_pixel
);
1390 describe_obj(m
, fb
->obj
);
1391 seq_printf(m
, "\n");
1394 mutex_unlock(&dev
->mode_config
.mutex
);
1399 static int i915_context_status(struct seq_file
*m
, void *unused
)
1401 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1402 struct drm_device
*dev
= node
->minor
->dev
;
1403 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1406 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1410 if (dev_priv
->ips
.pwrctx
) {
1411 seq_printf(m
, "power context ");
1412 describe_obj(m
, dev_priv
->ips
.pwrctx
);
1413 seq_printf(m
, "\n");
1416 if (dev_priv
->ips
.renderctx
) {
1417 seq_printf(m
, "render context ");
1418 describe_obj(m
, dev_priv
->ips
.renderctx
);
1419 seq_printf(m
, "\n");
1422 mutex_unlock(&dev
->mode_config
.mutex
);
1427 static int i915_gen6_forcewake_count_info(struct seq_file
*m
, void *data
)
1429 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1430 struct drm_device
*dev
= node
->minor
->dev
;
1431 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1432 unsigned forcewake_count
;
1434 spin_lock_irq(&dev_priv
->gt_lock
);
1435 forcewake_count
= dev_priv
->forcewake_count
;
1436 spin_unlock_irq(&dev_priv
->gt_lock
);
1438 seq_printf(m
, "forcewake count = %u\n", forcewake_count
);
1443 static const char *swizzle_string(unsigned swizzle
)
1446 case I915_BIT_6_SWIZZLE_NONE
:
1448 case I915_BIT_6_SWIZZLE_9
:
1450 case I915_BIT_6_SWIZZLE_9_10
:
1451 return "bit9/bit10";
1452 case I915_BIT_6_SWIZZLE_9_11
:
1453 return "bit9/bit11";
1454 case I915_BIT_6_SWIZZLE_9_10_11
:
1455 return "bit9/bit10/bit11";
1456 case I915_BIT_6_SWIZZLE_9_17
:
1457 return "bit9/bit17";
1458 case I915_BIT_6_SWIZZLE_9_10_17
:
1459 return "bit9/bit10/bit17";
1460 case I915_BIT_6_SWIZZLE_UNKNOWN
:
1467 static int i915_swizzle_info(struct seq_file
*m
, void *data
)
1469 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1470 struct drm_device
*dev
= node
->minor
->dev
;
1471 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1474 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1478 seq_printf(m
, "bit6 swizzle for X-tiling = %s\n",
1479 swizzle_string(dev_priv
->mm
.bit_6_swizzle_x
));
1480 seq_printf(m
, "bit6 swizzle for Y-tiling = %s\n",
1481 swizzle_string(dev_priv
->mm
.bit_6_swizzle_y
));
1483 if (IS_GEN3(dev
) || IS_GEN4(dev
)) {
1484 seq_printf(m
, "DDC = 0x%08x\n",
1486 seq_printf(m
, "C0DRB3 = 0x%04x\n",
1487 I915_READ16(C0DRB3
));
1488 seq_printf(m
, "C1DRB3 = 0x%04x\n",
1489 I915_READ16(C1DRB3
));
1490 } else if (IS_GEN6(dev
) || IS_GEN7(dev
)) {
1491 seq_printf(m
, "MAD_DIMM_C0 = 0x%08x\n",
1492 I915_READ(MAD_DIMM_C0
));
1493 seq_printf(m
, "MAD_DIMM_C1 = 0x%08x\n",
1494 I915_READ(MAD_DIMM_C1
));
1495 seq_printf(m
, "MAD_DIMM_C2 = 0x%08x\n",
1496 I915_READ(MAD_DIMM_C2
));
1497 seq_printf(m
, "TILECTL = 0x%08x\n",
1498 I915_READ(TILECTL
));
1499 seq_printf(m
, "ARB_MODE = 0x%08x\n",
1500 I915_READ(ARB_MODE
));
1501 seq_printf(m
, "DISP_ARB_CTL = 0x%08x\n",
1502 I915_READ(DISP_ARB_CTL
));
1504 mutex_unlock(&dev
->struct_mutex
);
1509 static int i915_ppgtt_info(struct seq_file
*m
, void *data
)
1511 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1512 struct drm_device
*dev
= node
->minor
->dev
;
1513 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1514 struct intel_ring_buffer
*ring
;
1518 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1521 if (INTEL_INFO(dev
)->gen
== 6)
1522 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE
));
1524 for_each_ring(ring
, dev_priv
, i
) {
1525 seq_printf(m
, "%s\n", ring
->name
);
1526 if (INTEL_INFO(dev
)->gen
== 7)
1527 seq_printf(m
, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring
)));
1528 seq_printf(m
, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring
)));
1529 seq_printf(m
, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring
)));
1530 seq_printf(m
, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring
)));
1532 if (dev_priv
->mm
.aliasing_ppgtt
) {
1533 struct i915_hw_ppgtt
*ppgtt
= dev_priv
->mm
.aliasing_ppgtt
;
1535 seq_printf(m
, "aliasing PPGTT:\n");
1536 seq_printf(m
, "pd gtt offset: 0x%08x\n", ppgtt
->pd_offset
);
1538 seq_printf(m
, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK
));
1539 mutex_unlock(&dev
->struct_mutex
);
1544 static int i915_dpio_info(struct seq_file
*m
, void *data
)
1546 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
1547 struct drm_device
*dev
= node
->minor
->dev
;
1548 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1552 if (!IS_VALLEYVIEW(dev
)) {
1553 seq_printf(m
, "unsupported\n");
1557 ret
= mutex_lock_interruptible(&dev
->mode_config
.mutex
);
1561 seq_printf(m
, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL
));
1563 seq_printf(m
, "DPIO_DIV_A: 0x%08x\n",
1564 intel_dpio_read(dev_priv
, _DPIO_DIV_A
));
1565 seq_printf(m
, "DPIO_DIV_B: 0x%08x\n",
1566 intel_dpio_read(dev_priv
, _DPIO_DIV_B
));
1568 seq_printf(m
, "DPIO_REFSFR_A: 0x%08x\n",
1569 intel_dpio_read(dev_priv
, _DPIO_REFSFR_A
));
1570 seq_printf(m
, "DPIO_REFSFR_B: 0x%08x\n",
1571 intel_dpio_read(dev_priv
, _DPIO_REFSFR_B
));
1573 seq_printf(m
, "DPIO_CORE_CLK_A: 0x%08x\n",
1574 intel_dpio_read(dev_priv
, _DPIO_CORE_CLK_A
));
1575 seq_printf(m
, "DPIO_CORE_CLK_B: 0x%08x\n",
1576 intel_dpio_read(dev_priv
, _DPIO_CORE_CLK_B
));
1578 seq_printf(m
, "DPIO_LFP_COEFF_A: 0x%08x\n",
1579 intel_dpio_read(dev_priv
, _DPIO_LFP_COEFF_A
));
1580 seq_printf(m
, "DPIO_LFP_COEFF_B: 0x%08x\n",
1581 intel_dpio_read(dev_priv
, _DPIO_LFP_COEFF_B
));
1583 seq_printf(m
, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1584 intel_dpio_read(dev_priv
, DPIO_FASTCLK_DISABLE
));
1586 mutex_unlock(&dev
->mode_config
.mutex
);
1592 i915_wedged_read(struct file
*filp
,
1597 struct drm_device
*dev
= filp
->private_data
;
1598 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1602 len
= snprintf(buf
, sizeof(buf
),
1604 atomic_read(&dev_priv
->mm
.wedged
));
1606 if (len
> sizeof(buf
))
1609 return simple_read_from_buffer(ubuf
, max
, ppos
, buf
, len
);
1613 i915_wedged_write(struct file
*filp
,
1614 const char __user
*ubuf
,
1618 struct drm_device
*dev
= filp
->private_data
;
1623 if (cnt
> sizeof(buf
) - 1)
1626 if (copy_from_user(buf
, ubuf
, cnt
))
1630 val
= simple_strtoul(buf
, NULL
, 0);
1633 DRM_INFO("Manually setting wedged to %d\n", val
);
1634 i915_handle_error(dev
, val
);
1639 static const struct file_operations i915_wedged_fops
= {
1640 .owner
= THIS_MODULE
,
1641 .open
= simple_open
,
1642 .read
= i915_wedged_read
,
1643 .write
= i915_wedged_write
,
1644 .llseek
= default_llseek
,
1648 i915_ring_stop_read(struct file
*filp
,
1653 struct drm_device
*dev
= filp
->private_data
;
1654 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1658 len
= snprintf(buf
, sizeof(buf
),
1659 "0x%08x\n", dev_priv
->stop_rings
);
1661 if (len
> sizeof(buf
))
1664 return simple_read_from_buffer(ubuf
, max
, ppos
, buf
, len
);
1668 i915_ring_stop_write(struct file
*filp
,
1669 const char __user
*ubuf
,
1673 struct drm_device
*dev
= filp
->private_data
;
1674 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1679 if (cnt
> sizeof(buf
) - 1)
1682 if (copy_from_user(buf
, ubuf
, cnt
))
1686 val
= simple_strtoul(buf
, NULL
, 0);
1689 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val
);
1691 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1695 dev_priv
->stop_rings
= val
;
1696 mutex_unlock(&dev
->struct_mutex
);
1701 static const struct file_operations i915_ring_stop_fops
= {
1702 .owner
= THIS_MODULE
,
1703 .open
= simple_open
,
1704 .read
= i915_ring_stop_read
,
1705 .write
= i915_ring_stop_write
,
1706 .llseek
= default_llseek
,
1710 i915_max_freq_read(struct file
*filp
,
1715 struct drm_device
*dev
= filp
->private_data
;
1716 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1720 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1723 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1727 len
= snprintf(buf
, sizeof(buf
),
1728 "max freq: %d\n", dev_priv
->rps
.max_delay
* GT_FREQUENCY_MULTIPLIER
);
1729 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1731 if (len
> sizeof(buf
))
1734 return simple_read_from_buffer(ubuf
, max
, ppos
, buf
, len
);
1738 i915_max_freq_write(struct file
*filp
,
1739 const char __user
*ubuf
,
1743 struct drm_device
*dev
= filp
->private_data
;
1744 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1748 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1752 if (cnt
> sizeof(buf
) - 1)
1755 if (copy_from_user(buf
, ubuf
, cnt
))
1759 val
= simple_strtoul(buf
, NULL
, 0);
1762 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val
);
1764 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1769 * Turbo will still be enabled, but won't go above the set value.
1771 dev_priv
->rps
.max_delay
= val
/ GT_FREQUENCY_MULTIPLIER
;
1773 gen6_set_rps(dev
, val
/ GT_FREQUENCY_MULTIPLIER
);
1774 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1779 static const struct file_operations i915_max_freq_fops
= {
1780 .owner
= THIS_MODULE
,
1781 .open
= simple_open
,
1782 .read
= i915_max_freq_read
,
1783 .write
= i915_max_freq_write
,
1784 .llseek
= default_llseek
,
1788 i915_min_freq_read(struct file
*filp
, char __user
*ubuf
, size_t max
,
1791 struct drm_device
*dev
= filp
->private_data
;
1792 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1796 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1799 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1803 len
= snprintf(buf
, sizeof(buf
),
1804 "min freq: %d\n", dev_priv
->rps
.min_delay
* GT_FREQUENCY_MULTIPLIER
);
1805 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1807 if (len
> sizeof(buf
))
1810 return simple_read_from_buffer(ubuf
, max
, ppos
, buf
, len
);
1814 i915_min_freq_write(struct file
*filp
, const char __user
*ubuf
, size_t cnt
,
1817 struct drm_device
*dev
= filp
->private_data
;
1818 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1822 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1826 if (cnt
> sizeof(buf
) - 1)
1829 if (copy_from_user(buf
, ubuf
, cnt
))
1833 val
= simple_strtoul(buf
, NULL
, 0);
1836 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val
);
1838 ret
= mutex_lock_interruptible(&dev_priv
->rps
.hw_lock
);
1843 * Turbo will still be enabled, but won't go below the set value.
1845 dev_priv
->rps
.min_delay
= val
/ GT_FREQUENCY_MULTIPLIER
;
1847 gen6_set_rps(dev
, val
/ GT_FREQUENCY_MULTIPLIER
);
1848 mutex_unlock(&dev_priv
->rps
.hw_lock
);
1853 static const struct file_operations i915_min_freq_fops
= {
1854 .owner
= THIS_MODULE
,
1855 .open
= simple_open
,
1856 .read
= i915_min_freq_read
,
1857 .write
= i915_min_freq_write
,
1858 .llseek
= default_llseek
,
1862 i915_cache_sharing_read(struct file
*filp
,
1867 struct drm_device
*dev
= filp
->private_data
;
1868 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
1873 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1876 ret
= mutex_lock_interruptible(&dev
->struct_mutex
);
1880 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
1881 mutex_unlock(&dev_priv
->dev
->struct_mutex
);
1883 len
= snprintf(buf
, sizeof(buf
),
1884 "%d\n", (snpcr
& GEN6_MBC_SNPCR_MASK
) >>
1885 GEN6_MBC_SNPCR_SHIFT
);
1887 if (len
> sizeof(buf
))
1890 return simple_read_from_buffer(ubuf
, max
, ppos
, buf
, len
);
1894 i915_cache_sharing_write(struct file
*filp
,
1895 const char __user
*ubuf
,
1899 struct drm_device
*dev
= filp
->private_data
;
1900 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1905 if (!(IS_GEN6(dev
) || IS_GEN7(dev
)))
1909 if (cnt
> sizeof(buf
) - 1)
1912 if (copy_from_user(buf
, ubuf
, cnt
))
1916 val
= simple_strtoul(buf
, NULL
, 0);
1919 if (val
< 0 || val
> 3)
1922 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val
);
1924 /* Update the cache sharing policy here as well */
1925 snpcr
= I915_READ(GEN6_MBCUNIT_SNPCR
);
1926 snpcr
&= ~GEN6_MBC_SNPCR_MASK
;
1927 snpcr
|= (val
<< GEN6_MBC_SNPCR_SHIFT
);
1928 I915_WRITE(GEN6_MBCUNIT_SNPCR
, snpcr
);
1933 static const struct file_operations i915_cache_sharing_fops
= {
1934 .owner
= THIS_MODULE
,
1935 .open
= simple_open
,
1936 .read
= i915_cache_sharing_read
,
1937 .write
= i915_cache_sharing_write
,
1938 .llseek
= default_llseek
,
1941 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1942 * allocated we need to hook into the minor for release. */
1944 drm_add_fake_info_node(struct drm_minor
*minor
,
1948 struct drm_info_node
*node
;
1950 node
= kmalloc(sizeof(struct drm_info_node
), GFP_KERNEL
);
1952 debugfs_remove(ent
);
1956 node
->minor
= minor
;
1958 node
->info_ent
= (void *) key
;
1960 mutex_lock(&minor
->debugfs_lock
);
1961 list_add(&node
->list
, &minor
->debugfs_list
);
1962 mutex_unlock(&minor
->debugfs_lock
);
1967 static int i915_forcewake_open(struct inode
*inode
, struct file
*file
)
1969 struct drm_device
*dev
= inode
->i_private
;
1970 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1972 if (INTEL_INFO(dev
)->gen
< 6)
1975 gen6_gt_force_wake_get(dev_priv
);
1980 static int i915_forcewake_release(struct inode
*inode
, struct file
*file
)
1982 struct drm_device
*dev
= inode
->i_private
;
1983 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1985 if (INTEL_INFO(dev
)->gen
< 6)
1988 gen6_gt_force_wake_put(dev_priv
);
1993 static const struct file_operations i915_forcewake_fops
= {
1994 .owner
= THIS_MODULE
,
1995 .open
= i915_forcewake_open
,
1996 .release
= i915_forcewake_release
,
1999 static int i915_forcewake_create(struct dentry
*root
, struct drm_minor
*minor
)
2001 struct drm_device
*dev
= minor
->dev
;
2004 ent
= debugfs_create_file("i915_forcewake_user",
2007 &i915_forcewake_fops
);
2009 return PTR_ERR(ent
);
2011 return drm_add_fake_info_node(minor
, ent
, &i915_forcewake_fops
);
2014 static int i915_debugfs_create(struct dentry
*root
,
2015 struct drm_minor
*minor
,
2017 const struct file_operations
*fops
)
2019 struct drm_device
*dev
= minor
->dev
;
2022 ent
= debugfs_create_file(name
,
2027 return PTR_ERR(ent
);
2029 return drm_add_fake_info_node(minor
, ent
, fops
);
2032 static struct drm_info_list i915_debugfs_list
[] = {
2033 {"i915_capabilities", i915_capabilities
, 0},
2034 {"i915_gem_objects", i915_gem_object_info
, 0},
2035 {"i915_gem_gtt", i915_gem_gtt_info
, 0},
2036 {"i915_gem_pinned", i915_gem_gtt_info
, 0, (void *) PINNED_LIST
},
2037 {"i915_gem_active", i915_gem_object_list_info
, 0, (void *) ACTIVE_LIST
},
2038 {"i915_gem_inactive", i915_gem_object_list_info
, 0, (void *) INACTIVE_LIST
},
2039 {"i915_gem_pageflip", i915_gem_pageflip_info
, 0},
2040 {"i915_gem_request", i915_gem_request_info
, 0},
2041 {"i915_gem_seqno", i915_gem_seqno_info
, 0},
2042 {"i915_gem_fence_regs", i915_gem_fence_regs_info
, 0},
2043 {"i915_gem_interrupt", i915_interrupt_info
, 0},
2044 {"i915_gem_hws", i915_hws_info
, 0, (void *)RCS
},
2045 {"i915_gem_hws_blt", i915_hws_info
, 0, (void *)BCS
},
2046 {"i915_gem_hws_bsd", i915_hws_info
, 0, (void *)VCS
},
2047 {"i915_rstdby_delays", i915_rstdby_delays
, 0},
2048 {"i915_cur_delayinfo", i915_cur_delayinfo
, 0},
2049 {"i915_delayfreq_table", i915_delayfreq_table
, 0},
2050 {"i915_inttoext_table", i915_inttoext_table
, 0},
2051 {"i915_drpc_info", i915_drpc_info
, 0},
2052 {"i915_emon_status", i915_emon_status
, 0},
2053 {"i915_ring_freq_table", i915_ring_freq_table
, 0},
2054 {"i915_gfxec", i915_gfxec
, 0},
2055 {"i915_fbc_status", i915_fbc_status
, 0},
2056 {"i915_sr_status", i915_sr_status
, 0},
2057 {"i915_opregion", i915_opregion
, 0},
2058 {"i915_gem_framebuffer", i915_gem_framebuffer_info
, 0},
2059 {"i915_context_status", i915_context_status
, 0},
2060 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info
, 0},
2061 {"i915_swizzle_info", i915_swizzle_info
, 0},
2062 {"i915_ppgtt_info", i915_ppgtt_info
, 0},
2063 {"i915_dpio", i915_dpio_info
, 0},
2065 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2067 int i915_debugfs_init(struct drm_minor
*minor
)
2071 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2077 ret
= i915_forcewake_create(minor
->debugfs_root
, minor
);
2081 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2083 &i915_max_freq_fops
);
2087 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2089 &i915_min_freq_fops
);
2093 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2094 "i915_cache_sharing",
2095 &i915_cache_sharing_fops
);
2099 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2101 &i915_ring_stop_fops
);
2105 ret
= i915_debugfs_create(minor
->debugfs_root
, minor
,
2107 &i915_error_state_fops
);
2111 return drm_debugfs_create_files(i915_debugfs_list
,
2112 I915_DEBUGFS_ENTRIES
,
2113 minor
->debugfs_root
, minor
);
2116 void i915_debugfs_cleanup(struct drm_minor
*minor
)
2118 drm_debugfs_remove_files(i915_debugfs_list
,
2119 I915_DEBUGFS_ENTRIES
, minor
);
2120 drm_debugfs_remove_files((struct drm_info_list
*) &i915_forcewake_fops
,
2122 drm_debugfs_remove_files((struct drm_info_list
*) &i915_wedged_fops
,
2124 drm_debugfs_remove_files((struct drm_info_list
*) &i915_max_freq_fops
,
2126 drm_debugfs_remove_files((struct drm_info_list
*) &i915_min_freq_fops
,
2128 drm_debugfs_remove_files((struct drm_info_list
*) &i915_cache_sharing_fops
,
2130 drm_debugfs_remove_files((struct drm_info_list
*) &i915_ring_stop_fops
,
2132 drm_debugfs_remove_files((struct drm_info_list
*) &i915_error_state_fops
,
2136 #endif /* CONFIG_DEBUG_FS */