1 /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 #include <linux/io-mapping.h>
36 /* General customization:
39 #define DRIVER_AUTHOR "Tungsten Graphics, Inc."
41 #define DRIVER_NAME "i915"
42 #define DRIVER_DESC "Intel Graphics"
43 #define DRIVER_DATE "20080730"
53 * 1.2: Add Power Management
54 * 1.3: Add vblank support
55 * 1.4: Fix cmdbuffer path, add heap destroy
56 * 1.5: Add vblank pipe configuration
57 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
58 * - Support vertical blank on secondary display pipe
60 #define DRIVER_MAJOR 1
61 #define DRIVER_MINOR 6
62 #define DRIVER_PATCHLEVEL 0
64 #define WATCH_COHERENCY 0
69 #define WATCH_INACTIVE 0
70 #define WATCH_PWRITE 0
72 typedef struct _drm_i915_ring_buffer
{
80 struct drm_gem_object
*ring_obj
;
81 } drm_i915_ring_buffer_t
;
84 struct mem_block
*next
;
85 struct mem_block
*prev
;
88 struct drm_file
*file_priv
; /* NULL: free, -1: heap, other: real files */
91 typedef struct _drm_i915_vbl_swap
{
92 struct list_head head
;
93 drm_drawable_t drw_id
;
95 unsigned int sequence
;
96 } drm_i915_vbl_swap_t
;
98 struct opregion_header
;
100 struct opregion_swsci
;
101 struct opregion_asle
;
103 struct intel_opregion
{
104 struct opregion_header
*header
;
105 struct opregion_acpi
*acpi
;
106 struct opregion_swsci
*swsci
;
107 struct opregion_asle
*asle
;
111 typedef struct drm_i915_private
{
112 struct drm_device
*dev
;
115 drm_local_map_t
*sarea
;
117 drm_i915_sarea_t
*sarea_priv
;
118 drm_i915_ring_buffer_t ring
;
120 drm_dma_handle_t
*status_page_dmah
;
121 void *hw_status_page
;
122 dma_addr_t dma_status_page
;
124 unsigned int status_gfx_addr
;
125 drm_local_map_t hws_map
;
126 struct drm_gem_object
*hws_obj
;
134 wait_queue_head_t irq_queue
;
135 atomic_t irq_received
;
136 /** Protects user_irq_refcount and irq_mask_reg */
137 spinlock_t user_irq_lock
;
138 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
139 int user_irq_refcount
;
140 /** Cached value of IMR to avoid reads in updating the bitfield */
143 int tex_lru_log_granularity
;
144 int allow_batchbuffer
;
145 struct mem_block
*agp_heap
;
146 unsigned int sr01
, adpa
, ppcr
, dvob
, dvoc
, lvds
;
149 spinlock_t swaps_lock
;
150 drm_i915_vbl_swap_t vbl_swaps
;
151 unsigned int swaps_pending
;
153 struct intel_opregion opregion
;
182 u32 savePFIT_PGM_RATIOS
;
184 u32 saveBLC_PWM_CTL2
;
209 u32 savePP_ON_DELAYS
;
210 u32 savePP_OFF_DELAYS
;
218 u32 savePFIT_CONTROL
;
219 u32 save_palette_a
[256];
220 u32 save_palette_b
[256];
221 u32 saveFBC_CFB_BASE
;
224 u32 saveFBC_CONTROL2
;
228 u32 saveCACHE_MODE_0
;
231 u32 saveMI_ARB_STATE
;
241 u8 saveDACDATA
[256*3]; /* 256 3-byte colors */
244 /** Work task for vblank-related ring access */
245 struct work_struct vblank_work
;
248 struct drm_mm gtt_space
;
250 struct io_mapping
*gtt_mapping
;
253 * List of objects currently involved in rendering from the
256 * A reference is held on the buffer while on this list.
258 struct list_head active_list
;
261 * List of objects which are not in the ringbuffer but which
262 * still have a write_domain which needs to be flushed before
265 * A reference is held on the buffer while on this list.
267 struct list_head flushing_list
;
270 * LRU list of objects which are not in the ringbuffer and
271 * are ready to unbind, but are still in the GTT.
273 * A reference is not held on the buffer while on this list,
274 * as merely being GTT-bound shouldn't prevent its being
275 * freed, and we'll pull it off the list in the free path.
277 struct list_head inactive_list
;
280 * List of breadcrumbs associated with GPU requests currently
283 struct list_head request_list
;
286 * We leave the user IRQ off as much as possible,
287 * but this means that requests will finish and never
288 * be retired once the system goes idle. Set a timer to
289 * fire periodically while the ring is running. When it
290 * fires, go retire requests.
292 struct delayed_work retire_work
;
294 uint32_t next_gem_seqno
;
297 * Waiting sequence number, if any
299 uint32_t waiting_gem_seqno
;
302 * Last seq seen at irq time
304 uint32_t irq_gem_seqno
;
307 * Flag if the X Server, and thus DRM, is not currently in
308 * control of the device.
310 * This is set between LeaveVT and EnterVT. It needs to be
311 * replaced with a semaphore. It also needs to be
312 * transitioned away from for kernel modesetting.
317 * Flag if the hardware appears to be wedged.
319 * This is set when attempts to idle the device timeout.
320 * It prevents command submission from occuring and makes
321 * every pending request fail
325 /** Bit 6 swizzling required for X tiling */
326 uint32_t bit_6_swizzle_x
;
327 /** Bit 6 swizzling required for Y tiling */
328 uint32_t bit_6_swizzle_y
;
330 } drm_i915_private_t
;
332 /** driver private structure attached to each drm_gem_object */
333 struct drm_i915_gem_object
{
334 struct drm_gem_object
*obj
;
336 /** Current space allocated to this object in the GTT, if any. */
337 struct drm_mm_node
*gtt_space
;
339 /** This object's place on the active/flushing/inactive lists */
340 struct list_head list
;
343 * This is set if the object is on the active or flushing lists
344 * (has pending rendering), and is not set if it's on inactive (ready
350 * This is set if the object has been written to since last bound
355 /** AGP memory structure for our GTT binding. */
356 DRM_AGP_MEM
*agp_mem
;
358 struct page
**page_list
;
361 * Current offset of the object in GTT space.
363 * This is the same as gtt_space->start
367 /** Boolean whether this object has a valid gtt offset. */
370 /** How many users have pinned this object in GTT space */
373 /** Breadcrumb of last rendering to the buffer. */
374 uint32_t last_rendering_seqno
;
376 /** Current tiling mode for the object. */
377 uint32_t tiling_mode
;
379 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
383 * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
384 * GEM_DOMAIN_CPU is not in the object's read domain.
386 uint8_t *page_cpu_valid
;
390 * Request queue structure.
392 * The request queue allows us to note sequence numbers that have been emitted
393 * and may be associated with active buffers to be retired.
395 * By keeping this list, we can avoid having to do questionable
396 * sequence-number comparisons on buffer last_rendering_seqnos, and associate
397 * an emission time with seqnos for tracking how far ahead of the GPU we are.
399 struct drm_i915_gem_request
{
400 /** GEM sequence number associated with this request. */
403 /** Time at which this request was emitted, in jiffies. */
404 unsigned long emitted_jiffies
;
406 /** Cache domains that were flushed at the start of the request. */
407 uint32_t flush_domains
;
409 struct list_head list
;
412 struct drm_i915_file_private
{
414 uint32_t last_gem_seqno
;
415 uint32_t last_gem_throttle_seqno
;
419 extern struct drm_ioctl_desc i915_ioctls
[];
420 extern int i915_max_ioctl
;
423 extern void i915_kernel_lost_context(struct drm_device
* dev
);
424 extern int i915_driver_load(struct drm_device
*, unsigned long flags
);
425 extern int i915_driver_unload(struct drm_device
*);
426 extern int i915_driver_open(struct drm_device
*dev
, struct drm_file
*file_priv
);
427 extern void i915_driver_lastclose(struct drm_device
* dev
);
428 extern void i915_driver_preclose(struct drm_device
*dev
,
429 struct drm_file
*file_priv
);
430 extern void i915_driver_postclose(struct drm_device
*dev
,
431 struct drm_file
*file_priv
);
432 extern int i915_driver_device_is_agp(struct drm_device
* dev
);
433 extern long i915_compat_ioctl(struct file
*filp
, unsigned int cmd
,
435 extern int i915_emit_box(struct drm_device
*dev
,
436 struct drm_clip_rect __user
*boxes
,
437 int i
, int DR1
, int DR4
);
440 extern int i915_irq_emit(struct drm_device
*dev
, void *data
,
441 struct drm_file
*file_priv
);
442 extern int i915_irq_wait(struct drm_device
*dev
, void *data
,
443 struct drm_file
*file_priv
);
444 void i915_user_irq_get(struct drm_device
*dev
);
445 void i915_user_irq_put(struct drm_device
*dev
);
447 extern void i915_vblank_work_handler(struct work_struct
*work
);
448 extern irqreturn_t
i915_driver_irq_handler(DRM_IRQ_ARGS
);
449 extern void i915_driver_irq_preinstall(struct drm_device
* dev
);
450 extern int i915_driver_irq_postinstall(struct drm_device
*dev
);
451 extern void i915_driver_irq_uninstall(struct drm_device
* dev
);
452 extern int i915_vblank_pipe_set(struct drm_device
*dev
, void *data
,
453 struct drm_file
*file_priv
);
454 extern int i915_vblank_pipe_get(struct drm_device
*dev
, void *data
,
455 struct drm_file
*file_priv
);
456 extern int i915_enable_vblank(struct drm_device
*dev
, int crtc
);
457 extern void i915_disable_vblank(struct drm_device
*dev
, int crtc
);
458 extern u32
i915_get_vblank_counter(struct drm_device
*dev
, int crtc
);
459 extern int i915_vblank_swap(struct drm_device
*dev
, void *data
,
460 struct drm_file
*file_priv
);
461 extern void i915_enable_irq(drm_i915_private_t
*dev_priv
, u32 mask
);
464 extern int i915_mem_alloc(struct drm_device
*dev
, void *data
,
465 struct drm_file
*file_priv
);
466 extern int i915_mem_free(struct drm_device
*dev
, void *data
,
467 struct drm_file
*file_priv
);
468 extern int i915_mem_init_heap(struct drm_device
*dev
, void *data
,
469 struct drm_file
*file_priv
);
470 extern int i915_mem_destroy_heap(struct drm_device
*dev
, void *data
,
471 struct drm_file
*file_priv
);
472 extern void i915_mem_takedown(struct mem_block
**heap
);
473 extern void i915_mem_release(struct drm_device
* dev
,
474 struct drm_file
*file_priv
, struct mem_block
*heap
);
476 int i915_gem_init_ioctl(struct drm_device
*dev
, void *data
,
477 struct drm_file
*file_priv
);
478 int i915_gem_create_ioctl(struct drm_device
*dev
, void *data
,
479 struct drm_file
*file_priv
);
480 int i915_gem_pread_ioctl(struct drm_device
*dev
, void *data
,
481 struct drm_file
*file_priv
);
482 int i915_gem_pwrite_ioctl(struct drm_device
*dev
, void *data
,
483 struct drm_file
*file_priv
);
484 int i915_gem_mmap_ioctl(struct drm_device
*dev
, void *data
,
485 struct drm_file
*file_priv
);
486 int i915_gem_set_domain_ioctl(struct drm_device
*dev
, void *data
,
487 struct drm_file
*file_priv
);
488 int i915_gem_sw_finish_ioctl(struct drm_device
*dev
, void *data
,
489 struct drm_file
*file_priv
);
490 int i915_gem_execbuffer(struct drm_device
*dev
, void *data
,
491 struct drm_file
*file_priv
);
492 int i915_gem_pin_ioctl(struct drm_device
*dev
, void *data
,
493 struct drm_file
*file_priv
);
494 int i915_gem_unpin_ioctl(struct drm_device
*dev
, void *data
,
495 struct drm_file
*file_priv
);
496 int i915_gem_busy_ioctl(struct drm_device
*dev
, void *data
,
497 struct drm_file
*file_priv
);
498 int i915_gem_throttle_ioctl(struct drm_device
*dev
, void *data
,
499 struct drm_file
*file_priv
);
500 int i915_gem_entervt_ioctl(struct drm_device
*dev
, void *data
,
501 struct drm_file
*file_priv
);
502 int i915_gem_leavevt_ioctl(struct drm_device
*dev
, void *data
,
503 struct drm_file
*file_priv
);
504 int i915_gem_set_tiling(struct drm_device
*dev
, void *data
,
505 struct drm_file
*file_priv
);
506 int i915_gem_get_tiling(struct drm_device
*dev
, void *data
,
507 struct drm_file
*file_priv
);
508 int i915_gem_get_aperture_ioctl(struct drm_device
*dev
, void *data
,
509 struct drm_file
*file_priv
);
510 void i915_gem_load(struct drm_device
*dev
);
511 int i915_gem_proc_init(struct drm_minor
*minor
);
512 void i915_gem_proc_cleanup(struct drm_minor
*minor
);
513 int i915_gem_init_object(struct drm_gem_object
*obj
);
514 void i915_gem_free_object(struct drm_gem_object
*obj
);
515 int i915_gem_object_pin(struct drm_gem_object
*obj
, uint32_t alignment
);
516 void i915_gem_object_unpin(struct drm_gem_object
*obj
);
517 void i915_gem_lastclose(struct drm_device
*dev
);
518 uint32_t i915_get_gem_seqno(struct drm_device
*dev
);
519 void i915_gem_retire_requests(struct drm_device
*dev
);
520 void i915_gem_retire_work_handler(struct work_struct
*work
);
521 void i915_gem_clflush_object(struct drm_gem_object
*obj
);
523 /* i915_gem_tiling.c */
524 void i915_gem_detect_bit_6_swizzle(struct drm_device
*dev
);
526 /* i915_gem_debug.c */
527 void i915_gem_dump_object(struct drm_gem_object
*obj
, int len
,
528 const char *where
, uint32_t mark
);
530 void i915_verify_inactive(struct drm_device
*dev
, char *file
, int line
);
532 #define i915_verify_inactive(dev, file, line)
534 void i915_gem_object_check_coherency(struct drm_gem_object
*obj
, int handle
);
535 void i915_gem_dump_object(struct drm_gem_object
*obj
, int len
,
536 const char *where
, uint32_t mark
);
537 void i915_dump_lru(struct drm_device
*dev
, const char *where
);
540 extern int i915_save_state(struct drm_device
*dev
);
541 extern int i915_restore_state(struct drm_device
*dev
);
544 extern int i915_save_state(struct drm_device
*dev
);
545 extern int i915_restore_state(struct drm_device
*dev
);
548 /* i915_opregion.c */
549 extern int intel_opregion_init(struct drm_device
*dev
);
550 extern void intel_opregion_free(struct drm_device
*dev
);
551 extern void opregion_asle_intr(struct drm_device
*dev
);
552 extern void opregion_enable_asle(struct drm_device
*dev
);
554 static inline int intel_opregion_init(struct drm_device
*dev
) { return 0; }
555 static inline void intel_opregion_free(struct drm_device
*dev
) { return; }
556 static inline void opregion_asle_intr(struct drm_device
*dev
) { return; }
557 static inline void opregion_enable_asle(struct drm_device
*dev
) { return; }
561 * Lock test for when it's just for synchronization of ring access.
563 * In that case, we don't need to do it when GEM is initialized as nobody else
564 * has access to the ring.
566 #define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
567 if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \
568 LOCK_TEST_WITH_RETURN(dev, file_priv); \
571 #define I915_READ(reg) readl(dev_priv->regs + (reg))
572 #define I915_WRITE(reg, val) writel(val, dev_priv->regs + (reg))
573 #define I915_READ16(reg) readw(dev_priv->regs + (reg))
574 #define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
575 #define I915_READ8(reg) readb(dev_priv->regs + (reg))
576 #define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
578 #define I915_VERBOSE 0
580 #define RING_LOCALS unsigned int outring, ringmask, outcount; \
583 #define BEGIN_LP_RING(n) do { \
585 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
586 if (dev_priv->ring.space < (n)*4) \
587 i915_wait_ring(dev, (n)*4, __func__); \
589 outring = dev_priv->ring.tail; \
590 ringmask = dev_priv->ring.tail_mask; \
591 virt = dev_priv->ring.virtual_start; \
594 #define OUT_RING(n) do { \
595 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
596 *(volatile unsigned int *)(virt + outring) = (n); \
599 outring &= ringmask; \
602 #define ADVANCE_LP_RING() do { \
603 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
604 dev_priv->ring.tail = outring; \
605 dev_priv->ring.space -= outcount * 4; \
606 I915_WRITE(PRB0_TAIL, outring); \
610 * Reads a dword out of the status page, which is written to from the command
611 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
614 * The following dwords have a reserved meaning:
615 * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
616 * 0x04: ring 0 head pointer
617 * 0x05: ring 1 head pointer (915-class)
618 * 0x06: ring 2 head pointer (915-class)
619 * 0x10-0x1b: Context status DWords (GM45)
620 * 0x1f: Last written status offset. (GM45)
622 * The area from dword 0x20 to 0x3ff is available for driver usage.
624 #define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
625 #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
626 #define I915_GEM_HWS_INDEX 0x20
628 extern int i915_wait_ring(struct drm_device
* dev
, int n
, const char *caller
);
630 #define IS_I830(dev) ((dev)->pci_device == 0x3577)
631 #define IS_845G(dev) ((dev)->pci_device == 0x2562)
632 #define IS_I85X(dev) ((dev)->pci_device == 0x3582)
633 #define IS_I855(dev) ((dev)->pci_device == 0x3582)
634 #define IS_I865G(dev) ((dev)->pci_device == 0x2572)
636 #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
637 #define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
638 #define IS_I945G(dev) ((dev)->pci_device == 0x2772)
639 #define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
640 (dev)->pci_device == 0x27AE)
641 #define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
642 (dev)->pci_device == 0x2982 || \
643 (dev)->pci_device == 0x2992 || \
644 (dev)->pci_device == 0x29A2 || \
645 (dev)->pci_device == 0x2A02 || \
646 (dev)->pci_device == 0x2A12 || \
647 (dev)->pci_device == 0x2A42 || \
648 (dev)->pci_device == 0x2E02 || \
649 (dev)->pci_device == 0x2E12 || \
650 (dev)->pci_device == 0x2E22)
652 #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
654 #define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
656 #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
657 (dev)->pci_device == 0x2E12 || \
658 (dev)->pci_device == 0x2E22)
660 #define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
661 (dev)->pci_device == 0x29B2 || \
662 (dev)->pci_device == 0x29D2)
664 #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
665 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
667 #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
668 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
670 #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
672 #define PRIMARY_RINGBUFFER_SIZE (128*1024)