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1 /*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28 /*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded its state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
88 #include <drm/drmP.h>
89 #include <drm/i915_drm.h>
90 #include "i915_drv.h"
91
92 /* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96 #define CONTEXT_ALIGN (64<<10)
97
98 static struct i915_hw_context *
99 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
100 static int do_switch(struct i915_hw_context *to);
101
102 static int get_context_size(struct drm_device *dev)
103 {
104 struct drm_i915_private *dev_priv = dev->dev_private;
105 int ret;
106 u32 reg;
107
108 switch (INTEL_INFO(dev)->gen) {
109 case 6:
110 reg = I915_READ(CXT_SIZE);
111 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112 break;
113 case 7:
114 reg = I915_READ(GEN7_CXT_SIZE);
115 if (IS_HASWELL(dev))
116 ret = HSW_CXT_TOTAL_SIZE;
117 else
118 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
119 break;
120 case 8:
121 ret = GEN8_CXT_TOTAL_SIZE;
122 break;
123 default:
124 BUG();
125 }
126
127 return ret;
128 }
129
130 void i915_gem_context_free(struct kref *ctx_ref)
131 {
132 struct i915_hw_context *ctx = container_of(ctx_ref,
133 typeof(*ctx), ref);
134
135 list_del(&ctx->link);
136 drm_gem_object_unreference(&ctx->obj->base);
137 kfree(ctx);
138 }
139
140 static struct i915_hw_context *
141 create_hw_context(struct drm_device *dev,
142 struct drm_i915_file_private *file_priv)
143 {
144 struct drm_i915_private *dev_priv = dev->dev_private;
145 struct i915_hw_context *ctx;
146 int ret;
147
148 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
149 if (ctx == NULL)
150 return ERR_PTR(-ENOMEM);
151
152 kref_init(&ctx->ref);
153 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
154 INIT_LIST_HEAD(&ctx->link);
155 if (ctx->obj == NULL) {
156 kfree(ctx);
157 DRM_DEBUG_DRIVER("Context object allocated failed\n");
158 return ERR_PTR(-ENOMEM);
159 }
160
161 if (INTEL_INFO(dev)->gen >= 7) {
162 ret = i915_gem_object_set_cache_level(ctx->obj,
163 I915_CACHE_L3_LLC);
164 /* Failure shouldn't ever happen this early */
165 if (WARN_ON(ret))
166 goto err_out;
167 }
168
169 /* The ring associated with the context object is handled by the normal
170 * object tracking code. We give an initial ring value simple to pass an
171 * assertion in the context switch code.
172 */
173 ctx->ring = &dev_priv->ring[RCS];
174 list_add_tail(&ctx->link, &dev_priv->context_list);
175
176 /* Default context will never have a file_priv */
177 if (file_priv == NULL)
178 return ctx;
179
180 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
181 GFP_KERNEL);
182 if (ret < 0)
183 goto err_out;
184
185 ctx->file_priv = file_priv;
186 ctx->id = ret;
187 /* NB: Mark all slices as needing a remap so that when the context first
188 * loads it will restore whatever remap state already exists. If there
189 * is no remap info, it will be a NOP. */
190 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
191
192 return ctx;
193
194 err_out:
195 i915_gem_context_unreference(ctx);
196 return ERR_PTR(ret);
197 }
198
199 static inline bool is_default_context(struct i915_hw_context *ctx)
200 {
201 return (ctx == ctx->ring->default_context);
202 }
203
204 /**
205 * The default context needs to exist per ring that uses contexts. It stores the
206 * context state of the GPU for applications that don't utilize HW contexts, as
207 * well as an idle case.
208 */
209 static int create_default_context(struct drm_i915_private *dev_priv)
210 {
211 struct i915_hw_context *ctx;
212 int ret;
213
214 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
215
216 ctx = create_hw_context(dev_priv->dev, NULL);
217 if (IS_ERR(ctx))
218 return PTR_ERR(ctx);
219
220 /* We may need to do things with the shrinker which require us to
221 * immediately switch back to the default context. This can cause a
222 * problem as pinning the default context also requires GTT space which
223 * may not be available. To avoid this we always pin the
224 * default context.
225 */
226 ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
227 if (ret) {
228 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
229 goto err_destroy;
230 }
231
232 ret = do_switch(ctx);
233 if (ret) {
234 DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
235 goto err_unpin;
236 }
237
238 dev_priv->ring[RCS].default_context = ctx;
239
240 DRM_DEBUG_DRIVER("Default HW context loaded\n");
241 return 0;
242
243 err_unpin:
244 i915_gem_object_unpin(ctx->obj);
245 err_destroy:
246 i915_gem_context_unreference(ctx);
247 return ret;
248 }
249
250 void i915_gem_context_init(struct drm_device *dev)
251 {
252 struct drm_i915_private *dev_priv = dev->dev_private;
253
254 if (!HAS_HW_CONTEXTS(dev)) {
255 dev_priv->hw_contexts_disabled = true;
256 DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n");
257 return;
258 }
259
260 /* If called from reset, or thaw... we've been here already */
261 if (dev_priv->hw_contexts_disabled ||
262 dev_priv->ring[RCS].default_context)
263 return;
264
265 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
266
267 if (dev_priv->hw_context_size > (1<<20)) {
268 dev_priv->hw_contexts_disabled = true;
269 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
270 return;
271 }
272
273 if (create_default_context(dev_priv)) {
274 dev_priv->hw_contexts_disabled = true;
275 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n");
276 return;
277 }
278
279 DRM_DEBUG_DRIVER("HW context support initialized\n");
280 }
281
282 void i915_gem_context_fini(struct drm_device *dev)
283 {
284 struct drm_i915_private *dev_priv = dev->dev_private;
285 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
286
287 if (dev_priv->hw_contexts_disabled)
288 return;
289
290 /* The only known way to stop the gpu from accessing the hw context is
291 * to reset it. Do this as the very last operation to avoid confusing
292 * other code, leading to spurious errors. */
293 intel_gpu_reset(dev);
294
295 /* When default context is created and switched to, base object refcount
296 * will be 2 (+1 from object creation and +1 from do_switch()).
297 * i915_gem_context_fini() will be called after gpu_idle() has switched
298 * to default context. So we need to unreference the base object once
299 * to offset the do_switch part, so that i915_gem_context_unreference()
300 * can then free the base object correctly. */
301 WARN_ON(!dev_priv->ring[RCS].last_context);
302 if (dev_priv->ring[RCS].last_context == dctx) {
303 /* Fake switch to NULL context */
304 WARN_ON(dctx->obj->active);
305 i915_gem_object_unpin(dctx->obj);
306 i915_gem_context_unreference(dctx);
307 }
308
309 i915_gem_object_unpin(dctx->obj);
310 i915_gem_context_unreference(dctx);
311 dev_priv->ring[RCS].default_context = NULL;
312 dev_priv->ring[RCS].last_context = NULL;
313 }
314
315 static int context_idr_cleanup(int id, void *p, void *data)
316 {
317 struct i915_hw_context *ctx = p;
318
319 BUG_ON(id == DEFAULT_CONTEXT_ID);
320
321 i915_gem_context_unreference(ctx);
322 return 0;
323 }
324
325 struct i915_ctx_hang_stats *
326 i915_gem_context_get_hang_stats(struct drm_device *dev,
327 struct drm_file *file,
328 u32 id)
329 {
330 struct drm_i915_private *dev_priv = dev->dev_private;
331 struct drm_i915_file_private *file_priv = file->driver_priv;
332 struct i915_hw_context *ctx;
333
334 if (id == DEFAULT_CONTEXT_ID)
335 return &file_priv->hang_stats;
336
337 ctx = NULL;
338 if (!dev_priv->hw_contexts_disabled)
339 ctx = i915_gem_context_get(file->driver_priv, id);
340 if (ctx == NULL)
341 return ERR_PTR(-ENOENT);
342
343 return &ctx->hang_stats;
344 }
345
346 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
347 {
348 struct drm_i915_file_private *file_priv = file->driver_priv;
349
350 mutex_lock(&dev->struct_mutex);
351 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
352 idr_destroy(&file_priv->context_idr);
353 mutex_unlock(&dev->struct_mutex);
354 }
355
356 static struct i915_hw_context *
357 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
358 {
359 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
360 }
361
362 static inline int
363 mi_set_context(struct intel_ring_buffer *ring,
364 struct i915_hw_context *new_context,
365 u32 hw_flags)
366 {
367 int ret;
368
369 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
370 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
371 * explicitly, so we rely on the value at ring init, stored in
372 * itlb_before_ctx_switch.
373 */
374 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
375 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
376 if (ret)
377 return ret;
378 }
379
380 ret = intel_ring_begin(ring, 6);
381 if (ret)
382 return ret;
383
384 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
385 if (IS_GEN7(ring->dev))
386 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
387 else
388 intel_ring_emit(ring, MI_NOOP);
389
390 intel_ring_emit(ring, MI_NOOP);
391 intel_ring_emit(ring, MI_SET_CONTEXT);
392 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
393 MI_MM_SPACE_GTT |
394 MI_SAVE_EXT_STATE_EN |
395 MI_RESTORE_EXT_STATE_EN |
396 hw_flags);
397 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
398 intel_ring_emit(ring, MI_NOOP);
399
400 if (IS_GEN7(ring->dev))
401 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
402 else
403 intel_ring_emit(ring, MI_NOOP);
404
405 intel_ring_advance(ring);
406
407 return ret;
408 }
409
410 static int do_switch(struct i915_hw_context *to)
411 {
412 struct intel_ring_buffer *ring = to->ring;
413 struct i915_hw_context *from = ring->last_context;
414 u32 hw_flags = 0;
415 int ret, i;
416
417 BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
418
419 if (from == to && !to->remap_slice)
420 return 0;
421
422 ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
423 if (ret)
424 return ret;
425
426 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
427 * that thanks to write = false in this call and us not setting any gpu
428 * write domains when putting a context object onto the active list
429 * (when switching away from it), this won't block.
430 * XXX: We need a real interface to do this instead of trickery. */
431 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
432 if (ret) {
433 i915_gem_object_unpin(to->obj);
434 return ret;
435 }
436
437 if (!to->obj->has_global_gtt_mapping)
438 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
439
440 if (!to->is_initialized || is_default_context(to))
441 hw_flags |= MI_RESTORE_INHIBIT;
442
443 ret = mi_set_context(ring, to, hw_flags);
444 if (ret) {
445 i915_gem_object_unpin(to->obj);
446 return ret;
447 }
448
449 for (i = 0; i < MAX_L3_SLICES; i++) {
450 if (!(to->remap_slice & (1<<i)))
451 continue;
452
453 ret = i915_gem_l3_remap(ring, i);
454 /* If it failed, try again next round */
455 if (ret)
456 DRM_DEBUG_DRIVER("L3 remapping failed\n");
457 else
458 to->remap_slice &= ~(1<<i);
459 }
460
461 /* The backing object for the context is done after switching to the
462 * *next* context. Therefore we cannot retire the previous context until
463 * the next context has already started running. In fact, the below code
464 * is a bit suboptimal because the retiring can occur simply after the
465 * MI_SET_CONTEXT instead of when the next seqno has completed.
466 */
467 if (from != NULL) {
468 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
469 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
470 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
471 * whole damn pipeline, we don't need to explicitly mark the
472 * object dirty. The only exception is that the context must be
473 * correct in case the object gets swapped out. Ideally we'd be
474 * able to defer doing this until we know the object would be
475 * swapped, but there is no way to do that yet.
476 */
477 from->obj->dirty = 1;
478 BUG_ON(from->obj->ring != ring);
479
480 /* obj is kept alive until the next request by its active ref */
481 i915_gem_object_unpin(from->obj);
482 i915_gem_context_unreference(from);
483 }
484
485 i915_gem_context_reference(to);
486 ring->last_context = to;
487 to->is_initialized = true;
488
489 return 0;
490 }
491
492 /**
493 * i915_switch_context() - perform a GPU context switch.
494 * @ring: ring for which we'll execute the context switch
495 * @file_priv: file_priv associated with the context, may be NULL
496 * @id: context id number
497 * @seqno: sequence number by which the new context will be switched to
498 * @flags:
499 *
500 * The context life cycle is simple. The context refcount is incremented and
501 * decremented by 1 and create and destroy. If the context is in use by the GPU,
502 * it will have a refoucnt > 1. This allows us to destroy the context abstract
503 * object while letting the normal object tracking destroy the backing BO.
504 */
505 int i915_switch_context(struct intel_ring_buffer *ring,
506 struct drm_file *file,
507 int to_id)
508 {
509 struct drm_i915_private *dev_priv = ring->dev->dev_private;
510 struct i915_hw_context *to;
511
512 if (dev_priv->hw_contexts_disabled)
513 return 0;
514
515 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
516
517 if (ring != &dev_priv->ring[RCS])
518 return 0;
519
520 if (to_id == DEFAULT_CONTEXT_ID) {
521 to = ring->default_context;
522 } else {
523 if (file == NULL)
524 return -EINVAL;
525
526 to = i915_gem_context_get(file->driver_priv, to_id);
527 if (to == NULL)
528 return -ENOENT;
529 }
530
531 return do_switch(to);
532 }
533
534 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
535 struct drm_file *file)
536 {
537 struct drm_i915_private *dev_priv = dev->dev_private;
538 struct drm_i915_gem_context_create *args = data;
539 struct drm_i915_file_private *file_priv = file->driver_priv;
540 struct i915_hw_context *ctx;
541 int ret;
542
543 if (!(dev->driver->driver_features & DRIVER_GEM))
544 return -ENODEV;
545
546 if (dev_priv->hw_contexts_disabled)
547 return -ENODEV;
548
549 ret = i915_mutex_lock_interruptible(dev);
550 if (ret)
551 return ret;
552
553 ctx = create_hw_context(dev, file_priv);
554 mutex_unlock(&dev->struct_mutex);
555 if (IS_ERR(ctx))
556 return PTR_ERR(ctx);
557
558 args->ctx_id = ctx->id;
559 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
560
561 return 0;
562 }
563
564 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
565 struct drm_file *file)
566 {
567 struct drm_i915_gem_context_destroy *args = data;
568 struct drm_i915_file_private *file_priv = file->driver_priv;
569 struct i915_hw_context *ctx;
570 int ret;
571
572 if (!(dev->driver->driver_features & DRIVER_GEM))
573 return -ENODEV;
574
575 ret = i915_mutex_lock_interruptible(dev);
576 if (ret)
577 return ret;
578
579 ctx = i915_gem_context_get(file_priv, args->ctx_id);
580 if (!ctx) {
581 mutex_unlock(&dev->struct_mutex);
582 return -ENOENT;
583 }
584
585 idr_remove(&ctx->file_priv->context_idr, ctx->id);
586 i915_gem_context_unreference(ctx);
587 mutex_unlock(&dev->struct_mutex);
588
589 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
590 return 0;
591 }