2 * Copyright © 2015-2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Robert Bragg <robert@sixbynine.org>
27 #include <linux/anon_inodes.h>
28 #include <linux/sizes.h>
31 #include "i915_oa_hsw.h"
33 /* HW requires this to be a power of two, between 128k and 16M, though driver
34 * is currently generally designed assuming the largest 16M size is used such
35 * that the overflow cases are unlikely in normal operation.
37 #define OA_BUFFER_SIZE SZ_16M
39 #define OA_TAKEN(tail, head) ((tail - head) & (OA_BUFFER_SIZE - 1))
41 /* There's a HW race condition between OA unit tail pointer register updates and
42 * writes to memory whereby the tail pointer can sometimes get ahead of what's
43 * been written out to the OA buffer so far.
45 * Although this can be observed explicitly by checking for a zeroed report-id
46 * field in tail reports, it seems preferable to account for this earlier e.g.
47 * as part of the _oa_buffer_is_empty checks to minimize -EAGAIN polling cycles
50 * To give time for the most recent reports to land before they may be copied to
51 * userspace, the driver operates as if the tail pointer effectively lags behind
52 * the HW tail pointer by 'tail_margin' bytes. The margin in bytes is calculated
53 * based on this constant in nanoseconds, the current OA sampling exponent
54 * and current report size.
56 * There is also a fallback check while reading to simply skip over reports with
59 #define OA_TAIL_MARGIN_NSEC 100000ULL
61 /* frequency for checking whether the OA unit has written new reports to the
62 * circular OA buffer...
64 #define POLL_FREQUENCY 200
65 #define POLL_PERIOD (NSEC_PER_SEC / POLL_FREQUENCY)
67 /* The maximum exponent the hardware accepts is 63 (essentially it selects one
68 * of the 64bit timestamp bits to trigger reports from) but there's currently
69 * no known use case for sampling as infrequently as once per 47 thousand years.
71 * Since the timestamps included in OA reports are only 32bits it seems
72 * reasonable to limit the OA exponent where it's still possible to account for
73 * overflow in OA report timestamps.
75 #define OA_EXPONENT_MAX 31
77 #define INVALID_CTX_ID 0xffffffff
80 /* XXX: beware if future OA HW adds new report formats that the current
81 * code assumes all reports have a power-of-two size and ~(size - 1) can
82 * be used as a mask to align the OA tail pointer.
84 static struct i915_oa_format hsw_oa_formats
[I915_OA_FORMAT_MAX
] = {
85 [I915_OA_FORMAT_A13
] = { 0, 64 },
86 [I915_OA_FORMAT_A29
] = { 1, 128 },
87 [I915_OA_FORMAT_A13_B8_C8
] = { 2, 128 },
88 /* A29_B8_C8 Disallowed as 192 bytes doesn't factor into buffer size */
89 [I915_OA_FORMAT_B4_C8
] = { 4, 64 },
90 [I915_OA_FORMAT_A45_B8_C8
] = { 5, 256 },
91 [I915_OA_FORMAT_B4_C8_A16
] = { 6, 128 },
92 [I915_OA_FORMAT_C4_B8
] = { 7, 64 },
95 #define SAMPLE_OA_REPORT (1<<0)
97 struct perf_open_properties
{
100 u64 single_context
:1;
103 /* OA sampling state */
107 int oa_period_exponent
;
110 /* NB: This is either called via fops or the poll check hrtimer (atomic ctx)
112 * It's safe to read OA config state here unlocked, assuming that this is only
113 * called while the stream is enabled, while the global OA configuration can't
116 * Note: we don't lock around the head/tail reads even though there's the slim
117 * possibility of read() fop errors forcing a re-init of the OA buffer
118 * pointers. A race here could result in a false positive !empty status which
121 static bool gen7_oa_buffer_is_empty_fop_unlocked(struct drm_i915_private
*dev_priv
)
123 int report_size
= dev_priv
->perf
.oa
.oa_buffer
.format_size
;
124 u32 oastatus2
= I915_READ(GEN7_OASTATUS2
);
125 u32 oastatus1
= I915_READ(GEN7_OASTATUS1
);
126 u32 head
= oastatus2
& GEN7_OASTATUS2_HEAD_MASK
;
127 u32 tail
= oastatus1
& GEN7_OASTATUS1_TAIL_MASK
;
129 return OA_TAKEN(tail
, head
) <
130 dev_priv
->perf
.oa
.tail_margin
+ report_size
;
134 * Appends a status record to a userspace read() buffer.
136 static int append_oa_status(struct i915_perf_stream
*stream
,
140 enum drm_i915_perf_record_type type
)
142 struct drm_i915_perf_record_header header
= { type
, 0, sizeof(header
) };
144 if ((count
- *offset
) < header
.size
)
147 if (copy_to_user(buf
+ *offset
, &header
, sizeof(header
)))
150 (*offset
) += header
.size
;
156 * Copies single OA report into userspace read() buffer.
158 static int append_oa_sample(struct i915_perf_stream
*stream
,
164 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
165 int report_size
= dev_priv
->perf
.oa
.oa_buffer
.format_size
;
166 struct drm_i915_perf_record_header header
;
167 u32 sample_flags
= stream
->sample_flags
;
169 header
.type
= DRM_I915_PERF_RECORD_SAMPLE
;
171 header
.size
= stream
->sample_size
;
173 if ((count
- *offset
) < header
.size
)
177 if (copy_to_user(buf
, &header
, sizeof(header
)))
179 buf
+= sizeof(header
);
181 if (sample_flags
& SAMPLE_OA_REPORT
) {
182 if (copy_to_user(buf
, report
, report_size
))
186 (*offset
) += header
.size
;
192 * Copies all buffered OA reports into userspace read() buffer.
193 * @stream: An i915-perf stream opened for OA metrics
194 * @buf: destination buffer given by userspace
195 * @count: the number of bytes userspace wants to read
196 * @offset: (inout): the current position for writing into @buf
197 * @head_ptr: (inout): the current oa buffer cpu read position
198 * @tail: the current oa buffer gpu write position
200 * Returns 0 on success, negative error code on failure.
202 * Notably any error condition resulting in a short read (-ENOSPC or
203 * -EFAULT) will be returned even though one or more records may
204 * have been successfully copied. In this case it's up to the caller
205 * to decide if the error should be squashed before returning to
208 * Note: reports are consumed from the head, and appended to the
209 * tail, so the head chases the tail?... If you think that's mad
210 * and back-to-front you're not alone, but this follows the
211 * Gen PRM naming convention.
213 static int gen7_append_oa_reports(struct i915_perf_stream
*stream
,
220 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
221 int report_size
= dev_priv
->perf
.oa
.oa_buffer
.format_size
;
222 u8
*oa_buf_base
= dev_priv
->perf
.oa
.oa_buffer
.vaddr
;
223 int tail_margin
= dev_priv
->perf
.oa
.tail_margin
;
224 u32 gtt_offset
= i915_ggtt_offset(dev_priv
->perf
.oa
.oa_buffer
.vma
);
225 u32 mask
= (OA_BUFFER_SIZE
- 1);
230 if (WARN_ON(!stream
->enabled
))
233 head
= *head_ptr
- gtt_offset
;
236 /* The OA unit is expected to wrap the tail pointer according to the OA
237 * buffer size and since we should never write a misaligned head
238 * pointer we don't expect to read one back either...
240 if (tail
> OA_BUFFER_SIZE
|| head
> OA_BUFFER_SIZE
||
241 head
% report_size
) {
242 DRM_ERROR("Inconsistent OA buffer pointer (head = %u, tail = %u): force restart\n",
244 dev_priv
->perf
.oa
.ops
.oa_disable(dev_priv
);
245 dev_priv
->perf
.oa
.ops
.oa_enable(dev_priv
);
246 *head_ptr
= I915_READ(GEN7_OASTATUS2
) &
247 GEN7_OASTATUS2_HEAD_MASK
;
252 /* The tail pointer increases in 64 byte increments, not in report_size
255 tail
&= ~(report_size
- 1);
257 /* Move the tail pointer back by the current tail_margin to account for
258 * the possibility that the latest reports may not have really landed
262 if (OA_TAKEN(tail
, head
) < report_size
+ tail_margin
)
269 (taken
= OA_TAKEN(tail
, head
));
270 head
= (head
+ report_size
) & mask
) {
271 u8
*report
= oa_buf_base
+ head
;
272 u32
*report32
= (void *)report
;
274 /* All the report sizes factor neatly into the buffer
275 * size so we never expect to see a report split
276 * between the beginning and end of the buffer.
278 * Given the initial alignment check a misalignment
279 * here would imply a driver bug that would result
282 if (WARN_ON((OA_BUFFER_SIZE
- head
) < report_size
)) {
283 DRM_ERROR("Spurious OA head ptr: non-integral report offset\n");
287 /* The report-ID field for periodic samples includes
288 * some undocumented flags related to what triggered
289 * the report and is never expected to be zero so we
290 * can check that the report isn't invalid before
291 * copying it to userspace...
293 if (report32
[0] == 0) {
294 DRM_ERROR("Skipping spurious, invalid OA report\n");
298 ret
= append_oa_sample(stream
, buf
, count
, offset
, report
);
302 /* The above report-id field sanity check is based on
303 * the assumption that the OA buffer is initially
304 * zeroed and we reset the field after copying so the
305 * check is still meaningful once old reports start
311 *head_ptr
= gtt_offset
+ head
;
316 static int gen7_oa_read(struct i915_perf_stream
*stream
,
321 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
322 int report_size
= dev_priv
->perf
.oa
.oa_buffer
.format_size
;
329 if (WARN_ON(!dev_priv
->perf
.oa
.oa_buffer
.vaddr
))
332 oastatus2
= I915_READ(GEN7_OASTATUS2
);
333 oastatus1
= I915_READ(GEN7_OASTATUS1
);
335 head
= oastatus2
& GEN7_OASTATUS2_HEAD_MASK
;
336 tail
= oastatus1
& GEN7_OASTATUS1_TAIL_MASK
;
338 /* XXX: On Haswell we don't have a safe way to clear oastatus1
339 * bits while the OA unit is enabled (while the tail pointer
340 * may be updated asynchronously) so we ignore status bits
341 * that have already been reported to userspace.
343 oastatus1
&= ~dev_priv
->perf
.oa
.gen7_latched_oastatus1
;
345 /* We treat OABUFFER_OVERFLOW as a significant error:
347 * - The status can be interpreted to mean that the buffer is
348 * currently full (with a higher precedence than OA_TAKEN()
349 * which will start to report a near-empty buffer after an
350 * overflow) but it's awkward that we can't clear the status
351 * on Haswell, so without a reset we won't be able to catch
354 * - Since it also implies the HW has started overwriting old
355 * reports it may also affect our sanity checks for invalid
356 * reports when copying to userspace that assume new reports
357 * are being written to cleared memory.
359 * - In the future we may want to introduce a flight recorder
360 * mode where the driver will automatically maintain a safe
361 * guard band between head/tail, avoiding this overflow
362 * condition, but we avoid the added driver complexity for
365 if (unlikely(oastatus1
& GEN7_OASTATUS1_OABUFFER_OVERFLOW
)) {
366 ret
= append_oa_status(stream
, buf
, count
, offset
,
367 DRM_I915_PERF_RECORD_OA_BUFFER_LOST
);
371 DRM_ERROR("OA buffer overflow: force restart\n");
373 dev_priv
->perf
.oa
.ops
.oa_disable(dev_priv
);
374 dev_priv
->perf
.oa
.ops
.oa_enable(dev_priv
);
376 oastatus2
= I915_READ(GEN7_OASTATUS2
);
377 oastatus1
= I915_READ(GEN7_OASTATUS1
);
379 head
= oastatus2
& GEN7_OASTATUS2_HEAD_MASK
;
380 tail
= oastatus1
& GEN7_OASTATUS1_TAIL_MASK
;
383 if (unlikely(oastatus1
& GEN7_OASTATUS1_REPORT_LOST
)) {
384 ret
= append_oa_status(stream
, buf
, count
, offset
,
385 DRM_I915_PERF_RECORD_OA_REPORT_LOST
);
388 dev_priv
->perf
.oa
.gen7_latched_oastatus1
|=
389 GEN7_OASTATUS1_REPORT_LOST
;
392 ret
= gen7_append_oa_reports(stream
, buf
, count
, offset
,
395 /* All the report sizes are a power of two and the
396 * head should always be incremented by some multiple
397 * of the report size.
399 * A warning here, but notably if we later read back a
400 * misaligned pointer we will treat that as a bug since
401 * it could lead to a buffer overrun.
403 WARN_ONCE(head
& (report_size
- 1),
404 "i915: Writing misaligned OA head pointer");
406 /* Note: we update the head pointer here even if an error
407 * was returned since the error may represent a short read
408 * where some some reports were successfully copied.
410 I915_WRITE(GEN7_OASTATUS2
,
411 ((head
& GEN7_OASTATUS2_HEAD_MASK
) |
412 OA_MEM_SELECT_GGTT
));
417 static int i915_oa_wait_unlocked(struct i915_perf_stream
*stream
)
419 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
421 /* We would wait indefinitely if periodic sampling is not enabled */
422 if (!dev_priv
->perf
.oa
.periodic
)
425 /* Note: the oa_buffer_is_empty() condition is ok to run unlocked as it
426 * just performs mmio reads of the OA buffer head + tail pointers and
427 * it's assumed we're handling some operation that implies the stream
428 * can't be destroyed until completion (such as a read()) that ensures
429 * the device + OA buffer can't disappear
431 return wait_event_interruptible(dev_priv
->perf
.oa
.poll_wq
,
432 !dev_priv
->perf
.oa
.ops
.oa_buffer_is_empty(dev_priv
));
435 static void i915_oa_poll_wait(struct i915_perf_stream
*stream
,
439 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
441 poll_wait(file
, &dev_priv
->perf
.oa
.poll_wq
, wait
);
444 static int i915_oa_read(struct i915_perf_stream
*stream
,
449 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
451 return dev_priv
->perf
.oa
.ops
.read(stream
, buf
, count
, offset
);
454 /* Determine the render context hw id, and ensure it remains fixed for the
455 * lifetime of the stream. This ensures that we don't have to worry about
456 * updating the context ID in OACONTROL on the fly.
458 static int oa_get_render_ctx_id(struct i915_perf_stream
*stream
)
460 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
461 struct i915_vma
*vma
;
464 ret
= i915_mutex_lock_interruptible(&dev_priv
->drm
);
468 /* As the ID is the gtt offset of the context's vma we pin
469 * the vma to ensure the ID remains fixed.
471 * NB: implied RCS engine...
473 vma
= i915_gem_context_pin_legacy(stream
->ctx
, 0);
479 dev_priv
->perf
.oa
.pinned_rcs_vma
= vma
;
481 /* Explicitly track the ID (instead of calling i915_ggtt_offset()
482 * on the fly) considering the difference with gen8+ and
485 dev_priv
->perf
.oa
.specific_ctx_id
= i915_ggtt_offset(vma
);
488 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
493 static void oa_put_render_ctx_id(struct i915_perf_stream
*stream
)
495 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
497 mutex_lock(&dev_priv
->drm
.struct_mutex
);
499 i915_vma_unpin(dev_priv
->perf
.oa
.pinned_rcs_vma
);
500 dev_priv
->perf
.oa
.pinned_rcs_vma
= NULL
;
502 dev_priv
->perf
.oa
.specific_ctx_id
= INVALID_CTX_ID
;
504 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
508 free_oa_buffer(struct drm_i915_private
*i915
)
510 mutex_lock(&i915
->drm
.struct_mutex
);
512 i915_gem_object_unpin_map(i915
->perf
.oa
.oa_buffer
.vma
->obj
);
513 i915_vma_unpin(i915
->perf
.oa
.oa_buffer
.vma
);
514 i915_gem_object_put(i915
->perf
.oa
.oa_buffer
.vma
->obj
);
516 i915
->perf
.oa
.oa_buffer
.vma
= NULL
;
517 i915
->perf
.oa
.oa_buffer
.vaddr
= NULL
;
519 mutex_unlock(&i915
->drm
.struct_mutex
);
522 static void i915_oa_stream_destroy(struct i915_perf_stream
*stream
)
524 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
526 BUG_ON(stream
!= dev_priv
->perf
.oa
.exclusive_stream
);
528 dev_priv
->perf
.oa
.ops
.disable_metric_set(dev_priv
);
530 free_oa_buffer(dev_priv
);
532 intel_uncore_forcewake_put(dev_priv
, FORCEWAKE_ALL
);
533 intel_runtime_pm_put(dev_priv
);
536 oa_put_render_ctx_id(stream
);
538 dev_priv
->perf
.oa
.exclusive_stream
= NULL
;
541 static void gen7_init_oa_buffer(struct drm_i915_private
*dev_priv
)
543 u32 gtt_offset
= i915_ggtt_offset(dev_priv
->perf
.oa
.oa_buffer
.vma
);
545 /* Pre-DevBDW: OABUFFER must be set with counters off,
546 * before OASTATUS1, but after OASTATUS2
548 I915_WRITE(GEN7_OASTATUS2
, gtt_offset
| OA_MEM_SELECT_GGTT
); /* head */
549 I915_WRITE(GEN7_OABUFFER
, gtt_offset
);
550 I915_WRITE(GEN7_OASTATUS1
, gtt_offset
| OABUFFER_SIZE_16M
); /* tail */
552 /* On Haswell we have to track which OASTATUS1 flags we've
553 * already seen since they can't be cleared while periodic
554 * sampling is enabled.
556 dev_priv
->perf
.oa
.gen7_latched_oastatus1
= 0;
558 /* NB: although the OA buffer will initially be allocated
559 * zeroed via shmfs (and so this memset is redundant when
560 * first allocating), we may re-init the OA buffer, either
561 * when re-enabling a stream or in error/reset paths.
563 * The reason we clear the buffer for each re-init is for the
564 * sanity check in gen7_append_oa_reports() that looks at the
565 * report-id field to make sure it's non-zero which relies on
566 * the assumption that new reports are being written to zeroed
569 memset(dev_priv
->perf
.oa
.oa_buffer
.vaddr
, 0, OA_BUFFER_SIZE
);
571 /* Maybe make ->pollin per-stream state if we support multiple
572 * concurrent streams in the future.
574 dev_priv
->perf
.oa
.pollin
= false;
577 static int alloc_oa_buffer(struct drm_i915_private
*dev_priv
)
579 struct drm_i915_gem_object
*bo
;
580 struct i915_vma
*vma
;
583 if (WARN_ON(dev_priv
->perf
.oa
.oa_buffer
.vma
))
586 ret
= i915_mutex_lock_interruptible(&dev_priv
->drm
);
590 BUILD_BUG_ON_NOT_POWER_OF_2(OA_BUFFER_SIZE
);
591 BUILD_BUG_ON(OA_BUFFER_SIZE
< SZ_128K
|| OA_BUFFER_SIZE
> SZ_16M
);
593 bo
= i915_gem_object_create(&dev_priv
->drm
, OA_BUFFER_SIZE
);
595 DRM_ERROR("Failed to allocate OA buffer\n");
600 ret
= i915_gem_object_set_cache_level(bo
, I915_CACHE_LLC
);
604 /* PreHSW required 512K alignment, HSW requires 16M */
605 vma
= i915_gem_object_ggtt_pin(bo
, NULL
, 0, SZ_16M
, 0);
610 dev_priv
->perf
.oa
.oa_buffer
.vma
= vma
;
612 dev_priv
->perf
.oa
.oa_buffer
.vaddr
=
613 i915_gem_object_pin_map(bo
, I915_MAP_WB
);
614 if (IS_ERR(dev_priv
->perf
.oa
.oa_buffer
.vaddr
)) {
615 ret
= PTR_ERR(dev_priv
->perf
.oa
.oa_buffer
.vaddr
);
619 dev_priv
->perf
.oa
.ops
.init_oa_buffer(dev_priv
);
621 DRM_DEBUG_DRIVER("OA Buffer initialized, gtt offset = 0x%x, vaddr = %p\n",
622 i915_ggtt_offset(dev_priv
->perf
.oa
.oa_buffer
.vma
),
623 dev_priv
->perf
.oa
.oa_buffer
.vaddr
);
628 __i915_vma_unpin(vma
);
631 i915_gem_object_put(bo
);
633 dev_priv
->perf
.oa
.oa_buffer
.vaddr
= NULL
;
634 dev_priv
->perf
.oa
.oa_buffer
.vma
= NULL
;
637 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
641 static void config_oa_regs(struct drm_i915_private
*dev_priv
,
642 const struct i915_oa_reg
*regs
,
647 for (i
= 0; i
< n_regs
; i
++) {
648 const struct i915_oa_reg
*reg
= regs
+ i
;
650 I915_WRITE(reg
->addr
, reg
->value
);
654 static int hsw_enable_metric_set(struct drm_i915_private
*dev_priv
)
656 int ret
= i915_oa_select_metric_set_hsw(dev_priv
);
661 I915_WRITE(GDT_CHICKEN_BITS
, (I915_READ(GDT_CHICKEN_BITS
) |
666 * OA unit is using “crclk” for its functionality. When trunk
667 * level clock gating takes place, OA clock would be gated,
668 * unable to count the events from non-render clock domain.
669 * Render clock gating must be disabled when OA is enabled to
670 * count the events from non-render domain. Unit level clock
671 * gating for RCS should also be disabled.
673 I915_WRITE(GEN7_MISCCPCTL
, (I915_READ(GEN7_MISCCPCTL
) &
674 ~GEN7_DOP_CLOCK_GATE_ENABLE
));
675 I915_WRITE(GEN6_UCGCTL1
, (I915_READ(GEN6_UCGCTL1
) |
676 GEN6_CSUNIT_CLOCK_GATE_DISABLE
));
678 config_oa_regs(dev_priv
, dev_priv
->perf
.oa
.mux_regs
,
679 dev_priv
->perf
.oa
.mux_regs_len
);
681 /* It apparently takes a fairly long time for a new MUX
682 * configuration to be be applied after these register writes.
683 * This delay duration was derived empirically based on the
684 * render_basic config but hopefully it covers the maximum
685 * configuration latency.
687 * As a fallback, the checks in _append_oa_reports() to skip
688 * invalid OA reports do also seem to work to discard reports
689 * generated before this config has completed - albeit not
692 * Unfortunately this is essentially a magic number, since we
693 * don't currently know of a reliable mechanism for predicting
694 * how long the MUX config will take to apply and besides
695 * seeing invalid reports we don't know of a reliable way to
696 * explicitly check that the MUX config has landed.
698 * It's even possible we've miss characterized the underlying
699 * problem - it just seems like the simplest explanation why
700 * a delay at this location would mitigate any invalid reports.
702 usleep_range(15000, 20000);
704 config_oa_regs(dev_priv
, dev_priv
->perf
.oa
.b_counter_regs
,
705 dev_priv
->perf
.oa
.b_counter_regs_len
);
710 static void hsw_disable_metric_set(struct drm_i915_private
*dev_priv
)
712 I915_WRITE(GEN6_UCGCTL1
, (I915_READ(GEN6_UCGCTL1
) &
713 ~GEN6_CSUNIT_CLOCK_GATE_DISABLE
));
714 I915_WRITE(GEN7_MISCCPCTL
, (I915_READ(GEN7_MISCCPCTL
) |
715 GEN7_DOP_CLOCK_GATE_ENABLE
));
717 I915_WRITE(GDT_CHICKEN_BITS
, (I915_READ(GDT_CHICKEN_BITS
) &
721 static void gen7_update_oacontrol_locked(struct drm_i915_private
*dev_priv
)
723 assert_spin_locked(&dev_priv
->perf
.hook_lock
);
725 if (dev_priv
->perf
.oa
.exclusive_stream
->enabled
) {
726 struct i915_gem_context
*ctx
=
727 dev_priv
->perf
.oa
.exclusive_stream
->ctx
;
728 u32 ctx_id
= dev_priv
->perf
.oa
.specific_ctx_id
;
730 bool periodic
= dev_priv
->perf
.oa
.periodic
;
731 u32 period_exponent
= dev_priv
->perf
.oa
.period_exponent
;
732 u32 report_format
= dev_priv
->perf
.oa
.oa_buffer
.format
;
734 I915_WRITE(GEN7_OACONTROL
,
735 (ctx_id
& GEN7_OACONTROL_CTX_MASK
) |
737 GEN7_OACONTROL_TIMER_PERIOD_SHIFT
) |
738 (periodic
? GEN7_OACONTROL_TIMER_ENABLE
: 0) |
739 (report_format
<< GEN7_OACONTROL_FORMAT_SHIFT
) |
740 (ctx
? GEN7_OACONTROL_PER_CTX_ENABLE
: 0) |
741 GEN7_OACONTROL_ENABLE
);
743 I915_WRITE(GEN7_OACONTROL
, 0);
746 static void gen7_oa_enable(struct drm_i915_private
*dev_priv
)
750 /* Reset buf pointers so we don't forward reports from before now.
752 * Think carefully if considering trying to avoid this, since it
753 * also ensures status flags and the buffer itself are cleared
754 * in error paths, and we have checks for invalid reports based
755 * on the assumption that certain fields are written to zeroed
756 * memory which this helps maintains.
758 gen7_init_oa_buffer(dev_priv
);
760 spin_lock_irqsave(&dev_priv
->perf
.hook_lock
, flags
);
761 gen7_update_oacontrol_locked(dev_priv
);
762 spin_unlock_irqrestore(&dev_priv
->perf
.hook_lock
, flags
);
765 static void i915_oa_stream_enable(struct i915_perf_stream
*stream
)
767 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
769 dev_priv
->perf
.oa
.ops
.oa_enable(dev_priv
);
771 if (dev_priv
->perf
.oa
.periodic
)
772 hrtimer_start(&dev_priv
->perf
.oa
.poll_check_timer
,
773 ns_to_ktime(POLL_PERIOD
),
774 HRTIMER_MODE_REL_PINNED
);
777 static void gen7_oa_disable(struct drm_i915_private
*dev_priv
)
779 I915_WRITE(GEN7_OACONTROL
, 0);
782 static void i915_oa_stream_disable(struct i915_perf_stream
*stream
)
784 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
786 dev_priv
->perf
.oa
.ops
.oa_disable(dev_priv
);
788 if (dev_priv
->perf
.oa
.periodic
)
789 hrtimer_cancel(&dev_priv
->perf
.oa
.poll_check_timer
);
792 static u64
oa_exponent_to_ns(struct drm_i915_private
*dev_priv
, int exponent
)
794 return 1000000000ULL * (2ULL << exponent
) /
795 dev_priv
->perf
.oa
.timestamp_frequency
;
798 static const struct i915_perf_stream_ops i915_oa_stream_ops
= {
799 .destroy
= i915_oa_stream_destroy
,
800 .enable
= i915_oa_stream_enable
,
801 .disable
= i915_oa_stream_disable
,
802 .wait_unlocked
= i915_oa_wait_unlocked
,
803 .poll_wait
= i915_oa_poll_wait
,
804 .read
= i915_oa_read
,
807 static int i915_oa_stream_init(struct i915_perf_stream
*stream
,
808 struct drm_i915_perf_open_param
*param
,
809 struct perf_open_properties
*props
)
811 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
815 /* If the sysfs metrics/ directory wasn't registered for some
816 * reason then don't let userspace try their luck with config
819 if (!dev_priv
->perf
.metrics_kobj
) {
820 DRM_ERROR("OA metrics weren't advertised via sysfs\n");
824 if (!(props
->sample_flags
& SAMPLE_OA_REPORT
)) {
825 DRM_ERROR("Only OA report sampling supported\n");
829 if (!dev_priv
->perf
.oa
.ops
.init_oa_buffer
) {
830 DRM_ERROR("OA unit not supported\n");
834 /* To avoid the complexity of having to accurately filter
835 * counter reports and marshal to the appropriate client
836 * we currently only allow exclusive access
838 if (dev_priv
->perf
.oa
.exclusive_stream
) {
839 DRM_ERROR("OA unit already in use\n");
843 if (!props
->metrics_set
) {
844 DRM_ERROR("OA metric set not specified\n");
848 if (!props
->oa_format
) {
849 DRM_ERROR("OA report format not specified\n");
853 stream
->sample_size
= sizeof(struct drm_i915_perf_record_header
);
855 format_size
= dev_priv
->perf
.oa
.oa_formats
[props
->oa_format
].size
;
857 stream
->sample_flags
|= SAMPLE_OA_REPORT
;
858 stream
->sample_size
+= format_size
;
860 dev_priv
->perf
.oa
.oa_buffer
.format_size
= format_size
;
861 if (WARN_ON(dev_priv
->perf
.oa
.oa_buffer
.format_size
== 0))
864 dev_priv
->perf
.oa
.oa_buffer
.format
=
865 dev_priv
->perf
.oa
.oa_formats
[props
->oa_format
].format
;
867 dev_priv
->perf
.oa
.metrics_set
= props
->metrics_set
;
869 dev_priv
->perf
.oa
.periodic
= props
->oa_periodic
;
870 if (dev_priv
->perf
.oa
.periodic
) {
871 u64 period_ns
= oa_exponent_to_ns(dev_priv
,
872 props
->oa_period_exponent
);
874 dev_priv
->perf
.oa
.period_exponent
= props
->oa_period_exponent
;
876 /* See comment for OA_TAIL_MARGIN_NSEC for details
877 * about this tail_margin...
879 dev_priv
->perf
.oa
.tail_margin
=
880 ((OA_TAIL_MARGIN_NSEC
/ period_ns
) + 1) * format_size
;
884 ret
= oa_get_render_ctx_id(stream
);
889 ret
= alloc_oa_buffer(dev_priv
);
891 goto err_oa_buf_alloc
;
893 /* PRM - observability performance counters:
895 * OACONTROL, performance counter enable, note:
897 * "When this bit is set, in order to have coherent counts,
898 * RC6 power state and trunk clock gating must be disabled.
899 * This can be achieved by programming MMIO registers as
900 * 0xA094=0 and 0xA090[31]=1"
902 * In our case we are expecting that taking pm + FORCEWAKE
903 * references will effectively disable RC6.
905 intel_runtime_pm_get(dev_priv
);
906 intel_uncore_forcewake_get(dev_priv
, FORCEWAKE_ALL
);
908 ret
= dev_priv
->perf
.oa
.ops
.enable_metric_set(dev_priv
);
912 stream
->ops
= &i915_oa_stream_ops
;
914 dev_priv
->perf
.oa
.exclusive_stream
= stream
;
919 intel_uncore_forcewake_put(dev_priv
, FORCEWAKE_ALL
);
920 intel_runtime_pm_put(dev_priv
);
921 free_oa_buffer(dev_priv
);
925 oa_put_render_ctx_id(stream
);
930 static ssize_t
i915_perf_read_locked(struct i915_perf_stream
*stream
,
936 /* Note we keep the offset (aka bytes read) separate from any
937 * error status so that the final check for whether we return
938 * the bytes read with a higher precedence than any error (see
939 * comment below) doesn't need to be handled/duplicated in
940 * stream->ops->read() implementations.
943 int ret
= stream
->ops
->read(stream
, buf
, count
, &offset
);
945 /* If we've successfully copied any data then reporting that
946 * takes precedence over any internal error status, so the
949 * For example ret will be -ENOSPC whenever there is more
950 * buffered data than can be copied to userspace, but that's
951 * only interesting if we weren't able to copy some data
952 * because it implies the userspace buffer is too small to
953 * receive a single record (and we never split records).
955 * Another case with ret == -EFAULT is more of a grey area
956 * since it would seem like bad form for userspace to ask us
957 * to overrun its buffer, but the user knows best:
959 * http://yarchive.net/comp/linux/partial_reads_writes.html
961 return offset
?: (ret
?: -EAGAIN
);
964 static ssize_t
i915_perf_read(struct file
*file
,
969 struct i915_perf_stream
*stream
= file
->private_data
;
970 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
973 /* To ensure it's handled consistently we simply treat all reads of a
974 * disabled stream as an error. In particular it might otherwise lead
975 * to a deadlock for blocking file descriptors...
977 if (!stream
->enabled
)
980 if (!(file
->f_flags
& O_NONBLOCK
)) {
981 /* There's the small chance of false positives from
982 * stream->ops->wait_unlocked.
984 * E.g. with single context filtering since we only wait until
985 * oabuffer has >= 1 report we don't immediately know whether
986 * any reports really belong to the current context
989 ret
= stream
->ops
->wait_unlocked(stream
);
993 mutex_lock(&dev_priv
->perf
.lock
);
994 ret
= i915_perf_read_locked(stream
, file
,
996 mutex_unlock(&dev_priv
->perf
.lock
);
997 } while (ret
== -EAGAIN
);
999 mutex_lock(&dev_priv
->perf
.lock
);
1000 ret
= i915_perf_read_locked(stream
, file
, buf
, count
, ppos
);
1001 mutex_unlock(&dev_priv
->perf
.lock
);
1005 /* Maybe make ->pollin per-stream state if we support multiple
1006 * concurrent streams in the future.
1008 dev_priv
->perf
.oa
.pollin
= false;
1014 static enum hrtimer_restart
oa_poll_check_timer_cb(struct hrtimer
*hrtimer
)
1016 struct drm_i915_private
*dev_priv
=
1017 container_of(hrtimer
, typeof(*dev_priv
),
1018 perf
.oa
.poll_check_timer
);
1020 if (!dev_priv
->perf
.oa
.ops
.oa_buffer_is_empty(dev_priv
)) {
1021 dev_priv
->perf
.oa
.pollin
= true;
1022 wake_up(&dev_priv
->perf
.oa
.poll_wq
);
1025 hrtimer_forward_now(hrtimer
, ns_to_ktime(POLL_PERIOD
));
1027 return HRTIMER_RESTART
;
1030 static unsigned int i915_perf_poll_locked(struct drm_i915_private
*dev_priv
,
1031 struct i915_perf_stream
*stream
,
1035 unsigned int events
= 0;
1037 stream
->ops
->poll_wait(stream
, file
, wait
);
1039 /* Note: we don't explicitly check whether there's something to read
1040 * here since this path may be very hot depending on what else
1041 * userspace is polling, or on the timeout in use. We rely solely on
1042 * the hrtimer/oa_poll_check_timer_cb to notify us when there are
1045 if (dev_priv
->perf
.oa
.pollin
)
1051 static unsigned int i915_perf_poll(struct file
*file
, poll_table
*wait
)
1053 struct i915_perf_stream
*stream
= file
->private_data
;
1054 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
1057 mutex_lock(&dev_priv
->perf
.lock
);
1058 ret
= i915_perf_poll_locked(dev_priv
, stream
, file
, wait
);
1059 mutex_unlock(&dev_priv
->perf
.lock
);
1064 static void i915_perf_enable_locked(struct i915_perf_stream
*stream
)
1066 if (stream
->enabled
)
1069 /* Allow stream->ops->enable() to refer to this */
1070 stream
->enabled
= true;
1072 if (stream
->ops
->enable
)
1073 stream
->ops
->enable(stream
);
1076 static void i915_perf_disable_locked(struct i915_perf_stream
*stream
)
1078 if (!stream
->enabled
)
1081 /* Allow stream->ops->disable() to refer to this */
1082 stream
->enabled
= false;
1084 if (stream
->ops
->disable
)
1085 stream
->ops
->disable(stream
);
1088 static long i915_perf_ioctl_locked(struct i915_perf_stream
*stream
,
1093 case I915_PERF_IOCTL_ENABLE
:
1094 i915_perf_enable_locked(stream
);
1096 case I915_PERF_IOCTL_DISABLE
:
1097 i915_perf_disable_locked(stream
);
1104 static long i915_perf_ioctl(struct file
*file
,
1108 struct i915_perf_stream
*stream
= file
->private_data
;
1109 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
1112 mutex_lock(&dev_priv
->perf
.lock
);
1113 ret
= i915_perf_ioctl_locked(stream
, cmd
, arg
);
1114 mutex_unlock(&dev_priv
->perf
.lock
);
1119 static void i915_perf_destroy_locked(struct i915_perf_stream
*stream
)
1121 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
1123 if (stream
->enabled
)
1124 i915_perf_disable_locked(stream
);
1126 if (stream
->ops
->destroy
)
1127 stream
->ops
->destroy(stream
);
1129 list_del(&stream
->link
);
1132 mutex_lock(&dev_priv
->drm
.struct_mutex
);
1133 i915_gem_context_put(stream
->ctx
);
1134 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
1140 static int i915_perf_release(struct inode
*inode
, struct file
*file
)
1142 struct i915_perf_stream
*stream
= file
->private_data
;
1143 struct drm_i915_private
*dev_priv
= stream
->dev_priv
;
1145 mutex_lock(&dev_priv
->perf
.lock
);
1146 i915_perf_destroy_locked(stream
);
1147 mutex_unlock(&dev_priv
->perf
.lock
);
1153 static const struct file_operations fops
= {
1154 .owner
= THIS_MODULE
,
1155 .llseek
= no_llseek
,
1156 .release
= i915_perf_release
,
1157 .poll
= i915_perf_poll
,
1158 .read
= i915_perf_read
,
1159 .unlocked_ioctl
= i915_perf_ioctl
,
1163 static struct i915_gem_context
*
1164 lookup_context(struct drm_i915_private
*dev_priv
,
1165 struct drm_i915_file_private
*file_priv
,
1166 u32 ctx_user_handle
)
1168 struct i915_gem_context
*ctx
;
1171 ret
= i915_mutex_lock_interruptible(&dev_priv
->drm
);
1173 return ERR_PTR(ret
);
1175 ctx
= i915_gem_context_lookup(file_priv
, ctx_user_handle
);
1177 i915_gem_context_get(ctx
);
1179 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
1185 i915_perf_open_ioctl_locked(struct drm_i915_private
*dev_priv
,
1186 struct drm_i915_perf_open_param
*param
,
1187 struct perf_open_properties
*props
,
1188 struct drm_file
*file
)
1190 struct i915_gem_context
*specific_ctx
= NULL
;
1191 struct i915_perf_stream
*stream
= NULL
;
1192 unsigned long f_flags
= 0;
1196 if (props
->single_context
) {
1197 u32 ctx_handle
= props
->ctx_handle
;
1198 struct drm_i915_file_private
*file_priv
= file
->driver_priv
;
1200 specific_ctx
= lookup_context(dev_priv
, file_priv
, ctx_handle
);
1201 if (IS_ERR(specific_ctx
)) {
1202 ret
= PTR_ERR(specific_ctx
);
1204 DRM_ERROR("Failed to look up context with ID %u for opening perf stream\n",
1210 if (!specific_ctx
&& !capable(CAP_SYS_ADMIN
)) {
1211 DRM_ERROR("Insufficient privileges to open system-wide i915 perf stream\n");
1216 stream
= kzalloc(sizeof(*stream
), GFP_KERNEL
);
1222 stream
->dev_priv
= dev_priv
;
1223 stream
->ctx
= specific_ctx
;
1225 ret
= i915_oa_stream_init(stream
, param
, props
);
1229 /* we avoid simply assigning stream->sample_flags = props->sample_flags
1230 * to have _stream_init check the combination of sample flags more
1231 * thoroughly, but still this is the expected result at this point.
1233 if (WARN_ON(stream
->sample_flags
!= props
->sample_flags
)) {
1238 list_add(&stream
->link
, &dev_priv
->perf
.streams
);
1240 if (param
->flags
& I915_PERF_FLAG_FD_CLOEXEC
)
1241 f_flags
|= O_CLOEXEC
;
1242 if (param
->flags
& I915_PERF_FLAG_FD_NONBLOCK
)
1243 f_flags
|= O_NONBLOCK
;
1245 stream_fd
= anon_inode_getfd("[i915_perf]", &fops
, stream
, f_flags
);
1246 if (stream_fd
< 0) {
1251 if (!(param
->flags
& I915_PERF_FLAG_DISABLED
))
1252 i915_perf_enable_locked(stream
);
1257 list_del(&stream
->link
);
1258 if (stream
->ops
->destroy
)
1259 stream
->ops
->destroy(stream
);
1264 mutex_lock(&dev_priv
->drm
.struct_mutex
);
1265 i915_gem_context_put(specific_ctx
);
1266 mutex_unlock(&dev_priv
->drm
.struct_mutex
);
1272 /* Note we copy the properties from userspace outside of the i915 perf
1273 * mutex to avoid an awkward lockdep with mmap_sem.
1275 * Note this function only validates properties in isolation it doesn't
1276 * validate that the combination of properties makes sense or that all
1277 * properties necessary for a particular kind of stream have been set.
1279 static int read_properties_unlocked(struct drm_i915_private
*dev_priv
,
1282 struct perf_open_properties
*props
)
1284 u64 __user
*uprop
= uprops
;
1287 memset(props
, 0, sizeof(struct perf_open_properties
));
1290 DRM_ERROR("No i915 perf properties given");
1294 /* Considering that ID = 0 is reserved and assuming that we don't
1295 * (currently) expect any configurations to ever specify duplicate
1296 * values for a particular property ID then the last _PROP_MAX value is
1297 * one greater than the maximum number of properties we expect to get
1300 if (n_props
>= DRM_I915_PERF_PROP_MAX
) {
1301 DRM_ERROR("More i915 perf properties specified than exist");
1305 for (i
= 0; i
< n_props
; i
++) {
1309 ret
= get_user(id
, uprop
);
1313 ret
= get_user(value
, uprop
+ 1);
1317 switch ((enum drm_i915_perf_property_id
)id
) {
1318 case DRM_I915_PERF_PROP_CTX_HANDLE
:
1319 props
->single_context
= 1;
1320 props
->ctx_handle
= value
;
1322 case DRM_I915_PERF_PROP_SAMPLE_OA
:
1323 props
->sample_flags
|= SAMPLE_OA_REPORT
;
1325 case DRM_I915_PERF_PROP_OA_METRICS_SET
:
1327 value
> dev_priv
->perf
.oa
.n_builtin_sets
) {
1328 DRM_ERROR("Unknown OA metric set ID");
1331 props
->metrics_set
= value
;
1333 case DRM_I915_PERF_PROP_OA_FORMAT
:
1334 if (value
== 0 || value
>= I915_OA_FORMAT_MAX
) {
1335 DRM_ERROR("Invalid OA report format\n");
1338 if (!dev_priv
->perf
.oa
.oa_formats
[value
].size
) {
1339 DRM_ERROR("Invalid OA report format\n");
1342 props
->oa_format
= value
;
1344 case DRM_I915_PERF_PROP_OA_EXPONENT
:
1345 if (value
> OA_EXPONENT_MAX
) {
1346 DRM_ERROR("OA timer exponent too high (> %u)\n",
1351 /* NB: The exponent represents a period as follows:
1353 * 80ns * 2^(period_exponent + 1)
1355 * Theoretically we can program the OA unit to sample
1356 * every 160ns but don't allow that by default unless
1359 * Referring to perf's
1360 * kernel.perf_event_max_sample_rate for a precedent
1361 * (100000 by default); with an OA exponent of 6 we get
1362 * a period of 10.240 microseconds -just under 100000Hz
1364 if (value
< 6 && !capable(CAP_SYS_ADMIN
)) {
1365 DRM_ERROR("Minimum OA sampling exponent is 6 without root privileges\n");
1369 props
->oa_periodic
= true;
1370 props
->oa_period_exponent
= value
;
1374 DRM_ERROR("Unknown i915 perf property ID");
1384 int i915_perf_open_ioctl(struct drm_device
*dev
, void *data
,
1385 struct drm_file
*file
)
1387 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1388 struct drm_i915_perf_open_param
*param
= data
;
1389 struct perf_open_properties props
;
1390 u32 known_open_flags
;
1393 if (!dev_priv
->perf
.initialized
) {
1394 DRM_ERROR("i915 perf interface not available for this system");
1398 known_open_flags
= I915_PERF_FLAG_FD_CLOEXEC
|
1399 I915_PERF_FLAG_FD_NONBLOCK
|
1400 I915_PERF_FLAG_DISABLED
;
1401 if (param
->flags
& ~known_open_flags
) {
1402 DRM_ERROR("Unknown drm_i915_perf_open_param flag\n");
1406 ret
= read_properties_unlocked(dev_priv
,
1407 u64_to_user_ptr(param
->properties_ptr
),
1408 param
->num_properties
,
1413 mutex_lock(&dev_priv
->perf
.lock
);
1414 ret
= i915_perf_open_ioctl_locked(dev_priv
, param
, &props
, file
);
1415 mutex_unlock(&dev_priv
->perf
.lock
);
1420 void i915_perf_register(struct drm_i915_private
*dev_priv
)
1422 if (!IS_HASWELL(dev_priv
))
1425 if (!dev_priv
->perf
.initialized
)
1428 /* To be sure we're synchronized with an attempted
1429 * i915_perf_open_ioctl(); considering that we register after
1430 * being exposed to userspace.
1432 mutex_lock(&dev_priv
->perf
.lock
);
1434 dev_priv
->perf
.metrics_kobj
=
1435 kobject_create_and_add("metrics",
1436 &dev_priv
->drm
.primary
->kdev
->kobj
);
1437 if (!dev_priv
->perf
.metrics_kobj
)
1440 if (i915_perf_register_sysfs_hsw(dev_priv
)) {
1441 kobject_put(dev_priv
->perf
.metrics_kobj
);
1442 dev_priv
->perf
.metrics_kobj
= NULL
;
1446 mutex_unlock(&dev_priv
->perf
.lock
);
1449 void i915_perf_unregister(struct drm_i915_private
*dev_priv
)
1451 if (!IS_HASWELL(dev_priv
))
1454 if (!dev_priv
->perf
.metrics_kobj
)
1457 i915_perf_unregister_sysfs_hsw(dev_priv
);
1459 kobject_put(dev_priv
->perf
.metrics_kobj
);
1460 dev_priv
->perf
.metrics_kobj
= NULL
;
1463 void i915_perf_init(struct drm_i915_private
*dev_priv
)
1465 if (!IS_HASWELL(dev_priv
))
1468 hrtimer_init(&dev_priv
->perf
.oa
.poll_check_timer
,
1469 CLOCK_MONOTONIC
, HRTIMER_MODE_REL
);
1470 dev_priv
->perf
.oa
.poll_check_timer
.function
= oa_poll_check_timer_cb
;
1471 init_waitqueue_head(&dev_priv
->perf
.oa
.poll_wq
);
1473 INIT_LIST_HEAD(&dev_priv
->perf
.streams
);
1474 mutex_init(&dev_priv
->perf
.lock
);
1475 spin_lock_init(&dev_priv
->perf
.hook_lock
);
1477 dev_priv
->perf
.oa
.ops
.init_oa_buffer
= gen7_init_oa_buffer
;
1478 dev_priv
->perf
.oa
.ops
.enable_metric_set
= hsw_enable_metric_set
;
1479 dev_priv
->perf
.oa
.ops
.disable_metric_set
= hsw_disable_metric_set
;
1480 dev_priv
->perf
.oa
.ops
.oa_enable
= gen7_oa_enable
;
1481 dev_priv
->perf
.oa
.ops
.oa_disable
= gen7_oa_disable
;
1482 dev_priv
->perf
.oa
.ops
.read
= gen7_oa_read
;
1483 dev_priv
->perf
.oa
.ops
.oa_buffer_is_empty
=
1484 gen7_oa_buffer_is_empty_fop_unlocked
;
1486 dev_priv
->perf
.oa
.timestamp_frequency
= 12500000;
1488 dev_priv
->perf
.oa
.oa_formats
= hsw_oa_formats
;
1490 dev_priv
->perf
.oa
.n_builtin_sets
=
1491 i915_oa_n_builtin_metric_sets_hsw
;
1493 dev_priv
->perf
.initialized
= true;
1496 void i915_perf_fini(struct drm_i915_private
*dev_priv
)
1498 if (!dev_priv
->perf
.initialized
)
1501 memset(&dev_priv
->perf
.oa
.ops
, 0, sizeof(dev_priv
->perf
.oa
.ops
));
1502 dev_priv
->perf
.initialized
= false;